1098ca2bdSWarner Losh /*- 2*718cf2ccSPedro F. Giffuni * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3*718cf2ccSPedro F. Giffuni * 427d5dc18SMarcel Moolenaar * Copyright (c) 2003 Marcel Moolenaar 527d5dc18SMarcel Moolenaar * All rights reserved. 627d5dc18SMarcel Moolenaar * 727d5dc18SMarcel Moolenaar * Redistribution and use in source and binary forms, with or without 827d5dc18SMarcel Moolenaar * modification, are permitted provided that the following conditions 927d5dc18SMarcel Moolenaar * are met: 1027d5dc18SMarcel Moolenaar * 1127d5dc18SMarcel Moolenaar * 1. Redistributions of source code must retain the above copyright 1227d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer. 1327d5dc18SMarcel Moolenaar * 2. Redistributions in binary form must reproduce the above copyright 1427d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer in the 1527d5dc18SMarcel Moolenaar * documentation and/or other materials provided with the distribution. 1627d5dc18SMarcel Moolenaar * 1727d5dc18SMarcel Moolenaar * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1827d5dc18SMarcel Moolenaar * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1927d5dc18SMarcel Moolenaar * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2027d5dc18SMarcel Moolenaar * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2127d5dc18SMarcel Moolenaar * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2227d5dc18SMarcel Moolenaar * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2327d5dc18SMarcel Moolenaar * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2427d5dc18SMarcel Moolenaar * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2527d5dc18SMarcel Moolenaar * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2627d5dc18SMarcel Moolenaar * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2727d5dc18SMarcel Moolenaar */ 2827d5dc18SMarcel Moolenaar 2927d5dc18SMarcel Moolenaar #include <sys/cdefs.h> 3027d5dc18SMarcel Moolenaar __FBSDID("$FreeBSD$"); 3127d5dc18SMarcel Moolenaar 3227d5dc18SMarcel Moolenaar #include <sys/param.h> 3327d5dc18SMarcel Moolenaar #include <sys/systm.h> 3427d5dc18SMarcel Moolenaar #include <sys/bus.h> 3527d5dc18SMarcel Moolenaar #include <sys/conf.h> 3627d5dc18SMarcel Moolenaar #include <sys/cons.h> 3727d5dc18SMarcel Moolenaar #include <sys/fcntl.h> 3827d5dc18SMarcel Moolenaar #include <sys/interrupt.h> 39591bc192SMarcel Moolenaar #include <sys/kdb.h> 4027d5dc18SMarcel Moolenaar #include <sys/kernel.h> 4127d5dc18SMarcel Moolenaar #include <sys/malloc.h> 4227d5dc18SMarcel Moolenaar #include <sys/queue.h> 4327d5dc18SMarcel Moolenaar #include <sys/reboot.h> 4462145ff3SNeel Natu #include <sys/sysctl.h> 4527d5dc18SMarcel Moolenaar #include <machine/bus.h> 4627d5dc18SMarcel Moolenaar #include <sys/rman.h> 4727d5dc18SMarcel Moolenaar #include <machine/resource.h> 4827d5dc18SMarcel Moolenaar #include <machine/stdarg.h> 4927d5dc18SMarcel Moolenaar 5027d5dc18SMarcel Moolenaar #include <dev/uart/uart.h> 5127d5dc18SMarcel Moolenaar #include <dev/uart/uart_bus.h> 5227d5dc18SMarcel Moolenaar #include <dev/uart/uart_cpu.h> 53fdfbb3f5SIan Lepore #include <dev/uart/uart_ppstypes.h> 5427d5dc18SMarcel Moolenaar 5527d5dc18SMarcel Moolenaar #include "uart_if.h" 5627d5dc18SMarcel Moolenaar 5727d5dc18SMarcel Moolenaar devclass_t uart_devclass; 5886fb5400SMarius Strobl const char uart_driver_name[] = "uart"; 5927d5dc18SMarcel Moolenaar 6027d5dc18SMarcel Moolenaar SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs = 6127d5dc18SMarcel Moolenaar SLIST_HEAD_INITIALIZER(uart_sysdevs); 6227d5dc18SMarcel Moolenaar 63d745c852SEd Schouten static MALLOC_DEFINE(M_UART, "UART", "UART driver"); 6427d5dc18SMarcel Moolenaar 65332cda07SPeter Grehan #ifndef UART_POLL_FREQ 66332cda07SPeter Grehan #define UART_POLL_FREQ 50 67332cda07SPeter Grehan #endif 68332cda07SPeter Grehan static int uart_poll_freq = UART_POLL_FREQ; 6962145ff3SNeel Natu SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq, 7062145ff3SNeel Natu 0, "UART poll frequency"); 7162145ff3SNeel Natu 7262145ff3SNeel Natu static int uart_force_poll; 7362145ff3SNeel Natu SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll, 7462145ff3SNeel Natu 0, "Force UART polling"); 75332cda07SPeter Grehan 76196d3019SIan Lepore static inline int 77196d3019SIan Lepore uart_pps_mode_valid(int pps_mode) 78196d3019SIan Lepore { 79fdfbb3f5SIan Lepore int opt; 80196d3019SIan Lepore 81fdfbb3f5SIan Lepore switch(pps_mode & UART_PPS_SIGNAL_MASK) { 82fdfbb3f5SIan Lepore case UART_PPS_DISABLED: 83fdfbb3f5SIan Lepore case UART_PPS_CTS: 84fdfbb3f5SIan Lepore case UART_PPS_DCD: 85fdfbb3f5SIan Lepore break; 86fdfbb3f5SIan Lepore default: 87196d3019SIan Lepore return (false); 88196d3019SIan Lepore } 89196d3019SIan Lepore 90fdfbb3f5SIan Lepore opt = pps_mode & UART_PPS_OPTION_MASK; 91fdfbb3f5SIan Lepore if ((opt & ~(UART_PPS_INVERT_PULSE | UART_PPS_NARROW_PULSE)) != 0) 92fdfbb3f5SIan Lepore return (false); 93fdfbb3f5SIan Lepore 94fdfbb3f5SIan Lepore return (true); 95196d3019SIan Lepore } 96fdfbb3f5SIan Lepore 97fdfbb3f5SIan Lepore static void 98fdfbb3f5SIan Lepore uart_pps_print_mode(struct uart_softc *sc) 99fdfbb3f5SIan Lepore { 100fdfbb3f5SIan Lepore 101fdfbb3f5SIan Lepore device_printf(sc->sc_dev, "PPS capture mode: "); 1027bd8311dSJustin Hibbits switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) { 103fdfbb3f5SIan Lepore case UART_PPS_DISABLED: 104fdfbb3f5SIan Lepore printf("disabled"); 1057bd8311dSJustin Hibbits break; 106fdfbb3f5SIan Lepore case UART_PPS_CTS: 107fdfbb3f5SIan Lepore printf("CTS"); 1087bd8311dSJustin Hibbits break; 109fdfbb3f5SIan Lepore case UART_PPS_DCD: 110fdfbb3f5SIan Lepore printf("DCD"); 1117bd8311dSJustin Hibbits break; 112fdfbb3f5SIan Lepore default: 113fdfbb3f5SIan Lepore printf("invalid"); 1147bd8311dSJustin Hibbits break; 115fdfbb3f5SIan Lepore } 116fdfbb3f5SIan Lepore if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE) 117fdfbb3f5SIan Lepore printf("-Inverted"); 118fdfbb3f5SIan Lepore if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) 119fdfbb3f5SIan Lepore printf("-NarrowPulse"); 120fdfbb3f5SIan Lepore printf("\n"); 121196d3019SIan Lepore } 122196d3019SIan Lepore 123196d3019SIan Lepore static int 124196d3019SIan Lepore uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS) 125196d3019SIan Lepore { 126196d3019SIan Lepore struct uart_softc *sc; 127196d3019SIan Lepore int err, tmp; 128196d3019SIan Lepore 129196d3019SIan Lepore sc = arg1; 130196d3019SIan Lepore tmp = sc->sc_pps_mode; 131196d3019SIan Lepore err = sysctl_handle_int(oidp, &tmp, 0, req); 132196d3019SIan Lepore if (err != 0 || req->newptr == NULL) 133196d3019SIan Lepore return (err); 134196d3019SIan Lepore if (!uart_pps_mode_valid(tmp)) 135196d3019SIan Lepore return (EINVAL); 136196d3019SIan Lepore sc->sc_pps_mode = tmp; 137196d3019SIan Lepore return(0); 138196d3019SIan Lepore } 139196d3019SIan Lepore 140196d3019SIan Lepore static void 141fdfbb3f5SIan Lepore uart_pps_process(struct uart_softc *sc, int ser_sig) 142fdfbb3f5SIan Lepore { 143fdfbb3f5SIan Lepore sbintime_t now; 144fdfbb3f5SIan Lepore int is_assert, pps_sig; 145fdfbb3f5SIan Lepore 146fdfbb3f5SIan Lepore /* Which signal is configured as PPS? Early out if none. */ 147fdfbb3f5SIan Lepore switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) { 148fdfbb3f5SIan Lepore case UART_PPS_CTS: 149fdfbb3f5SIan Lepore pps_sig = SER_CTS; 150fdfbb3f5SIan Lepore break; 151fdfbb3f5SIan Lepore case UART_PPS_DCD: 152fdfbb3f5SIan Lepore pps_sig = SER_DCD; 153fdfbb3f5SIan Lepore break; 154fdfbb3f5SIan Lepore default: 155fdfbb3f5SIan Lepore return; 156fdfbb3f5SIan Lepore } 157fdfbb3f5SIan Lepore 158fdfbb3f5SIan Lepore /* Early out if there is no change in the signal configured as PPS. */ 159fdfbb3f5SIan Lepore if ((ser_sig & SER_DELTA(pps_sig)) == 0) 160fdfbb3f5SIan Lepore return; 161fdfbb3f5SIan Lepore 162fdfbb3f5SIan Lepore /* 163fdfbb3f5SIan Lepore * In narrow-pulse mode we need to synthesize both capture and clear 164fdfbb3f5SIan Lepore * events from a single "delta occurred" indication from the uart 165fdfbb3f5SIan Lepore * hardware because the pulse width is too narrow to reliably detect 166fdfbb3f5SIan Lepore * both edges. However, when the pulse width is close to our interrupt 167fdfbb3f5SIan Lepore * processing latency we might intermittantly catch both edges. To 168fdfbb3f5SIan Lepore * guard against generating spurious events when that happens, we use a 169fdfbb3f5SIan Lepore * separate timer to ensure at least half a second elapses before we 170fdfbb3f5SIan Lepore * generate another event. 171fdfbb3f5SIan Lepore */ 172fdfbb3f5SIan Lepore pps_capture(&sc->sc_pps); 173fdfbb3f5SIan Lepore if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) { 174fdfbb3f5SIan Lepore now = getsbinuptime(); 175fdfbb3f5SIan Lepore if (now > sc->sc_pps_captime + 500 * SBT_1MS) { 176fdfbb3f5SIan Lepore sc->sc_pps_captime = now; 177fdfbb3f5SIan Lepore pps_event(&sc->sc_pps, PPS_CAPTUREASSERT); 178fdfbb3f5SIan Lepore pps_event(&sc->sc_pps, PPS_CAPTURECLEAR); 179fdfbb3f5SIan Lepore } 180fdfbb3f5SIan Lepore } else { 181fdfbb3f5SIan Lepore is_assert = ser_sig & pps_sig; 182fdfbb3f5SIan Lepore if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE) 183fdfbb3f5SIan Lepore is_assert = !is_assert; 184fdfbb3f5SIan Lepore pps_event(&sc->sc_pps, is_assert ? PPS_CAPTUREASSERT : 185fdfbb3f5SIan Lepore PPS_CAPTURECLEAR); 186fdfbb3f5SIan Lepore } 187fdfbb3f5SIan Lepore } 188fdfbb3f5SIan Lepore 189fdfbb3f5SIan Lepore static void 190196d3019SIan Lepore uart_pps_init(struct uart_softc *sc) 191196d3019SIan Lepore { 192196d3019SIan Lepore struct sysctl_ctx_list *ctx; 193196d3019SIan Lepore struct sysctl_oid *tree; 194196d3019SIan Lepore 195196d3019SIan Lepore ctx = device_get_sysctl_ctx(sc->sc_dev); 196196d3019SIan Lepore tree = device_get_sysctl_tree(sc->sc_dev); 197196d3019SIan Lepore 198196d3019SIan Lepore /* 199196d3019SIan Lepore * The historical default for pps capture mode is either DCD or CTS, 200196d3019SIan Lepore * depending on the UART_PPS_ON_CTS kernel option. Start with that, 201196d3019SIan Lepore * then try to fetch the tunable that overrides the mode for all uart 202196d3019SIan Lepore * devices, then try to fetch the sysctl-tunable that overrides the mode 203196d3019SIan Lepore * for one specific device. 204196d3019SIan Lepore */ 205196d3019SIan Lepore #ifdef UART_PPS_ON_CTS 206fdfbb3f5SIan Lepore sc->sc_pps_mode = UART_PPS_CTS; 207196d3019SIan Lepore #else 208fdfbb3f5SIan Lepore sc->sc_pps_mode = UART_PPS_DCD; 209196d3019SIan Lepore #endif 210196d3019SIan Lepore TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode); 211196d3019SIan Lepore SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode", 212196d3019SIan Lepore CTLTYPE_INT | CTLFLAG_RWTUN, sc, 0, uart_pps_mode_sysctl, "I", 213fdfbb3f5SIan Lepore "pulse mode: 0/1/2=disabled/CTS/DCD; " 214fdfbb3f5SIan Lepore "add 0x10 to invert, 0x20 for narrow pulse"); 215196d3019SIan Lepore 216196d3019SIan Lepore if (!uart_pps_mode_valid(sc->sc_pps_mode)) { 217196d3019SIan Lepore device_printf(sc->sc_dev, 218fdfbb3f5SIan Lepore "Invalid pps_mode 0x%02x configured; disabling PPS capture\n", 219196d3019SIan Lepore sc->sc_pps_mode); 220fdfbb3f5SIan Lepore sc->sc_pps_mode = UART_PPS_DISABLED; 221196d3019SIan Lepore } else if (bootverbose) { 222fdfbb3f5SIan Lepore uart_pps_print_mode(sc); 223196d3019SIan Lepore } 224196d3019SIan Lepore 225196d3019SIan Lepore sc->sc_pps.ppscap = PPS_CAPTUREBOTH; 226196d3019SIan Lepore sc->sc_pps.driver_mtx = uart_tty_getlock(sc); 227196d3019SIan Lepore sc->sc_pps.driver_abi = PPS_ABI_VERSION; 228196d3019SIan Lepore pps_init_abi(&sc->sc_pps); 229196d3019SIan Lepore } 230196d3019SIan Lepore 23127d5dc18SMarcel Moolenaar void 23227d5dc18SMarcel Moolenaar uart_add_sysdev(struct uart_devinfo *di) 23327d5dc18SMarcel Moolenaar { 23427d5dc18SMarcel Moolenaar SLIST_INSERT_HEAD(&uart_sysdevs, di, next); 23527d5dc18SMarcel Moolenaar } 23627d5dc18SMarcel Moolenaar 237f8100ce2SMarcel Moolenaar const char * 238f8100ce2SMarcel Moolenaar uart_getname(struct uart_class *uc) 239f8100ce2SMarcel Moolenaar { 240f8100ce2SMarcel Moolenaar return ((uc != NULL) ? uc->name : NULL); 241f8100ce2SMarcel Moolenaar } 242f8100ce2SMarcel Moolenaar 243f8100ce2SMarcel Moolenaar struct uart_ops * 244f8100ce2SMarcel Moolenaar uart_getops(struct uart_class *uc) 245f8100ce2SMarcel Moolenaar { 246f8100ce2SMarcel Moolenaar return ((uc != NULL) ? uc->uc_ops : NULL); 247f8100ce2SMarcel Moolenaar } 248f8100ce2SMarcel Moolenaar 249f8100ce2SMarcel Moolenaar int 250f8100ce2SMarcel Moolenaar uart_getrange(struct uart_class *uc) 251f8100ce2SMarcel Moolenaar { 252f8100ce2SMarcel Moolenaar return ((uc != NULL) ? uc->uc_range : 0); 253f8100ce2SMarcel Moolenaar } 254f8100ce2SMarcel Moolenaar 255405ada37SAndrew Turner u_int 256405ada37SAndrew Turner uart_getregshift(struct uart_class *uc) 257405ada37SAndrew Turner { 258405ada37SAndrew Turner return ((uc != NULL) ? uc->uc_rshift : 0); 259405ada37SAndrew Turner } 260405ada37SAndrew Turner 261c214a270SRuslan Bukin u_int 262c214a270SRuslan Bukin uart_getregiowidth(struct uart_class *uc) 263c214a270SRuslan Bukin { 264c214a270SRuslan Bukin return ((uc != NULL) ? uc->uc_riowidth : 0); 265c214a270SRuslan Bukin } 266c214a270SRuslan Bukin 26727d5dc18SMarcel Moolenaar /* 2688af03381SMarcel Moolenaar * Schedule a soft interrupt. We do this on the 0 to !0 transition 2698af03381SMarcel Moolenaar * of the TTY pending interrupt status. 2708af03381SMarcel Moolenaar */ 2710acb3c4aSMarcel Moolenaar void 2728af03381SMarcel Moolenaar uart_sched_softih(struct uart_softc *sc, uint32_t ipend) 2738af03381SMarcel Moolenaar { 2748af03381SMarcel Moolenaar uint32_t new, old; 2758af03381SMarcel Moolenaar 2768af03381SMarcel Moolenaar do { 2778af03381SMarcel Moolenaar old = sc->sc_ttypend; 2788af03381SMarcel Moolenaar new = old | ipend; 2798af03381SMarcel Moolenaar } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 2808af03381SMarcel Moolenaar 2818af03381SMarcel Moolenaar if ((old & SER_INT_MASK) == 0) 2828af03381SMarcel Moolenaar swi_sched(sc->sc_softih, 0); 2838af03381SMarcel Moolenaar } 2848af03381SMarcel Moolenaar 2858af03381SMarcel Moolenaar /* 28627d5dc18SMarcel Moolenaar * A break condition has been detected. We treat the break condition as 28727d5dc18SMarcel Moolenaar * a special case that should not happen during normal operation. When 28827d5dc18SMarcel Moolenaar * the break condition is to be passed to higher levels in the form of 28927d5dc18SMarcel Moolenaar * a NUL character, we really want the break to be in the right place in 29027d5dc18SMarcel Moolenaar * the input stream. The overhead to achieve that is not in relation to 29127d5dc18SMarcel Moolenaar * the exceptional nature of the break condition, so we permit ourselves 29227d5dc18SMarcel Moolenaar * to be sloppy. 29327d5dc18SMarcel Moolenaar */ 2948af03381SMarcel Moolenaar static __inline int 2958af03381SMarcel Moolenaar uart_intr_break(void *arg) 29627d5dc18SMarcel Moolenaar { 2978af03381SMarcel Moolenaar struct uart_softc *sc = arg; 29827d5dc18SMarcel Moolenaar 2994cf75455SRobert Watson #if defined(KDB) 30027d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 3014cf75455SRobert Watson if (kdb_break()) 3028af03381SMarcel Moolenaar return (0); 30327d5dc18SMarcel Moolenaar } 30427d5dc18SMarcel Moolenaar #endif 30527d5dc18SMarcel Moolenaar if (sc->sc_opened) 3068af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_BREAK); 3078af03381SMarcel Moolenaar return (0); 30827d5dc18SMarcel Moolenaar } 30927d5dc18SMarcel Moolenaar 31027d5dc18SMarcel Moolenaar /* 31127d5dc18SMarcel Moolenaar * Handle a receiver overrun situation. We lost at least 1 byte in the 31227d5dc18SMarcel Moolenaar * input stream and it's our job to contain the situation. We grab as 31327d5dc18SMarcel Moolenaar * much of the data we can, but otherwise flush the receiver FIFO to 31427d5dc18SMarcel Moolenaar * create some breathing room. The net effect is that we avoid the 31527d5dc18SMarcel Moolenaar * overrun condition to happen for the next X characters, where X is 316a164074fSEitan Adler * related to the FIFO size at the cost of losing data right away. 31727d5dc18SMarcel Moolenaar * So, instead of having multiple overrun interrupts in close proximity 31827d5dc18SMarcel Moolenaar * to each other and possibly pessimizing UART interrupt latency for 31927d5dc18SMarcel Moolenaar * other UARTs in a multiport configuration, we create a longer segment 32027d5dc18SMarcel Moolenaar * of missing characters by freeing up the FIFO. 32127d5dc18SMarcel Moolenaar * Each overrun condition is marked in the input buffer by a token. The 32227d5dc18SMarcel Moolenaar * token represents the loss of at least one, but possible more bytes in 32327d5dc18SMarcel Moolenaar * the input stream. 32427d5dc18SMarcel Moolenaar */ 3258af03381SMarcel Moolenaar static __inline int 3268af03381SMarcel Moolenaar uart_intr_overrun(void *arg) 32727d5dc18SMarcel Moolenaar { 3288af03381SMarcel Moolenaar struct uart_softc *sc = arg; 32927d5dc18SMarcel Moolenaar 33027d5dc18SMarcel Moolenaar if (sc->sc_opened) { 33127d5dc18SMarcel Moolenaar UART_RECEIVE(sc); 33227d5dc18SMarcel Moolenaar if (uart_rx_put(sc, UART_STAT_OVERRUN)) 33327d5dc18SMarcel Moolenaar sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 3348af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_RXREADY); 33527d5dc18SMarcel Moolenaar } 33627d5dc18SMarcel Moolenaar UART_FLUSH(sc, UART_FLUSH_RECEIVER); 3378af03381SMarcel Moolenaar return (0); 33827d5dc18SMarcel Moolenaar } 33927d5dc18SMarcel Moolenaar 34027d5dc18SMarcel Moolenaar /* 34127d5dc18SMarcel Moolenaar * Received data ready. 34227d5dc18SMarcel Moolenaar */ 3438af03381SMarcel Moolenaar static __inline int 3448af03381SMarcel Moolenaar uart_intr_rxready(void *arg) 34527d5dc18SMarcel Moolenaar { 3468af03381SMarcel Moolenaar struct uart_softc *sc = arg; 34727d5dc18SMarcel Moolenaar int rxp; 34827d5dc18SMarcel Moolenaar 34927d5dc18SMarcel Moolenaar rxp = sc->sc_rxput; 35027d5dc18SMarcel Moolenaar UART_RECEIVE(sc); 3514cf75455SRobert Watson #if defined(KDB) 35227d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 35327d5dc18SMarcel Moolenaar while (rxp != sc->sc_rxput) { 3544cf75455SRobert Watson kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk); 35527d5dc18SMarcel Moolenaar if (rxp == sc->sc_rxbufsz) 35627d5dc18SMarcel Moolenaar rxp = 0; 35727d5dc18SMarcel Moolenaar } 35827d5dc18SMarcel Moolenaar } 35927d5dc18SMarcel Moolenaar #endif 36027d5dc18SMarcel Moolenaar if (sc->sc_opened) 3618af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_RXREADY); 36227d5dc18SMarcel Moolenaar else 36327d5dc18SMarcel Moolenaar sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */ 3648af03381SMarcel Moolenaar return (1); 36527d5dc18SMarcel Moolenaar } 36627d5dc18SMarcel Moolenaar 36727d5dc18SMarcel Moolenaar /* 36827d5dc18SMarcel Moolenaar * Line or modem status change (OOB signalling). 36927d5dc18SMarcel Moolenaar * We pass the signals to the software interrupt handler for further 37027d5dc18SMarcel Moolenaar * processing. Note that we merge the delta bits, but set the state 371a164074fSEitan Adler * bits. This is to avoid losing state transitions due to having more 37227d5dc18SMarcel Moolenaar * than 1 hardware interrupt between software interrupts. 37327d5dc18SMarcel Moolenaar */ 3748af03381SMarcel Moolenaar static __inline int 3758af03381SMarcel Moolenaar uart_intr_sigchg(void *arg) 37627d5dc18SMarcel Moolenaar { 3778af03381SMarcel Moolenaar struct uart_softc *sc = arg; 378fdfbb3f5SIan Lepore int new, old, sig; 37927d5dc18SMarcel Moolenaar 38027d5dc18SMarcel Moolenaar sig = UART_GETSIG(sc); 3818194412bSMarcel Moolenaar 382fac6a198SIan Lepore /* 383fdfbb3f5SIan Lepore * Time pulse counting support, invoked whenever the PPS parameters are 384fdfbb3f5SIan Lepore * currently set to capture either edge of the signal. 385fac6a198SIan Lepore */ 3868194412bSMarcel Moolenaar if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) { 387fdfbb3f5SIan Lepore uart_pps_process(sc, sig); 3888194412bSMarcel Moolenaar } 3898194412bSMarcel Moolenaar 3908af03381SMarcel Moolenaar /* 3918af03381SMarcel Moolenaar * Keep track of signal changes, even when the device is not 3928af03381SMarcel Moolenaar * opened. This allows us to inform upper layers about a 3938af03381SMarcel Moolenaar * possible loss of DCD and thus the existence of a (possibly) 3948af03381SMarcel Moolenaar * different connection when we have DCD back, during the time 3958af03381SMarcel Moolenaar * that the device was closed. 3968af03381SMarcel Moolenaar */ 39727d5dc18SMarcel Moolenaar do { 39827d5dc18SMarcel Moolenaar old = sc->sc_ttypend; 399ea549414SMarcel Moolenaar new = old & ~SER_MASK_STATE; 4002d511805SMarcel Moolenaar new |= sig & SER_INT_SIGMASK; 40127d5dc18SMarcel Moolenaar } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 4028af03381SMarcel Moolenaar 4038af03381SMarcel Moolenaar if (sc->sc_opened) 4048af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_SIGCHG); 4058af03381SMarcel Moolenaar return (1); 40627d5dc18SMarcel Moolenaar } 40727d5dc18SMarcel Moolenaar 40827d5dc18SMarcel Moolenaar /* 40927d5dc18SMarcel Moolenaar * The transmitter can accept more data. 41027d5dc18SMarcel Moolenaar */ 4118af03381SMarcel Moolenaar static __inline int 4128af03381SMarcel Moolenaar uart_intr_txidle(void *arg) 41327d5dc18SMarcel Moolenaar { 4148af03381SMarcel Moolenaar struct uart_softc *sc = arg; 4158af03381SMarcel Moolenaar 41627d5dc18SMarcel Moolenaar if (sc->sc_txbusy) { 41727d5dc18SMarcel Moolenaar sc->sc_txbusy = 0; 4188af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_TXIDLE); 41927d5dc18SMarcel Moolenaar } 4208af03381SMarcel Moolenaar return (0); 42127d5dc18SMarcel Moolenaar } 42227d5dc18SMarcel Moolenaar 423ef544f63SPaolo Pisati static int 42427d5dc18SMarcel Moolenaar uart_intr(void *arg) 42527d5dc18SMarcel Moolenaar { 42627d5dc18SMarcel Moolenaar struct uart_softc *sc = arg; 42786fb5400SMarius Strobl int cnt, ipend, testintr; 42827d5dc18SMarcel Moolenaar 429eead2d55SMarcel Moolenaar if (sc->sc_leaving) 430eead2d55SMarcel Moolenaar return (FILTER_STRAY); 431eead2d55SMarcel Moolenaar 432eead2d55SMarcel Moolenaar cnt = 0; 43386fb5400SMarius Strobl testintr = sc->sc_testintr; 43486fb5400SMarius Strobl while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) { 435eead2d55SMarcel Moolenaar cnt++; 4362d511805SMarcel Moolenaar if (ipend & SER_INT_OVERRUN) 43727d5dc18SMarcel Moolenaar uart_intr_overrun(sc); 4382d511805SMarcel Moolenaar if (ipend & SER_INT_BREAK) 43927d5dc18SMarcel Moolenaar uart_intr_break(sc); 4402d511805SMarcel Moolenaar if (ipend & SER_INT_RXREADY) 44127d5dc18SMarcel Moolenaar uart_intr_rxready(sc); 4422d511805SMarcel Moolenaar if (ipend & SER_INT_SIGCHG) 44327d5dc18SMarcel Moolenaar uart_intr_sigchg(sc); 4442d511805SMarcel Moolenaar if (ipend & SER_INT_TXIDLE) 44527d5dc18SMarcel Moolenaar uart_intr_txidle(sc); 4468af03381SMarcel Moolenaar } 447332cda07SPeter Grehan 448332cda07SPeter Grehan if (sc->sc_polled) { 449332cda07SPeter Grehan callout_reset(&sc->sc_timer, hz / uart_poll_freq, 450332cda07SPeter Grehan (timeout_t *)uart_intr, sc); 451332cda07SPeter Grehan } 452332cda07SPeter Grehan 453eead2d55SMarcel Moolenaar return ((cnt == 0) ? FILTER_STRAY : 45486fb5400SMarius Strobl ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD : 45586fb5400SMarius Strobl FILTER_HANDLED)); 4568af03381SMarcel Moolenaar } 45727d5dc18SMarcel Moolenaar 4588af03381SMarcel Moolenaar serdev_intr_t * 4598af03381SMarcel Moolenaar uart_bus_ihand(device_t dev, int ipend) 4608af03381SMarcel Moolenaar { 4618af03381SMarcel Moolenaar 4628af03381SMarcel Moolenaar switch (ipend) { 4638af03381SMarcel Moolenaar case SER_INT_BREAK: 4648af03381SMarcel Moolenaar return (uart_intr_break); 4658af03381SMarcel Moolenaar case SER_INT_OVERRUN: 4668af03381SMarcel Moolenaar return (uart_intr_overrun); 4678af03381SMarcel Moolenaar case SER_INT_RXREADY: 4688af03381SMarcel Moolenaar return (uart_intr_rxready); 4698af03381SMarcel Moolenaar case SER_INT_SIGCHG: 4708af03381SMarcel Moolenaar return (uart_intr_sigchg); 4718af03381SMarcel Moolenaar case SER_INT_TXIDLE: 4728af03381SMarcel Moolenaar return (uart_intr_txidle); 4738af03381SMarcel Moolenaar } 4748af03381SMarcel Moolenaar return (NULL); 4758af03381SMarcel Moolenaar } 4768af03381SMarcel Moolenaar 4778af03381SMarcel Moolenaar int 478a31f91a0SMarcel Moolenaar uart_bus_ipend(device_t dev) 479a31f91a0SMarcel Moolenaar { 480a31f91a0SMarcel Moolenaar struct uart_softc *sc; 481a31f91a0SMarcel Moolenaar 482a31f91a0SMarcel Moolenaar sc = device_get_softc(dev); 483a31f91a0SMarcel Moolenaar return (UART_IPEND(sc)); 484a31f91a0SMarcel Moolenaar } 485a31f91a0SMarcel Moolenaar 486a31f91a0SMarcel Moolenaar int 4878af03381SMarcel Moolenaar uart_bus_sysdev(device_t dev) 4888af03381SMarcel Moolenaar { 4898af03381SMarcel Moolenaar struct uart_softc *sc; 4908af03381SMarcel Moolenaar 4918af03381SMarcel Moolenaar sc = device_get_softc(dev); 4928af03381SMarcel Moolenaar return ((sc->sc_sysdev != NULL) ? 1 : 0); 49327d5dc18SMarcel Moolenaar } 49427d5dc18SMarcel Moolenaar 49527d5dc18SMarcel Moolenaar int 496c214a270SRuslan Bukin uart_bus_probe(device_t dev, int regshft, int regiowidth, int rclk, int rid, int chan) 49727d5dc18SMarcel Moolenaar { 49827d5dc18SMarcel Moolenaar struct uart_softc *sc; 49927d5dc18SMarcel Moolenaar struct uart_devinfo *sysdev; 50027d5dc18SMarcel Moolenaar int error; 50127d5dc18SMarcel Moolenaar 502f8100ce2SMarcel Moolenaar sc = device_get_softc(dev); 503f8100ce2SMarcel Moolenaar 504f8100ce2SMarcel Moolenaar /* 505f8100ce2SMarcel Moolenaar * All uart_class references are weak. Check that the needed 506f8100ce2SMarcel Moolenaar * class has been compiled-in. Fail if not. 507f8100ce2SMarcel Moolenaar */ 508f8100ce2SMarcel Moolenaar if (sc->sc_class == NULL) 509f8100ce2SMarcel Moolenaar return (ENXIO); 510f8100ce2SMarcel Moolenaar 51127d5dc18SMarcel Moolenaar /* 51227d5dc18SMarcel Moolenaar * Initialize the instance. Note that the instance (=softc) does 51327d5dc18SMarcel Moolenaar * not necessarily match the hardware specific softc. We can't do 51427d5dc18SMarcel Moolenaar * anything about it now, because we may not attach to the device. 51527d5dc18SMarcel Moolenaar * Hardware drivers cannot use any of the class specific fields 51627d5dc18SMarcel Moolenaar * while probing. 51727d5dc18SMarcel Moolenaar */ 51827d5dc18SMarcel Moolenaar kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class); 51927d5dc18SMarcel Moolenaar sc->sc_dev = dev; 52027d5dc18SMarcel Moolenaar if (device_get_desc(dev) == NULL) 521f8100ce2SMarcel Moolenaar device_set_desc(dev, uart_getname(sc->sc_class)); 52227d5dc18SMarcel Moolenaar 52327d5dc18SMarcel Moolenaar /* 52427d5dc18SMarcel Moolenaar * Allocate the register resource. We assume that all UARTs have 52527d5dc18SMarcel Moolenaar * a single register window in either I/O port space or memory 52627d5dc18SMarcel Moolenaar * mapped I/O space. Any UART that needs multiple windows will 52727d5dc18SMarcel Moolenaar * consequently not be supported by this driver as-is. We try I/O 52827d5dc18SMarcel Moolenaar * port space first because that's the common case. 52927d5dc18SMarcel Moolenaar */ 53027d5dc18SMarcel Moolenaar sc->sc_rrid = rid; 53127d5dc18SMarcel Moolenaar sc->sc_rtype = SYS_RES_IOPORT; 5329def69ecSMarcel Moolenaar sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid, 5339def69ecSMarcel Moolenaar RF_ACTIVE); 53427d5dc18SMarcel Moolenaar if (sc->sc_rres == NULL) { 53527d5dc18SMarcel Moolenaar sc->sc_rrid = rid; 53627d5dc18SMarcel Moolenaar sc->sc_rtype = SYS_RES_MEMORY; 5379def69ecSMarcel Moolenaar sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, 5389def69ecSMarcel Moolenaar &sc->sc_rrid, RF_ACTIVE); 53927d5dc18SMarcel Moolenaar if (sc->sc_rres == NULL) 54027d5dc18SMarcel Moolenaar return (ENXIO); 54127d5dc18SMarcel Moolenaar } 54227d5dc18SMarcel Moolenaar 54327d5dc18SMarcel Moolenaar /* 54427d5dc18SMarcel Moolenaar * Fill in the bus access structure and compare this device with 54527d5dc18SMarcel Moolenaar * a possible console device and/or a debug port. We set the flags 54627d5dc18SMarcel Moolenaar * in the softc so that the hardware dependent probe can adjust 54727d5dc18SMarcel Moolenaar * accordingly. In general, you don't want to permanently disrupt 54827d5dc18SMarcel Moolenaar * console I/O. 54927d5dc18SMarcel Moolenaar */ 55027d5dc18SMarcel Moolenaar sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 55127d5dc18SMarcel Moolenaar sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 552875f70dbSMarcel Moolenaar sc->sc_bas.chan = chan; 55327d5dc18SMarcel Moolenaar sc->sc_bas.regshft = regshft; 554c214a270SRuslan Bukin sc->sc_bas.regiowidth = regiowidth; 55527d5dc18SMarcel Moolenaar sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; 55627d5dc18SMarcel Moolenaar 55727d5dc18SMarcel Moolenaar SLIST_FOREACH(sysdev, &uart_sysdevs, next) { 558875f70dbSMarcel Moolenaar if (chan == sysdev->bas.chan && 559875f70dbSMarcel Moolenaar uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) { 56027d5dc18SMarcel Moolenaar /* XXX check if ops matches class. */ 56127d5dc18SMarcel Moolenaar sc->sc_sysdev = sysdev; 5621c5e367bSMarcel Moolenaar sysdev->bas.rclk = sc->sc_bas.rclk; 56327d5dc18SMarcel Moolenaar } 56427d5dc18SMarcel Moolenaar } 56527d5dc18SMarcel Moolenaar 56627d5dc18SMarcel Moolenaar error = UART_PROBE(sc); 56727d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 568b923a710SMarcel Moolenaar return ((error) ? error : BUS_PROBE_DEFAULT); 56927d5dc18SMarcel Moolenaar } 57027d5dc18SMarcel Moolenaar 57127d5dc18SMarcel Moolenaar int 57227d5dc18SMarcel Moolenaar uart_bus_attach(device_t dev) 57327d5dc18SMarcel Moolenaar { 57427d5dc18SMarcel Moolenaar struct uart_softc *sc, *sc0; 57527d5dc18SMarcel Moolenaar const char *sep; 576eead2d55SMarcel Moolenaar int error, filt; 57727d5dc18SMarcel Moolenaar 57827d5dc18SMarcel Moolenaar /* 57927d5dc18SMarcel Moolenaar * The sc_class field defines the type of UART we're going to work 58027d5dc18SMarcel Moolenaar * with and thus the size of the softc. Replace the generic softc 58127d5dc18SMarcel Moolenaar * with one that matches the UART now that we're certain we handle 58227d5dc18SMarcel Moolenaar * the device. 58327d5dc18SMarcel Moolenaar */ 58427d5dc18SMarcel Moolenaar sc0 = device_get_softc(dev); 5855515b0cbSRuslan Bukin if (sc0->sc_class->size > device_get_driver(dev)->size) { 58627d5dc18SMarcel Moolenaar sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO); 58727d5dc18SMarcel Moolenaar bcopy(sc0, sc, sizeof(*sc)); 58827d5dc18SMarcel Moolenaar device_set_softc(dev, sc); 58927d5dc18SMarcel Moolenaar } else 59027d5dc18SMarcel Moolenaar sc = sc0; 59127d5dc18SMarcel Moolenaar 59227d5dc18SMarcel Moolenaar /* 593d76a1ef4SWarner Losh * Now that we know the softc for this device, connect the back 594d76a1ef4SWarner Losh * pointer from the sysdev for this device, if any 595d76a1ef4SWarner Losh */ 596d76a1ef4SWarner Losh if (sc->sc_sysdev != NULL) 597d76a1ef4SWarner Losh sc->sc_sysdev->sc = sc; 598d76a1ef4SWarner Losh 599d76a1ef4SWarner Losh /* 60027d5dc18SMarcel Moolenaar * Protect ourselves against interrupts while we're not completely 60127d5dc18SMarcel Moolenaar * finished attaching and initializing. We don't expect interrupts 60286fb5400SMarius Strobl * until after UART_ATTACH(), though. 60327d5dc18SMarcel Moolenaar */ 60427d5dc18SMarcel Moolenaar sc->sc_leaving = 1; 60527d5dc18SMarcel Moolenaar 6068af03381SMarcel Moolenaar mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN); 6078af03381SMarcel Moolenaar if (sc->sc_hwmtx == NULL) 6088af03381SMarcel Moolenaar sc->sc_hwmtx = &sc->sc_hwmtx_s; 60906287620SMarcel Moolenaar 61027d5dc18SMarcel Moolenaar /* 61127d5dc18SMarcel Moolenaar * Re-allocate. We expect that the softc contains the information 61227d5dc18SMarcel Moolenaar * collected by uart_bus_probe() intact. 61327d5dc18SMarcel Moolenaar */ 6149def69ecSMarcel Moolenaar sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid, 6159def69ecSMarcel Moolenaar RF_ACTIVE); 6162682e7b6SMarius Strobl if (sc->sc_rres == NULL) { 6178af03381SMarcel Moolenaar mtx_destroy(&sc->sc_hwmtx_s); 61827d5dc18SMarcel Moolenaar return (ENXIO); 6192682e7b6SMarius Strobl } 620b8759afcSYoshihiro Takahashi sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 621b8759afcSYoshihiro Takahashi sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 622b8759afcSYoshihiro Takahashi 6233ad36a41SIan Lepore /* 6243ad36a41SIan Lepore * Ensure there is room for at least three full FIFOs of data in the 6253ad36a41SIan Lepore * receive buffer (handles the case of low-level drivers with huge 6263ad36a41SIan Lepore * FIFOs), and also ensure that there is no less than the historical 6273ad36a41SIan Lepore * size of 384 bytes (handles the typical small-FIFO case). 6283ad36a41SIan Lepore */ 6293ad36a41SIan Lepore sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3); 63027d5dc18SMarcel Moolenaar sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf), 63127d5dc18SMarcel Moolenaar M_UART, M_WAITOK); 63227d5dc18SMarcel Moolenaar sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf), 63327d5dc18SMarcel Moolenaar M_UART, M_WAITOK); 63427d5dc18SMarcel Moolenaar 63527d5dc18SMarcel Moolenaar error = UART_ATTACH(sc); 63627d5dc18SMarcel Moolenaar if (error) 63727d5dc18SMarcel Moolenaar goto fail; 63827d5dc18SMarcel Moolenaar 63927d5dc18SMarcel Moolenaar if (sc->sc_hwiflow || sc->sc_hwoflow) { 64027d5dc18SMarcel Moolenaar sep = ""; 64127d5dc18SMarcel Moolenaar device_print_prettyname(dev); 64227d5dc18SMarcel Moolenaar if (sc->sc_hwiflow) { 64327d5dc18SMarcel Moolenaar printf("%sRTS iflow", sep); 64427d5dc18SMarcel Moolenaar sep = ", "; 64527d5dc18SMarcel Moolenaar } 64627d5dc18SMarcel Moolenaar if (sc->sc_hwoflow) { 64727d5dc18SMarcel Moolenaar printf("%sCTS oflow", sep); 64827d5dc18SMarcel Moolenaar sep = ", "; 64927d5dc18SMarcel Moolenaar } 65027d5dc18SMarcel Moolenaar printf("\n"); 65127d5dc18SMarcel Moolenaar } 65227d5dc18SMarcel Moolenaar 65327d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL) { 6545dceed8aSWarner Losh if (sc->sc_sysdev->baudrate == 0) { 65554e2bcc7SMarcel Moolenaar if (UART_IOCTL(sc, UART_IOCTL_BAUD, 65654e2bcc7SMarcel Moolenaar (intptr_t)&sc->sc_sysdev->baudrate) != 0) 65754e2bcc7SMarcel Moolenaar sc->sc_sysdev->baudrate = -1; 65854e2bcc7SMarcel Moolenaar } 65927d5dc18SMarcel Moolenaar switch (sc->sc_sysdev->type) { 66027d5dc18SMarcel Moolenaar case UART_DEV_CONSOLE: 66127d5dc18SMarcel Moolenaar device_printf(dev, "console"); 66227d5dc18SMarcel Moolenaar break; 66327d5dc18SMarcel Moolenaar case UART_DEV_DBGPORT: 66427d5dc18SMarcel Moolenaar device_printf(dev, "debug port"); 66527d5dc18SMarcel Moolenaar break; 66627d5dc18SMarcel Moolenaar case UART_DEV_KEYBOARD: 66727d5dc18SMarcel Moolenaar device_printf(dev, "keyboard"); 66827d5dc18SMarcel Moolenaar break; 66927d5dc18SMarcel Moolenaar default: 67027d5dc18SMarcel Moolenaar device_printf(dev, "unknown system device"); 67127d5dc18SMarcel Moolenaar break; 67227d5dc18SMarcel Moolenaar } 67327d5dc18SMarcel Moolenaar printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate, 67427d5dc18SMarcel Moolenaar "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits, 67527d5dc18SMarcel Moolenaar sc->sc_sysdev->stopbits); 67627d5dc18SMarcel Moolenaar } 67727d5dc18SMarcel Moolenaar 678eead2d55SMarcel Moolenaar sc->sc_leaving = 0; 67986fb5400SMarius Strobl sc->sc_testintr = 1; 680eead2d55SMarcel Moolenaar filt = uart_intr(sc); 68186fb5400SMarius Strobl sc->sc_testintr = 0; 682eead2d55SMarcel Moolenaar 683eead2d55SMarcel Moolenaar /* 684eead2d55SMarcel Moolenaar * Don't use interrupts if we couldn't clear any pending interrupt 685eead2d55SMarcel Moolenaar * conditions. We may have broken H/W and polling is probably the 686eead2d55SMarcel Moolenaar * safest thing to do. 687eead2d55SMarcel Moolenaar */ 68862145ff3SNeel Natu if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) { 689eead2d55SMarcel Moolenaar sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, 690eead2d55SMarcel Moolenaar &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE); 691eead2d55SMarcel Moolenaar } 692eead2d55SMarcel Moolenaar if (sc->sc_ires != NULL) { 693eead2d55SMarcel Moolenaar error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY, 694eead2d55SMarcel Moolenaar uart_intr, NULL, sc, &sc->sc_icookie); 695eead2d55SMarcel Moolenaar sc->sc_fastintr = (error == 0) ? 1 : 0; 696eead2d55SMarcel Moolenaar 697eead2d55SMarcel Moolenaar if (!sc->sc_fastintr) 698eead2d55SMarcel Moolenaar error = bus_setup_intr(dev, sc->sc_ires, 699eead2d55SMarcel Moolenaar INTR_TYPE_TTY | INTR_MPSAFE, NULL, 700eead2d55SMarcel Moolenaar (driver_intr_t *)uart_intr, sc, &sc->sc_icookie); 701eead2d55SMarcel Moolenaar 702eead2d55SMarcel Moolenaar if (error) { 703eead2d55SMarcel Moolenaar device_printf(dev, "could not activate interrupt\n"); 704eead2d55SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 705eead2d55SMarcel Moolenaar sc->sc_ires); 706eead2d55SMarcel Moolenaar sc->sc_ires = NULL; 707eead2d55SMarcel Moolenaar } 708eead2d55SMarcel Moolenaar } 709eead2d55SMarcel Moolenaar if (sc->sc_ires == NULL) { 710eead2d55SMarcel Moolenaar /* No interrupt resource. Force polled mode. */ 711eead2d55SMarcel Moolenaar sc->sc_polled = 1; 712eead2d55SMarcel Moolenaar callout_init(&sc->sc_timer, 1); 71362145ff3SNeel Natu callout_reset(&sc->sc_timer, hz / uart_poll_freq, 71462145ff3SNeel Natu (timeout_t *)uart_intr, sc); 715eead2d55SMarcel Moolenaar } 716eead2d55SMarcel Moolenaar 717eead2d55SMarcel Moolenaar if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) { 718eead2d55SMarcel Moolenaar sep = ""; 719eead2d55SMarcel Moolenaar device_print_prettyname(dev); 720eead2d55SMarcel Moolenaar if (sc->sc_fastintr) { 721eead2d55SMarcel Moolenaar printf("%sfast interrupt", sep); 722eead2d55SMarcel Moolenaar sep = ", "; 723eead2d55SMarcel Moolenaar } 724eead2d55SMarcel Moolenaar if (sc->sc_polled) { 7251662b008SIan Lepore printf("%spolled mode (%dHz)", sep, uart_poll_freq); 726eead2d55SMarcel Moolenaar sep = ", "; 727eead2d55SMarcel Moolenaar } 728eead2d55SMarcel Moolenaar printf("\n"); 729eead2d55SMarcel Moolenaar } 730eead2d55SMarcel Moolenaar 731b59236ceSIan Lepore if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) { 732b59236ceSIan Lepore if ((error = sc->sc_sysdev->attach(sc)) != 0) 73327d5dc18SMarcel Moolenaar goto fail; 734b59236ceSIan Lepore } else { 735b59236ceSIan Lepore if ((error = uart_tty_attach(sc)) != 0) 736b59236ceSIan Lepore goto fail; 737196d3019SIan Lepore uart_pps_init(sc); 738b59236ceSIan Lepore } 73927d5dc18SMarcel Moolenaar 7408af03381SMarcel Moolenaar if (sc->sc_sysdev != NULL) 7418af03381SMarcel Moolenaar sc->sc_sysdev->hwmtx = sc->sc_hwmtx; 7428af03381SMarcel Moolenaar 74327d5dc18SMarcel Moolenaar return (0); 74427d5dc18SMarcel Moolenaar 74527d5dc18SMarcel Moolenaar fail: 74627d5dc18SMarcel Moolenaar free(sc->sc_txbuf, M_UART); 74727d5dc18SMarcel Moolenaar free(sc->sc_rxbuf, M_UART); 74827d5dc18SMarcel Moolenaar 74927d5dc18SMarcel Moolenaar if (sc->sc_ires != NULL) { 75027d5dc18SMarcel Moolenaar bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 75127d5dc18SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 75227d5dc18SMarcel Moolenaar sc->sc_ires); 75327d5dc18SMarcel Moolenaar } 75427d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 75527d5dc18SMarcel Moolenaar 7568af03381SMarcel Moolenaar mtx_destroy(&sc->sc_hwmtx_s); 7572682e7b6SMarius Strobl 75827d5dc18SMarcel Moolenaar return (error); 75927d5dc18SMarcel Moolenaar } 76027d5dc18SMarcel Moolenaar 76127d5dc18SMarcel Moolenaar int 76227d5dc18SMarcel Moolenaar uart_bus_detach(device_t dev) 76327d5dc18SMarcel Moolenaar { 76427d5dc18SMarcel Moolenaar struct uart_softc *sc; 76527d5dc18SMarcel Moolenaar 76627d5dc18SMarcel Moolenaar sc = device_get_softc(dev); 76727d5dc18SMarcel Moolenaar 76827d5dc18SMarcel Moolenaar sc->sc_leaving = 1; 76927d5dc18SMarcel Moolenaar 7708af03381SMarcel Moolenaar if (sc->sc_sysdev != NULL) 7718af03381SMarcel Moolenaar sc->sc_sysdev->hwmtx = NULL; 7728af03381SMarcel Moolenaar 77327d5dc18SMarcel Moolenaar UART_DETACH(sc); 77427d5dc18SMarcel Moolenaar 77527d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL) 77627d5dc18SMarcel Moolenaar (*sc->sc_sysdev->detach)(sc); 77727d5dc18SMarcel Moolenaar else 77827d5dc18SMarcel Moolenaar uart_tty_detach(sc); 77927d5dc18SMarcel Moolenaar 78027d5dc18SMarcel Moolenaar free(sc->sc_txbuf, M_UART); 78127d5dc18SMarcel Moolenaar free(sc->sc_rxbuf, M_UART); 78227d5dc18SMarcel Moolenaar 78327d5dc18SMarcel Moolenaar if (sc->sc_ires != NULL) { 78427d5dc18SMarcel Moolenaar bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 78527d5dc18SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 78627d5dc18SMarcel Moolenaar sc->sc_ires); 78727d5dc18SMarcel Moolenaar } 78827d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 78927d5dc18SMarcel Moolenaar 7908af03381SMarcel Moolenaar mtx_destroy(&sc->sc_hwmtx_s); 7912682e7b6SMarius Strobl 7925515b0cbSRuslan Bukin if (sc->sc_class->size > device_get_driver(dev)->size) { 79327d5dc18SMarcel Moolenaar device_set_softc(dev, NULL); 79427d5dc18SMarcel Moolenaar free(sc, M_UART); 7955515b0cbSRuslan Bukin } 79627d5dc18SMarcel Moolenaar 79727d5dc18SMarcel Moolenaar return (0); 79827d5dc18SMarcel Moolenaar } 7995b23b1b9SAndriy Gapon 8005b23b1b9SAndriy Gapon int 8015b23b1b9SAndriy Gapon uart_bus_resume(device_t dev) 8025b23b1b9SAndriy Gapon { 8035b23b1b9SAndriy Gapon struct uart_softc *sc; 8045b23b1b9SAndriy Gapon 8055b23b1b9SAndriy Gapon sc = device_get_softc(dev); 8065b23b1b9SAndriy Gapon return (UART_ATTACH(sc)); 8075b23b1b9SAndriy Gapon } 808d76a1ef4SWarner Losh 809d76a1ef4SWarner Losh void 810d76a1ef4SWarner Losh uart_grab(struct uart_devinfo *di) 811d76a1ef4SWarner Losh { 812d76a1ef4SWarner Losh 813d76a1ef4SWarner Losh if (di->sc) 814d76a1ef4SWarner Losh UART_GRAB(di->sc); 815d76a1ef4SWarner Losh } 816d76a1ef4SWarner Losh 817d76a1ef4SWarner Losh void 818d76a1ef4SWarner Losh uart_ungrab(struct uart_devinfo *di) 819d76a1ef4SWarner Losh { 820d76a1ef4SWarner Losh 821d76a1ef4SWarner Losh if (di->sc) 822d76a1ef4SWarner Losh UART_UNGRAB(di->sc); 823d76a1ef4SWarner Losh } 824