xref: /freebsd-13.1/sys/dev/uart/uart_core.c (revision 332cda07)
1098ca2bdSWarner Losh /*-
227d5dc18SMarcel Moolenaar  * Copyright (c) 2003 Marcel Moolenaar
327d5dc18SMarcel Moolenaar  * All rights reserved.
427d5dc18SMarcel Moolenaar  *
527d5dc18SMarcel Moolenaar  * Redistribution and use in source and binary forms, with or without
627d5dc18SMarcel Moolenaar  * modification, are permitted provided that the following conditions
727d5dc18SMarcel Moolenaar  * are met:
827d5dc18SMarcel Moolenaar  *
927d5dc18SMarcel Moolenaar  * 1. Redistributions of source code must retain the above copyright
1027d5dc18SMarcel Moolenaar  *    notice, this list of conditions and the following disclaimer.
1127d5dc18SMarcel Moolenaar  * 2. Redistributions in binary form must reproduce the above copyright
1227d5dc18SMarcel Moolenaar  *    notice, this list of conditions and the following disclaimer in the
1327d5dc18SMarcel Moolenaar  *    documentation and/or other materials provided with the distribution.
1427d5dc18SMarcel Moolenaar  *
1527d5dc18SMarcel Moolenaar  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1627d5dc18SMarcel Moolenaar  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1727d5dc18SMarcel Moolenaar  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1827d5dc18SMarcel Moolenaar  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1927d5dc18SMarcel Moolenaar  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2027d5dc18SMarcel Moolenaar  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2127d5dc18SMarcel Moolenaar  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2227d5dc18SMarcel Moolenaar  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2327d5dc18SMarcel Moolenaar  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2427d5dc18SMarcel Moolenaar  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2527d5dc18SMarcel Moolenaar  */
2627d5dc18SMarcel Moolenaar 
2727d5dc18SMarcel Moolenaar #include <sys/cdefs.h>
2827d5dc18SMarcel Moolenaar __FBSDID("$FreeBSD$");
2927d5dc18SMarcel Moolenaar 
3027d5dc18SMarcel Moolenaar #include <sys/param.h>
3127d5dc18SMarcel Moolenaar #include <sys/systm.h>
3227d5dc18SMarcel Moolenaar #include <sys/bus.h>
3327d5dc18SMarcel Moolenaar #include <sys/conf.h>
3427d5dc18SMarcel Moolenaar #include <sys/cons.h>
3527d5dc18SMarcel Moolenaar #include <sys/fcntl.h>
3627d5dc18SMarcel Moolenaar #include <sys/interrupt.h>
37591bc192SMarcel Moolenaar #include <sys/kdb.h>
3827d5dc18SMarcel Moolenaar #include <sys/kernel.h>
3927d5dc18SMarcel Moolenaar #include <sys/malloc.h>
4027d5dc18SMarcel Moolenaar #include <sys/queue.h>
4127d5dc18SMarcel Moolenaar #include <sys/reboot.h>
4227d5dc18SMarcel Moolenaar #include <machine/bus.h>
4327d5dc18SMarcel Moolenaar #include <sys/rman.h>
4427d5dc18SMarcel Moolenaar #include <machine/resource.h>
4527d5dc18SMarcel Moolenaar #include <machine/stdarg.h>
4627d5dc18SMarcel Moolenaar 
4727d5dc18SMarcel Moolenaar #include <dev/uart/uart.h>
4827d5dc18SMarcel Moolenaar #include <dev/uart/uart_bus.h>
4927d5dc18SMarcel Moolenaar #include <dev/uart/uart_cpu.h>
5027d5dc18SMarcel Moolenaar 
5127d5dc18SMarcel Moolenaar #include "uart_if.h"
5227d5dc18SMarcel Moolenaar 
5327d5dc18SMarcel Moolenaar devclass_t uart_devclass;
5427d5dc18SMarcel Moolenaar char uart_driver_name[] = "uart";
5527d5dc18SMarcel Moolenaar 
5627d5dc18SMarcel Moolenaar SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
5727d5dc18SMarcel Moolenaar     SLIST_HEAD_INITIALIZER(uart_sysdevs);
5827d5dc18SMarcel Moolenaar 
59d745c852SEd Schouten static MALLOC_DEFINE(M_UART, "UART", "UART driver");
6027d5dc18SMarcel Moolenaar 
61*332cda07SPeter Grehan #ifndef	UART_POLL_FREQ
62*332cda07SPeter Grehan #define	UART_POLL_FREQ		50
63*332cda07SPeter Grehan #endif
64*332cda07SPeter Grehan static int uart_poll_freq = UART_POLL_FREQ;
65*332cda07SPeter Grehan TUNABLE_INT("debug.uart_poll_freq", &uart_poll_freq);
66*332cda07SPeter Grehan 
6727d5dc18SMarcel Moolenaar void
6827d5dc18SMarcel Moolenaar uart_add_sysdev(struct uart_devinfo *di)
6927d5dc18SMarcel Moolenaar {
7027d5dc18SMarcel Moolenaar 	SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
7127d5dc18SMarcel Moolenaar }
7227d5dc18SMarcel Moolenaar 
73f8100ce2SMarcel Moolenaar const char *
74f8100ce2SMarcel Moolenaar uart_getname(struct uart_class *uc)
75f8100ce2SMarcel Moolenaar {
76f8100ce2SMarcel Moolenaar 	return ((uc != NULL) ? uc->name : NULL);
77f8100ce2SMarcel Moolenaar }
78f8100ce2SMarcel Moolenaar 
79f8100ce2SMarcel Moolenaar struct uart_ops *
80f8100ce2SMarcel Moolenaar uart_getops(struct uart_class *uc)
81f8100ce2SMarcel Moolenaar {
82f8100ce2SMarcel Moolenaar 	return ((uc != NULL) ? uc->uc_ops : NULL);
83f8100ce2SMarcel Moolenaar }
84f8100ce2SMarcel Moolenaar 
85f8100ce2SMarcel Moolenaar int
86f8100ce2SMarcel Moolenaar uart_getrange(struct uart_class *uc)
87f8100ce2SMarcel Moolenaar {
88f8100ce2SMarcel Moolenaar 	return ((uc != NULL) ? uc->uc_range : 0);
89f8100ce2SMarcel Moolenaar }
90f8100ce2SMarcel Moolenaar 
9127d5dc18SMarcel Moolenaar /*
928af03381SMarcel Moolenaar  * Schedule a soft interrupt. We do this on the 0 to !0 transition
938af03381SMarcel Moolenaar  * of the TTY pending interrupt status.
948af03381SMarcel Moolenaar  */
950acb3c4aSMarcel Moolenaar void
968af03381SMarcel Moolenaar uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
978af03381SMarcel Moolenaar {
988af03381SMarcel Moolenaar 	uint32_t new, old;
998af03381SMarcel Moolenaar 
1008af03381SMarcel Moolenaar 	do {
1018af03381SMarcel Moolenaar 		old = sc->sc_ttypend;
1028af03381SMarcel Moolenaar 		new = old | ipend;
1038af03381SMarcel Moolenaar 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
1048af03381SMarcel Moolenaar 
1058af03381SMarcel Moolenaar 	if ((old & SER_INT_MASK) == 0)
1068af03381SMarcel Moolenaar 		swi_sched(sc->sc_softih, 0);
1078af03381SMarcel Moolenaar }
1088af03381SMarcel Moolenaar 
1098af03381SMarcel Moolenaar /*
11027d5dc18SMarcel Moolenaar  * A break condition has been detected. We treat the break condition as
11127d5dc18SMarcel Moolenaar  * a special case that should not happen during normal operation. When
11227d5dc18SMarcel Moolenaar  * the break condition is to be passed to higher levels in the form of
11327d5dc18SMarcel Moolenaar  * a NUL character, we really want the break to be in the right place in
11427d5dc18SMarcel Moolenaar  * the input stream. The overhead to achieve that is not in relation to
11527d5dc18SMarcel Moolenaar  * the exceptional nature of the break condition, so we permit ourselves
11627d5dc18SMarcel Moolenaar  * to be sloppy.
11727d5dc18SMarcel Moolenaar  */
1188af03381SMarcel Moolenaar static __inline int
1198af03381SMarcel Moolenaar uart_intr_break(void *arg)
12027d5dc18SMarcel Moolenaar {
1218af03381SMarcel Moolenaar 	struct uart_softc *sc = arg;
12227d5dc18SMarcel Moolenaar 
1234cf75455SRobert Watson #if defined(KDB)
12427d5dc18SMarcel Moolenaar 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
1254cf75455SRobert Watson 		if (kdb_break())
1268af03381SMarcel Moolenaar 			return (0);
12727d5dc18SMarcel Moolenaar 	}
12827d5dc18SMarcel Moolenaar #endif
12927d5dc18SMarcel Moolenaar 	if (sc->sc_opened)
1308af03381SMarcel Moolenaar 		uart_sched_softih(sc, SER_INT_BREAK);
1318af03381SMarcel Moolenaar 	return (0);
13227d5dc18SMarcel Moolenaar }
13327d5dc18SMarcel Moolenaar 
13427d5dc18SMarcel Moolenaar /*
13527d5dc18SMarcel Moolenaar  * Handle a receiver overrun situation. We lost at least 1 byte in the
13627d5dc18SMarcel Moolenaar  * input stream and it's our job to contain the situation. We grab as
13727d5dc18SMarcel Moolenaar  * much of the data we can, but otherwise flush the receiver FIFO to
13827d5dc18SMarcel Moolenaar  * create some breathing room. The net effect is that we avoid the
13927d5dc18SMarcel Moolenaar  * overrun condition to happen for the next X characters, where X is
14027d5dc18SMarcel Moolenaar  * related to the FIFO size at the cost of loosing data right away.
14127d5dc18SMarcel Moolenaar  * So, instead of having multiple overrun interrupts in close proximity
14227d5dc18SMarcel Moolenaar  * to each other and possibly pessimizing UART interrupt latency for
14327d5dc18SMarcel Moolenaar  * other UARTs in a multiport configuration, we create a longer segment
14427d5dc18SMarcel Moolenaar  * of missing characters by freeing up the FIFO.
14527d5dc18SMarcel Moolenaar  * Each overrun condition is marked in the input buffer by a token. The
14627d5dc18SMarcel Moolenaar  * token represents the loss of at least one, but possible more bytes in
14727d5dc18SMarcel Moolenaar  * the input stream.
14827d5dc18SMarcel Moolenaar  */
1498af03381SMarcel Moolenaar static __inline int
1508af03381SMarcel Moolenaar uart_intr_overrun(void *arg)
15127d5dc18SMarcel Moolenaar {
1528af03381SMarcel Moolenaar 	struct uart_softc *sc = arg;
15327d5dc18SMarcel Moolenaar 
15427d5dc18SMarcel Moolenaar 	if (sc->sc_opened) {
15527d5dc18SMarcel Moolenaar 		UART_RECEIVE(sc);
15627d5dc18SMarcel Moolenaar 		if (uart_rx_put(sc, UART_STAT_OVERRUN))
15727d5dc18SMarcel Moolenaar 			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
1588af03381SMarcel Moolenaar 		uart_sched_softih(sc, SER_INT_RXREADY);
15927d5dc18SMarcel Moolenaar 	}
16027d5dc18SMarcel Moolenaar 	UART_FLUSH(sc, UART_FLUSH_RECEIVER);
1618af03381SMarcel Moolenaar 	return (0);
16227d5dc18SMarcel Moolenaar }
16327d5dc18SMarcel Moolenaar 
16427d5dc18SMarcel Moolenaar /*
16527d5dc18SMarcel Moolenaar  * Received data ready.
16627d5dc18SMarcel Moolenaar  */
1678af03381SMarcel Moolenaar static __inline int
1688af03381SMarcel Moolenaar uart_intr_rxready(void *arg)
16927d5dc18SMarcel Moolenaar {
1708af03381SMarcel Moolenaar 	struct uart_softc *sc = arg;
17127d5dc18SMarcel Moolenaar 	int rxp;
17227d5dc18SMarcel Moolenaar 
17327d5dc18SMarcel Moolenaar 	rxp = sc->sc_rxput;
17427d5dc18SMarcel Moolenaar 	UART_RECEIVE(sc);
1754cf75455SRobert Watson #if defined(KDB)
17627d5dc18SMarcel Moolenaar 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
17727d5dc18SMarcel Moolenaar 		while (rxp != sc->sc_rxput) {
1784cf75455SRobert Watson 			kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk);
17927d5dc18SMarcel Moolenaar 			if (rxp == sc->sc_rxbufsz)
18027d5dc18SMarcel Moolenaar 				rxp = 0;
18127d5dc18SMarcel Moolenaar 		}
18227d5dc18SMarcel Moolenaar 	}
18327d5dc18SMarcel Moolenaar #endif
18427d5dc18SMarcel Moolenaar 	if (sc->sc_opened)
1858af03381SMarcel Moolenaar 		uart_sched_softih(sc, SER_INT_RXREADY);
18627d5dc18SMarcel Moolenaar 	else
18727d5dc18SMarcel Moolenaar 		sc->sc_rxput = sc->sc_rxget;	/* Ignore received data. */
1888af03381SMarcel Moolenaar 	return (1);
18927d5dc18SMarcel Moolenaar }
19027d5dc18SMarcel Moolenaar 
19127d5dc18SMarcel Moolenaar /*
19227d5dc18SMarcel Moolenaar  * Line or modem status change (OOB signalling).
19327d5dc18SMarcel Moolenaar  * We pass the signals to the software interrupt handler for further
19427d5dc18SMarcel Moolenaar  * processing. Note that we merge the delta bits, but set the state
19527d5dc18SMarcel Moolenaar  * bits. This is to avoid loosing state transitions due to having more
19627d5dc18SMarcel Moolenaar  * than 1 hardware interrupt between software interrupts.
19727d5dc18SMarcel Moolenaar  */
1988af03381SMarcel Moolenaar static __inline int
1998af03381SMarcel Moolenaar uart_intr_sigchg(void *arg)
20027d5dc18SMarcel Moolenaar {
2018af03381SMarcel Moolenaar 	struct uart_softc *sc = arg;
20227d5dc18SMarcel Moolenaar 	int new, old, sig;
20327d5dc18SMarcel Moolenaar 
20427d5dc18SMarcel Moolenaar 	sig = UART_GETSIG(sc);
2058194412bSMarcel Moolenaar 
2068194412bSMarcel Moolenaar 	if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
2078194412bSMarcel Moolenaar 		if (sig & UART_SIG_DPPS) {
2088194412bSMarcel Moolenaar 			pps_capture(&sc->sc_pps);
2098194412bSMarcel Moolenaar 			pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ?
2108194412bSMarcel Moolenaar 			    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
2118194412bSMarcel Moolenaar 		}
2128194412bSMarcel Moolenaar 	}
2138194412bSMarcel Moolenaar 
2148af03381SMarcel Moolenaar 	/*
2158af03381SMarcel Moolenaar 	 * Keep track of signal changes, even when the device is not
2168af03381SMarcel Moolenaar 	 * opened. This allows us to inform upper layers about a
2178af03381SMarcel Moolenaar 	 * possible loss of DCD and thus the existence of a (possibly)
2188af03381SMarcel Moolenaar 	 * different connection when we have DCD back, during the time
2198af03381SMarcel Moolenaar 	 * that the device was closed.
2208af03381SMarcel Moolenaar 	 */
22127d5dc18SMarcel Moolenaar 	do {
22227d5dc18SMarcel Moolenaar 		old = sc->sc_ttypend;
223ea549414SMarcel Moolenaar 		new = old & ~SER_MASK_STATE;
2242d511805SMarcel Moolenaar 		new |= sig & SER_INT_SIGMASK;
22527d5dc18SMarcel Moolenaar 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
2268af03381SMarcel Moolenaar 
2278af03381SMarcel Moolenaar 	if (sc->sc_opened)
2288af03381SMarcel Moolenaar 		uart_sched_softih(sc, SER_INT_SIGCHG);
2298af03381SMarcel Moolenaar 	return (1);
23027d5dc18SMarcel Moolenaar }
23127d5dc18SMarcel Moolenaar 
23227d5dc18SMarcel Moolenaar /*
23327d5dc18SMarcel Moolenaar  * The transmitter can accept more data.
23427d5dc18SMarcel Moolenaar  */
2358af03381SMarcel Moolenaar static __inline int
2368af03381SMarcel Moolenaar uart_intr_txidle(void *arg)
23727d5dc18SMarcel Moolenaar {
2388af03381SMarcel Moolenaar 	struct uart_softc *sc = arg;
2398af03381SMarcel Moolenaar 
24027d5dc18SMarcel Moolenaar 	if (sc->sc_txbusy) {
24127d5dc18SMarcel Moolenaar 		sc->sc_txbusy = 0;
2428af03381SMarcel Moolenaar 		uart_sched_softih(sc, SER_INT_TXIDLE);
24327d5dc18SMarcel Moolenaar 	}
2448af03381SMarcel Moolenaar 	return (0);
24527d5dc18SMarcel Moolenaar }
24627d5dc18SMarcel Moolenaar 
247ef544f63SPaolo Pisati static int
24827d5dc18SMarcel Moolenaar uart_intr(void *arg)
24927d5dc18SMarcel Moolenaar {
25027d5dc18SMarcel Moolenaar 	struct uart_softc *sc = arg;
251ef544f63SPaolo Pisati 	int flag = 0, ipend;
25227d5dc18SMarcel Moolenaar 
2538af03381SMarcel Moolenaar 	while (!sc->sc_leaving && (ipend = UART_IPEND(sc)) != 0) {
254ef544f63SPaolo Pisati 		flag = 1;
2552d511805SMarcel Moolenaar 		if (ipend & SER_INT_OVERRUN)
25627d5dc18SMarcel Moolenaar 			uart_intr_overrun(sc);
2572d511805SMarcel Moolenaar 		if (ipend & SER_INT_BREAK)
25827d5dc18SMarcel Moolenaar 			uart_intr_break(sc);
2592d511805SMarcel Moolenaar 		if (ipend & SER_INT_RXREADY)
26027d5dc18SMarcel Moolenaar 			uart_intr_rxready(sc);
2612d511805SMarcel Moolenaar 		if (ipend & SER_INT_SIGCHG)
26227d5dc18SMarcel Moolenaar 			uart_intr_sigchg(sc);
2632d511805SMarcel Moolenaar 		if (ipend & SER_INT_TXIDLE)
26427d5dc18SMarcel Moolenaar 			uart_intr_txidle(sc);
2658af03381SMarcel Moolenaar 	}
266*332cda07SPeter Grehan 
267*332cda07SPeter Grehan 	if (sc->sc_polled) {
268*332cda07SPeter Grehan 		callout_reset(&sc->sc_timer, hz / uart_poll_freq,
269*332cda07SPeter Grehan 		    (timeout_t *)uart_intr, sc);
270*332cda07SPeter Grehan 	}
271*332cda07SPeter Grehan 
272ef544f63SPaolo Pisati 	return((flag)?FILTER_HANDLED:FILTER_STRAY);
2738af03381SMarcel Moolenaar }
27427d5dc18SMarcel Moolenaar 
2758af03381SMarcel Moolenaar serdev_intr_t *
2768af03381SMarcel Moolenaar uart_bus_ihand(device_t dev, int ipend)
2778af03381SMarcel Moolenaar {
2788af03381SMarcel Moolenaar 
2798af03381SMarcel Moolenaar 	switch (ipend) {
2808af03381SMarcel Moolenaar 	case SER_INT_BREAK:
2818af03381SMarcel Moolenaar 		return (uart_intr_break);
2828af03381SMarcel Moolenaar 	case SER_INT_OVERRUN:
2838af03381SMarcel Moolenaar 		return (uart_intr_overrun);
2848af03381SMarcel Moolenaar 	case SER_INT_RXREADY:
2858af03381SMarcel Moolenaar 		return (uart_intr_rxready);
2868af03381SMarcel Moolenaar 	case SER_INT_SIGCHG:
2878af03381SMarcel Moolenaar 		return (uart_intr_sigchg);
2888af03381SMarcel Moolenaar 	case SER_INT_TXIDLE:
2898af03381SMarcel Moolenaar 		return (uart_intr_txidle);
2908af03381SMarcel Moolenaar 	}
2918af03381SMarcel Moolenaar 	return (NULL);
2928af03381SMarcel Moolenaar }
2938af03381SMarcel Moolenaar 
2948af03381SMarcel Moolenaar int
295a31f91a0SMarcel Moolenaar uart_bus_ipend(device_t dev)
296a31f91a0SMarcel Moolenaar {
297a31f91a0SMarcel Moolenaar 	struct uart_softc *sc;
298a31f91a0SMarcel Moolenaar 
299a31f91a0SMarcel Moolenaar 	sc = device_get_softc(dev);
300a31f91a0SMarcel Moolenaar 	return (UART_IPEND(sc));
301a31f91a0SMarcel Moolenaar }
302a31f91a0SMarcel Moolenaar 
303a31f91a0SMarcel Moolenaar int
3048af03381SMarcel Moolenaar uart_bus_sysdev(device_t dev)
3058af03381SMarcel Moolenaar {
3068af03381SMarcel Moolenaar 	struct uart_softc *sc;
3078af03381SMarcel Moolenaar 
3088af03381SMarcel Moolenaar 	sc = device_get_softc(dev);
3098af03381SMarcel Moolenaar 	return ((sc->sc_sysdev != NULL) ? 1 : 0);
31027d5dc18SMarcel Moolenaar }
31127d5dc18SMarcel Moolenaar 
31227d5dc18SMarcel Moolenaar int
313875f70dbSMarcel Moolenaar uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan)
31427d5dc18SMarcel Moolenaar {
31527d5dc18SMarcel Moolenaar 	struct uart_softc *sc;
31627d5dc18SMarcel Moolenaar 	struct uart_devinfo *sysdev;
31727d5dc18SMarcel Moolenaar 	int error;
31827d5dc18SMarcel Moolenaar 
319f8100ce2SMarcel Moolenaar 	sc = device_get_softc(dev);
320f8100ce2SMarcel Moolenaar 
321f8100ce2SMarcel Moolenaar 	/*
322f8100ce2SMarcel Moolenaar 	 * All uart_class references are weak. Check that the needed
323f8100ce2SMarcel Moolenaar 	 * class has been compiled-in. Fail if not.
324f8100ce2SMarcel Moolenaar 	 */
325f8100ce2SMarcel Moolenaar 	if (sc->sc_class == NULL)
326f8100ce2SMarcel Moolenaar 		return (ENXIO);
327f8100ce2SMarcel Moolenaar 
32827d5dc18SMarcel Moolenaar 	/*
32927d5dc18SMarcel Moolenaar 	 * Initialize the instance. Note that the instance (=softc) does
33027d5dc18SMarcel Moolenaar 	 * not necessarily match the hardware specific softc. We can't do
33127d5dc18SMarcel Moolenaar 	 * anything about it now, because we may not attach to the device.
33227d5dc18SMarcel Moolenaar 	 * Hardware drivers cannot use any of the class specific fields
33327d5dc18SMarcel Moolenaar 	 * while probing.
33427d5dc18SMarcel Moolenaar 	 */
33527d5dc18SMarcel Moolenaar 	kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
33627d5dc18SMarcel Moolenaar 	sc->sc_dev = dev;
33727d5dc18SMarcel Moolenaar 	if (device_get_desc(dev) == NULL)
338f8100ce2SMarcel Moolenaar 		device_set_desc(dev, uart_getname(sc->sc_class));
33927d5dc18SMarcel Moolenaar 
34027d5dc18SMarcel Moolenaar 	/*
34127d5dc18SMarcel Moolenaar 	 * Allocate the register resource. We assume that all UARTs have
34227d5dc18SMarcel Moolenaar 	 * a single register window in either I/O port space or memory
34327d5dc18SMarcel Moolenaar 	 * mapped I/O space. Any UART that needs multiple windows will
34427d5dc18SMarcel Moolenaar 	 * consequently not be supported by this driver as-is. We try I/O
34527d5dc18SMarcel Moolenaar 	 * port space first because that's the common case.
34627d5dc18SMarcel Moolenaar 	 */
34727d5dc18SMarcel Moolenaar 	sc->sc_rrid = rid;
34827d5dc18SMarcel Moolenaar 	sc->sc_rtype = SYS_RES_IOPORT;
34927d5dc18SMarcel Moolenaar 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
350f8100ce2SMarcel Moolenaar 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
35127d5dc18SMarcel Moolenaar 	if (sc->sc_rres == NULL) {
35227d5dc18SMarcel Moolenaar 		sc->sc_rrid = rid;
35327d5dc18SMarcel Moolenaar 		sc->sc_rtype = SYS_RES_MEMORY;
35427d5dc18SMarcel Moolenaar 		sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype,
355f8100ce2SMarcel Moolenaar 		    &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class),
356f8100ce2SMarcel Moolenaar 		    RF_ACTIVE);
35727d5dc18SMarcel Moolenaar 		if (sc->sc_rres == NULL)
35827d5dc18SMarcel Moolenaar 			return (ENXIO);
35927d5dc18SMarcel Moolenaar 	}
36027d5dc18SMarcel Moolenaar 
36127d5dc18SMarcel Moolenaar 	/*
36227d5dc18SMarcel Moolenaar 	 * Fill in the bus access structure and compare this device with
36327d5dc18SMarcel Moolenaar 	 * a possible console device and/or a debug port. We set the flags
36427d5dc18SMarcel Moolenaar 	 * in the softc so that the hardware dependent probe can adjust
36527d5dc18SMarcel Moolenaar 	 * accordingly. In general, you don't want to permanently disrupt
36627d5dc18SMarcel Moolenaar 	 * console I/O.
36727d5dc18SMarcel Moolenaar 	 */
36827d5dc18SMarcel Moolenaar 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
36927d5dc18SMarcel Moolenaar 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
370875f70dbSMarcel Moolenaar 	sc->sc_bas.chan = chan;
37127d5dc18SMarcel Moolenaar 	sc->sc_bas.regshft = regshft;
37227d5dc18SMarcel Moolenaar 	sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
37327d5dc18SMarcel Moolenaar 
37427d5dc18SMarcel Moolenaar 	SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
375875f70dbSMarcel Moolenaar 		if (chan == sysdev->bas.chan &&
376875f70dbSMarcel Moolenaar 		    uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
37727d5dc18SMarcel Moolenaar 			/* XXX check if ops matches class. */
37827d5dc18SMarcel Moolenaar 			sc->sc_sysdev = sysdev;
3791c5e367bSMarcel Moolenaar 			sysdev->bas.rclk = sc->sc_bas.rclk;
38027d5dc18SMarcel Moolenaar 		}
38127d5dc18SMarcel Moolenaar 	}
38227d5dc18SMarcel Moolenaar 
38327d5dc18SMarcel Moolenaar 	error = UART_PROBE(sc);
38427d5dc18SMarcel Moolenaar 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
385b923a710SMarcel Moolenaar 	return ((error) ? error : BUS_PROBE_DEFAULT);
38627d5dc18SMarcel Moolenaar }
38727d5dc18SMarcel Moolenaar 
38827d5dc18SMarcel Moolenaar int
38927d5dc18SMarcel Moolenaar uart_bus_attach(device_t dev)
39027d5dc18SMarcel Moolenaar {
39127d5dc18SMarcel Moolenaar 	struct uart_softc *sc, *sc0;
39227d5dc18SMarcel Moolenaar 	const char *sep;
39327d5dc18SMarcel Moolenaar 	int error;
39427d5dc18SMarcel Moolenaar 
39527d5dc18SMarcel Moolenaar 	/*
39627d5dc18SMarcel Moolenaar 	 * The sc_class field defines the type of UART we're going to work
39727d5dc18SMarcel Moolenaar 	 * with and thus the size of the softc. Replace the generic softc
39827d5dc18SMarcel Moolenaar 	 * with one that matches the UART now that we're certain we handle
39927d5dc18SMarcel Moolenaar 	 * the device.
40027d5dc18SMarcel Moolenaar 	 */
40127d5dc18SMarcel Moolenaar 	sc0 = device_get_softc(dev);
40227d5dc18SMarcel Moolenaar 	if (sc0->sc_class->size > sizeof(*sc)) {
40327d5dc18SMarcel Moolenaar 		sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
40427d5dc18SMarcel Moolenaar 		bcopy(sc0, sc, sizeof(*sc));
40527d5dc18SMarcel Moolenaar 		device_set_softc(dev, sc);
40627d5dc18SMarcel Moolenaar 	} else
40727d5dc18SMarcel Moolenaar 		sc = sc0;
40827d5dc18SMarcel Moolenaar 
40927d5dc18SMarcel Moolenaar 	/*
41027d5dc18SMarcel Moolenaar 	 * Protect ourselves against interrupts while we're not completely
41127d5dc18SMarcel Moolenaar 	 * finished attaching and initializing. We don't expect interrupts
41227d5dc18SMarcel Moolenaar 	 * until after UART_ATTACH() though.
41327d5dc18SMarcel Moolenaar 	 */
41427d5dc18SMarcel Moolenaar 	sc->sc_leaving = 1;
41527d5dc18SMarcel Moolenaar 
4168af03381SMarcel Moolenaar 	mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
4178af03381SMarcel Moolenaar 	if (sc->sc_hwmtx == NULL)
4188af03381SMarcel Moolenaar 		sc->sc_hwmtx = &sc->sc_hwmtx_s;
41906287620SMarcel Moolenaar 
42027d5dc18SMarcel Moolenaar 	/*
42127d5dc18SMarcel Moolenaar 	 * Re-allocate. We expect that the softc contains the information
42227d5dc18SMarcel Moolenaar 	 * collected by uart_bus_probe() intact.
42327d5dc18SMarcel Moolenaar 	 */
42427d5dc18SMarcel Moolenaar 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
425f8100ce2SMarcel Moolenaar 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
4262682e7b6SMarius Strobl 	if (sc->sc_rres == NULL) {
4278af03381SMarcel Moolenaar 		mtx_destroy(&sc->sc_hwmtx_s);
42827d5dc18SMarcel Moolenaar 		return (ENXIO);
4292682e7b6SMarius Strobl 	}
430b8759afcSYoshihiro Takahashi 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
431b8759afcSYoshihiro Takahashi 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
432b8759afcSYoshihiro Takahashi 
43327d5dc18SMarcel Moolenaar 	sc->sc_irid = 0;
4345f96beb9SNate Lawson 	sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
4352682e7b6SMarius Strobl 	    RF_ACTIVE | RF_SHAREABLE);
43627d5dc18SMarcel Moolenaar 	if (sc->sc_ires != NULL) {
43757fb5e60SJohn Baldwin 		error = bus_setup_intr(dev,
438ef544f63SPaolo Pisati 		    sc->sc_ires, INTR_TYPE_TTY,
439ef544f63SPaolo Pisati 		    uart_intr, NULL, sc, &sc->sc_icookie);
44027d5dc18SMarcel Moolenaar 		if (error)
44157fb5e60SJohn Baldwin 			error = bus_setup_intr(dev,
4425918c72dSMarcel Moolenaar 			    sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE,
443ef544f63SPaolo Pisati 			    NULL, (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
44427d5dc18SMarcel Moolenaar 		else
44527d5dc18SMarcel Moolenaar 			sc->sc_fastintr = 1;
44627d5dc18SMarcel Moolenaar 
44727d5dc18SMarcel Moolenaar 		if (error) {
44827d5dc18SMarcel Moolenaar 			device_printf(dev, "could not activate interrupt\n");
44927d5dc18SMarcel Moolenaar 			bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
45027d5dc18SMarcel Moolenaar 			    sc->sc_ires);
45127d5dc18SMarcel Moolenaar 			sc->sc_ires = NULL;
45227d5dc18SMarcel Moolenaar 		}
45327d5dc18SMarcel Moolenaar 	}
45427d5dc18SMarcel Moolenaar 	if (sc->sc_ires == NULL) {
455*332cda07SPeter Grehan 		/* No interrupt resource. Force polled mode. */
45627d5dc18SMarcel Moolenaar 		sc->sc_polled = 1;
457*332cda07SPeter Grehan 		callout_init(&sc->sc_timer, 1);
45827d5dc18SMarcel Moolenaar 	}
45927d5dc18SMarcel Moolenaar 
460bc093719SEd Schouten 	sc->sc_rxbufsz = 384;
46127d5dc18SMarcel Moolenaar 	sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
46227d5dc18SMarcel Moolenaar 	    M_UART, M_WAITOK);
46327d5dc18SMarcel Moolenaar 	sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
46427d5dc18SMarcel Moolenaar 	    M_UART, M_WAITOK);
46527d5dc18SMarcel Moolenaar 
46627d5dc18SMarcel Moolenaar 	error = UART_ATTACH(sc);
46727d5dc18SMarcel Moolenaar 	if (error)
46827d5dc18SMarcel Moolenaar 		goto fail;
46927d5dc18SMarcel Moolenaar 
47027d5dc18SMarcel Moolenaar 	if (sc->sc_hwiflow || sc->sc_hwoflow) {
47127d5dc18SMarcel Moolenaar 		sep = "";
47227d5dc18SMarcel Moolenaar 		device_print_prettyname(dev);
47327d5dc18SMarcel Moolenaar 		if (sc->sc_hwiflow) {
47427d5dc18SMarcel Moolenaar 			printf("%sRTS iflow", sep);
47527d5dc18SMarcel Moolenaar 			sep = ", ";
47627d5dc18SMarcel Moolenaar 		}
47727d5dc18SMarcel Moolenaar 		if (sc->sc_hwoflow) {
47827d5dc18SMarcel Moolenaar 			printf("%sCTS oflow", sep);
47927d5dc18SMarcel Moolenaar 			sep = ", ";
48027d5dc18SMarcel Moolenaar 		}
48127d5dc18SMarcel Moolenaar 		printf("\n");
48227d5dc18SMarcel Moolenaar 	}
48327d5dc18SMarcel Moolenaar 
48427d5dc18SMarcel Moolenaar 	if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
48527d5dc18SMarcel Moolenaar 		sep = "";
48627d5dc18SMarcel Moolenaar 		device_print_prettyname(dev);
48727d5dc18SMarcel Moolenaar 		if (sc->sc_fastintr) {
48827d5dc18SMarcel Moolenaar 			printf("%sfast interrupt", sep);
48927d5dc18SMarcel Moolenaar 			sep = ", ";
49027d5dc18SMarcel Moolenaar 		}
49127d5dc18SMarcel Moolenaar 		if (sc->sc_polled) {
49227d5dc18SMarcel Moolenaar 			printf("%spolled mode", sep);
49327d5dc18SMarcel Moolenaar 			sep = ", ";
49427d5dc18SMarcel Moolenaar 		}
49527d5dc18SMarcel Moolenaar 		printf("\n");
49627d5dc18SMarcel Moolenaar 	}
49727d5dc18SMarcel Moolenaar 
49827d5dc18SMarcel Moolenaar 	if (sc->sc_sysdev != NULL) {
49954e2bcc7SMarcel Moolenaar 		if (sc->sc_sysdev->baudrate == 0) {
50054e2bcc7SMarcel Moolenaar 			if (UART_IOCTL(sc, UART_IOCTL_BAUD,
50154e2bcc7SMarcel Moolenaar 			    (intptr_t)&sc->sc_sysdev->baudrate) != 0)
50254e2bcc7SMarcel Moolenaar 				sc->sc_sysdev->baudrate = -1;
50354e2bcc7SMarcel Moolenaar 		}
50427d5dc18SMarcel Moolenaar 		switch (sc->sc_sysdev->type) {
50527d5dc18SMarcel Moolenaar 		case UART_DEV_CONSOLE:
50627d5dc18SMarcel Moolenaar 			device_printf(dev, "console");
50727d5dc18SMarcel Moolenaar 			break;
50827d5dc18SMarcel Moolenaar 		case UART_DEV_DBGPORT:
50927d5dc18SMarcel Moolenaar 			device_printf(dev, "debug port");
51027d5dc18SMarcel Moolenaar 			break;
51127d5dc18SMarcel Moolenaar 		case UART_DEV_KEYBOARD:
51227d5dc18SMarcel Moolenaar 			device_printf(dev, "keyboard");
51327d5dc18SMarcel Moolenaar 			break;
51427d5dc18SMarcel Moolenaar 		default:
51527d5dc18SMarcel Moolenaar 			device_printf(dev, "unknown system device");
51627d5dc18SMarcel Moolenaar 			break;
51727d5dc18SMarcel Moolenaar 		}
51827d5dc18SMarcel Moolenaar 		printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
51927d5dc18SMarcel Moolenaar 		    "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
52027d5dc18SMarcel Moolenaar 		    sc->sc_sysdev->stopbits);
52127d5dc18SMarcel Moolenaar 	}
52227d5dc18SMarcel Moolenaar 
5238194412bSMarcel Moolenaar 	sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
5248194412bSMarcel Moolenaar 	pps_init(&sc->sc_pps);
5258194412bSMarcel Moolenaar 
52627d5dc18SMarcel Moolenaar 	error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL)
52727d5dc18SMarcel Moolenaar 	    ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc);
52827d5dc18SMarcel Moolenaar 	if (error)
52927d5dc18SMarcel Moolenaar 		goto fail;
53027d5dc18SMarcel Moolenaar 
5318af03381SMarcel Moolenaar 	if (sc->sc_sysdev != NULL)
5328af03381SMarcel Moolenaar 		sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
5338af03381SMarcel Moolenaar 
53427d5dc18SMarcel Moolenaar 	sc->sc_leaving = 0;
53527d5dc18SMarcel Moolenaar 	uart_intr(sc);
53627d5dc18SMarcel Moolenaar 	return (0);
53727d5dc18SMarcel Moolenaar 
53827d5dc18SMarcel Moolenaar  fail:
53927d5dc18SMarcel Moolenaar 	free(sc->sc_txbuf, M_UART);
54027d5dc18SMarcel Moolenaar 	free(sc->sc_rxbuf, M_UART);
54127d5dc18SMarcel Moolenaar 
54227d5dc18SMarcel Moolenaar 	if (sc->sc_ires != NULL) {
54327d5dc18SMarcel Moolenaar 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
54427d5dc18SMarcel Moolenaar 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
54527d5dc18SMarcel Moolenaar 		    sc->sc_ires);
54627d5dc18SMarcel Moolenaar 	}
54727d5dc18SMarcel Moolenaar 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
54827d5dc18SMarcel Moolenaar 
5498af03381SMarcel Moolenaar 	mtx_destroy(&sc->sc_hwmtx_s);
5502682e7b6SMarius Strobl 
55127d5dc18SMarcel Moolenaar 	return (error);
55227d5dc18SMarcel Moolenaar }
55327d5dc18SMarcel Moolenaar 
55427d5dc18SMarcel Moolenaar int
55527d5dc18SMarcel Moolenaar uart_bus_detach(device_t dev)
55627d5dc18SMarcel Moolenaar {
55727d5dc18SMarcel Moolenaar 	struct uart_softc *sc;
55827d5dc18SMarcel Moolenaar 
55927d5dc18SMarcel Moolenaar 	sc = device_get_softc(dev);
56027d5dc18SMarcel Moolenaar 
56127d5dc18SMarcel Moolenaar 	sc->sc_leaving = 1;
56227d5dc18SMarcel Moolenaar 
5638af03381SMarcel Moolenaar 	if (sc->sc_sysdev != NULL)
5648af03381SMarcel Moolenaar 		sc->sc_sysdev->hwmtx = NULL;
5658af03381SMarcel Moolenaar 
56627d5dc18SMarcel Moolenaar 	UART_DETACH(sc);
56727d5dc18SMarcel Moolenaar 
56827d5dc18SMarcel Moolenaar 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
56927d5dc18SMarcel Moolenaar 		(*sc->sc_sysdev->detach)(sc);
57027d5dc18SMarcel Moolenaar 	else
57127d5dc18SMarcel Moolenaar 		uart_tty_detach(sc);
57227d5dc18SMarcel Moolenaar 
57327d5dc18SMarcel Moolenaar 	free(sc->sc_txbuf, M_UART);
57427d5dc18SMarcel Moolenaar 	free(sc->sc_rxbuf, M_UART);
57527d5dc18SMarcel Moolenaar 
57627d5dc18SMarcel Moolenaar 	if (sc->sc_ires != NULL) {
57727d5dc18SMarcel Moolenaar 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
57827d5dc18SMarcel Moolenaar 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
57927d5dc18SMarcel Moolenaar 		    sc->sc_ires);
58027d5dc18SMarcel Moolenaar 	}
58127d5dc18SMarcel Moolenaar 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
58227d5dc18SMarcel Moolenaar 
5838af03381SMarcel Moolenaar 	mtx_destroy(&sc->sc_hwmtx_s);
5842682e7b6SMarius Strobl 
58527d5dc18SMarcel Moolenaar 	if (sc->sc_class->size > sizeof(*sc)) {
58627d5dc18SMarcel Moolenaar 		device_set_softc(dev, NULL);
58727d5dc18SMarcel Moolenaar 		free(sc, M_UART);
58827d5dc18SMarcel Moolenaar 	} else
58927d5dc18SMarcel Moolenaar 		device_set_softc(dev, NULL);
59027d5dc18SMarcel Moolenaar 
59127d5dc18SMarcel Moolenaar 	return (0);
59227d5dc18SMarcel Moolenaar }
593