1098ca2bdSWarner Losh /*- 227d5dc18SMarcel Moolenaar * Copyright (c) 2003 Marcel Moolenaar 327d5dc18SMarcel Moolenaar * All rights reserved. 427d5dc18SMarcel Moolenaar * 527d5dc18SMarcel Moolenaar * Redistribution and use in source and binary forms, with or without 627d5dc18SMarcel Moolenaar * modification, are permitted provided that the following conditions 727d5dc18SMarcel Moolenaar * are met: 827d5dc18SMarcel Moolenaar * 927d5dc18SMarcel Moolenaar * 1. Redistributions of source code must retain the above copyright 1027d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer. 1127d5dc18SMarcel Moolenaar * 2. Redistributions in binary form must reproduce the above copyright 1227d5dc18SMarcel Moolenaar * notice, this list of conditions and the following disclaimer in the 1327d5dc18SMarcel Moolenaar * documentation and/or other materials provided with the distribution. 1427d5dc18SMarcel Moolenaar * 1527d5dc18SMarcel Moolenaar * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1627d5dc18SMarcel Moolenaar * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1727d5dc18SMarcel Moolenaar * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1827d5dc18SMarcel Moolenaar * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 1927d5dc18SMarcel Moolenaar * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2027d5dc18SMarcel Moolenaar * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2127d5dc18SMarcel Moolenaar * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2227d5dc18SMarcel Moolenaar * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2327d5dc18SMarcel Moolenaar * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2427d5dc18SMarcel Moolenaar * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2527d5dc18SMarcel Moolenaar */ 2627d5dc18SMarcel Moolenaar 2727d5dc18SMarcel Moolenaar #include <sys/cdefs.h> 2827d5dc18SMarcel Moolenaar __FBSDID("$FreeBSD$"); 2927d5dc18SMarcel Moolenaar 3027d5dc18SMarcel Moolenaar #ifndef KLD_MODULE 3127d5dc18SMarcel Moolenaar #include "opt_comconsole.h" 3227d5dc18SMarcel Moolenaar #endif 3327d5dc18SMarcel Moolenaar 3427d5dc18SMarcel Moolenaar #include <sys/param.h> 3527d5dc18SMarcel Moolenaar #include <sys/systm.h> 3627d5dc18SMarcel Moolenaar #include <sys/bus.h> 3727d5dc18SMarcel Moolenaar #include <sys/conf.h> 3827d5dc18SMarcel Moolenaar #include <sys/cons.h> 3927d5dc18SMarcel Moolenaar #include <sys/fcntl.h> 4027d5dc18SMarcel Moolenaar #include <sys/interrupt.h> 41591bc192SMarcel Moolenaar #include <sys/kdb.h> 4227d5dc18SMarcel Moolenaar #include <sys/kernel.h> 4327d5dc18SMarcel Moolenaar #include <sys/malloc.h> 4427d5dc18SMarcel Moolenaar #include <sys/queue.h> 4527d5dc18SMarcel Moolenaar #include <sys/reboot.h> 4627d5dc18SMarcel Moolenaar #include <machine/bus.h> 4727d5dc18SMarcel Moolenaar #include <sys/rman.h> 4827d5dc18SMarcel Moolenaar #include <sys/termios.h> 4927d5dc18SMarcel Moolenaar #include <machine/resource.h> 5027d5dc18SMarcel Moolenaar #include <machine/stdarg.h> 5127d5dc18SMarcel Moolenaar 5227d5dc18SMarcel Moolenaar #include <dev/uart/uart.h> 5327d5dc18SMarcel Moolenaar #include <dev/uart/uart_bus.h> 5427d5dc18SMarcel Moolenaar #include <dev/uart/uart_cpu.h> 5527d5dc18SMarcel Moolenaar 5627d5dc18SMarcel Moolenaar #include "uart_if.h" 5727d5dc18SMarcel Moolenaar 5827d5dc18SMarcel Moolenaar devclass_t uart_devclass; 5927d5dc18SMarcel Moolenaar char uart_driver_name[] = "uart"; 6027d5dc18SMarcel Moolenaar 6127d5dc18SMarcel Moolenaar SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs = 6227d5dc18SMarcel Moolenaar SLIST_HEAD_INITIALIZER(uart_sysdevs); 6327d5dc18SMarcel Moolenaar 6427d5dc18SMarcel Moolenaar MALLOC_DEFINE(M_UART, "UART", "UART driver"); 6527d5dc18SMarcel Moolenaar 6627d5dc18SMarcel Moolenaar void 6727d5dc18SMarcel Moolenaar uart_add_sysdev(struct uart_devinfo *di) 6827d5dc18SMarcel Moolenaar { 6927d5dc18SMarcel Moolenaar SLIST_INSERT_HEAD(&uart_sysdevs, di, next); 7027d5dc18SMarcel Moolenaar } 7127d5dc18SMarcel Moolenaar 72f8100ce2SMarcel Moolenaar const char * 73f8100ce2SMarcel Moolenaar uart_getname(struct uart_class *uc) 74f8100ce2SMarcel Moolenaar { 75f8100ce2SMarcel Moolenaar return ((uc != NULL) ? uc->name : NULL); 76f8100ce2SMarcel Moolenaar } 77f8100ce2SMarcel Moolenaar 78f8100ce2SMarcel Moolenaar struct uart_ops * 79f8100ce2SMarcel Moolenaar uart_getops(struct uart_class *uc) 80f8100ce2SMarcel Moolenaar { 81f8100ce2SMarcel Moolenaar return ((uc != NULL) ? uc->uc_ops : NULL); 82f8100ce2SMarcel Moolenaar } 83f8100ce2SMarcel Moolenaar 84f8100ce2SMarcel Moolenaar int 85f8100ce2SMarcel Moolenaar uart_getrange(struct uart_class *uc) 86f8100ce2SMarcel Moolenaar { 87f8100ce2SMarcel Moolenaar return ((uc != NULL) ? uc->uc_range : 0); 88f8100ce2SMarcel Moolenaar } 89f8100ce2SMarcel Moolenaar 9027d5dc18SMarcel Moolenaar /* 918af03381SMarcel Moolenaar * Schedule a soft interrupt. We do this on the 0 to !0 transition 928af03381SMarcel Moolenaar * of the TTY pending interrupt status. 938af03381SMarcel Moolenaar */ 94*0acb3c4aSMarcel Moolenaar void 958af03381SMarcel Moolenaar uart_sched_softih(struct uart_softc *sc, uint32_t ipend) 968af03381SMarcel Moolenaar { 978af03381SMarcel Moolenaar uint32_t new, old; 988af03381SMarcel Moolenaar 998af03381SMarcel Moolenaar do { 1008af03381SMarcel Moolenaar old = sc->sc_ttypend; 1018af03381SMarcel Moolenaar new = old | ipend; 1028af03381SMarcel Moolenaar } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 1038af03381SMarcel Moolenaar 1048af03381SMarcel Moolenaar if ((old & SER_INT_MASK) == 0) 1058af03381SMarcel Moolenaar swi_sched(sc->sc_softih, 0); 1068af03381SMarcel Moolenaar } 1078af03381SMarcel Moolenaar 1088af03381SMarcel Moolenaar /* 10927d5dc18SMarcel Moolenaar * A break condition has been detected. We treat the break condition as 11027d5dc18SMarcel Moolenaar * a special case that should not happen during normal operation. When 11127d5dc18SMarcel Moolenaar * the break condition is to be passed to higher levels in the form of 11227d5dc18SMarcel Moolenaar * a NUL character, we really want the break to be in the right place in 11327d5dc18SMarcel Moolenaar * the input stream. The overhead to achieve that is not in relation to 11427d5dc18SMarcel Moolenaar * the exceptional nature of the break condition, so we permit ourselves 11527d5dc18SMarcel Moolenaar * to be sloppy. 11627d5dc18SMarcel Moolenaar */ 1178af03381SMarcel Moolenaar static __inline int 1188af03381SMarcel Moolenaar uart_intr_break(void *arg) 11927d5dc18SMarcel Moolenaar { 1208af03381SMarcel Moolenaar struct uart_softc *sc = arg; 12127d5dc18SMarcel Moolenaar 122591bc192SMarcel Moolenaar #if defined(KDB) && defined(BREAK_TO_DEBUGGER) 12327d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 1243de213ccSRobert Watson kdb_enter(KDB_WHY_BREAK, "Line break on console"); 1258af03381SMarcel Moolenaar return (0); 12627d5dc18SMarcel Moolenaar } 12727d5dc18SMarcel Moolenaar #endif 12827d5dc18SMarcel Moolenaar if (sc->sc_opened) 1298af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_BREAK); 1308af03381SMarcel Moolenaar return (0); 13127d5dc18SMarcel Moolenaar } 13227d5dc18SMarcel Moolenaar 13327d5dc18SMarcel Moolenaar /* 13427d5dc18SMarcel Moolenaar * Handle a receiver overrun situation. We lost at least 1 byte in the 13527d5dc18SMarcel Moolenaar * input stream and it's our job to contain the situation. We grab as 13627d5dc18SMarcel Moolenaar * much of the data we can, but otherwise flush the receiver FIFO to 13727d5dc18SMarcel Moolenaar * create some breathing room. The net effect is that we avoid the 13827d5dc18SMarcel Moolenaar * overrun condition to happen for the next X characters, where X is 13927d5dc18SMarcel Moolenaar * related to the FIFO size at the cost of loosing data right away. 14027d5dc18SMarcel Moolenaar * So, instead of having multiple overrun interrupts in close proximity 14127d5dc18SMarcel Moolenaar * to each other and possibly pessimizing UART interrupt latency for 14227d5dc18SMarcel Moolenaar * other UARTs in a multiport configuration, we create a longer segment 14327d5dc18SMarcel Moolenaar * of missing characters by freeing up the FIFO. 14427d5dc18SMarcel Moolenaar * Each overrun condition is marked in the input buffer by a token. The 14527d5dc18SMarcel Moolenaar * token represents the loss of at least one, but possible more bytes in 14627d5dc18SMarcel Moolenaar * the input stream. 14727d5dc18SMarcel Moolenaar */ 1488af03381SMarcel Moolenaar static __inline int 1498af03381SMarcel Moolenaar uart_intr_overrun(void *arg) 15027d5dc18SMarcel Moolenaar { 1518af03381SMarcel Moolenaar struct uart_softc *sc = arg; 15227d5dc18SMarcel Moolenaar 15327d5dc18SMarcel Moolenaar if (sc->sc_opened) { 15427d5dc18SMarcel Moolenaar UART_RECEIVE(sc); 15527d5dc18SMarcel Moolenaar if (uart_rx_put(sc, UART_STAT_OVERRUN)) 15627d5dc18SMarcel Moolenaar sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 1578af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_RXREADY); 15827d5dc18SMarcel Moolenaar } 15927d5dc18SMarcel Moolenaar UART_FLUSH(sc, UART_FLUSH_RECEIVER); 1608af03381SMarcel Moolenaar return (0); 16127d5dc18SMarcel Moolenaar } 16227d5dc18SMarcel Moolenaar 16327d5dc18SMarcel Moolenaar /* 16427d5dc18SMarcel Moolenaar * Received data ready. 16527d5dc18SMarcel Moolenaar */ 1668af03381SMarcel Moolenaar static __inline int 1678af03381SMarcel Moolenaar uart_intr_rxready(void *arg) 16827d5dc18SMarcel Moolenaar { 1698af03381SMarcel Moolenaar struct uart_softc *sc = arg; 17027d5dc18SMarcel Moolenaar int rxp; 17127d5dc18SMarcel Moolenaar 17227d5dc18SMarcel Moolenaar rxp = sc->sc_rxput; 17327d5dc18SMarcel Moolenaar UART_RECEIVE(sc); 174591bc192SMarcel Moolenaar #if defined(KDB) && defined(ALT_BREAK_TO_DEBUGGER) 17527d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) { 17627d5dc18SMarcel Moolenaar while (rxp != sc->sc_rxput) { 17743d7128cSPeter Wemm int kdb_brk; 17843d7128cSPeter Wemm 17943d7128cSPeter Wemm if ((kdb_brk = kdb_alt_break(sc->sc_rxbuf[rxp++], 18043d7128cSPeter Wemm &sc->sc_altbrk)) != 0) { 18143d7128cSPeter Wemm switch (kdb_brk) { 18243d7128cSPeter Wemm case KDB_REQ_DEBUGGER: 1833de213ccSRobert Watson kdb_enter(KDB_WHY_BREAK, 1843de213ccSRobert Watson "Break sequence on console"); 18543d7128cSPeter Wemm break; 18643d7128cSPeter Wemm case KDB_REQ_PANIC: 18743d7128cSPeter Wemm kdb_panic("Panic sequence on console"); 18843d7128cSPeter Wemm break; 18943d7128cSPeter Wemm case KDB_REQ_REBOOT: 19043d7128cSPeter Wemm kdb_reboot(); 19143d7128cSPeter Wemm break; 19243d7128cSPeter Wemm } 19343d7128cSPeter Wemm } 19427d5dc18SMarcel Moolenaar if (rxp == sc->sc_rxbufsz) 19527d5dc18SMarcel Moolenaar rxp = 0; 19627d5dc18SMarcel Moolenaar } 19727d5dc18SMarcel Moolenaar } 19827d5dc18SMarcel Moolenaar #endif 19927d5dc18SMarcel Moolenaar if (sc->sc_opened) 2008af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_RXREADY); 20127d5dc18SMarcel Moolenaar else 20227d5dc18SMarcel Moolenaar sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */ 2038af03381SMarcel Moolenaar return (1); 20427d5dc18SMarcel Moolenaar } 20527d5dc18SMarcel Moolenaar 20627d5dc18SMarcel Moolenaar /* 20727d5dc18SMarcel Moolenaar * Line or modem status change (OOB signalling). 20827d5dc18SMarcel Moolenaar * We pass the signals to the software interrupt handler for further 20927d5dc18SMarcel Moolenaar * processing. Note that we merge the delta bits, but set the state 21027d5dc18SMarcel Moolenaar * bits. This is to avoid loosing state transitions due to having more 21127d5dc18SMarcel Moolenaar * than 1 hardware interrupt between software interrupts. 21227d5dc18SMarcel Moolenaar */ 2138af03381SMarcel Moolenaar static __inline int 2148af03381SMarcel Moolenaar uart_intr_sigchg(void *arg) 21527d5dc18SMarcel Moolenaar { 2168af03381SMarcel Moolenaar struct uart_softc *sc = arg; 21727d5dc18SMarcel Moolenaar int new, old, sig; 21827d5dc18SMarcel Moolenaar 21927d5dc18SMarcel Moolenaar sig = UART_GETSIG(sc); 2208194412bSMarcel Moolenaar 2218194412bSMarcel Moolenaar if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) { 2228194412bSMarcel Moolenaar if (sig & UART_SIG_DPPS) { 2238194412bSMarcel Moolenaar pps_capture(&sc->sc_pps); 2248194412bSMarcel Moolenaar pps_event(&sc->sc_pps, (sig & UART_SIG_PPS) ? 2258194412bSMarcel Moolenaar PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 2268194412bSMarcel Moolenaar } 2278194412bSMarcel Moolenaar } 2288194412bSMarcel Moolenaar 2298af03381SMarcel Moolenaar /* 2308af03381SMarcel Moolenaar * Keep track of signal changes, even when the device is not 2318af03381SMarcel Moolenaar * opened. This allows us to inform upper layers about a 2328af03381SMarcel Moolenaar * possible loss of DCD and thus the existence of a (possibly) 2338af03381SMarcel Moolenaar * different connection when we have DCD back, during the time 2348af03381SMarcel Moolenaar * that the device was closed. 2358af03381SMarcel Moolenaar */ 23627d5dc18SMarcel Moolenaar do { 23727d5dc18SMarcel Moolenaar old = sc->sc_ttypend; 238ea549414SMarcel Moolenaar new = old & ~SER_MASK_STATE; 2392d511805SMarcel Moolenaar new |= sig & SER_INT_SIGMASK; 24027d5dc18SMarcel Moolenaar } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new)); 2418af03381SMarcel Moolenaar 2428af03381SMarcel Moolenaar if (sc->sc_opened) 2438af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_SIGCHG); 2448af03381SMarcel Moolenaar return (1); 24527d5dc18SMarcel Moolenaar } 24627d5dc18SMarcel Moolenaar 24727d5dc18SMarcel Moolenaar /* 24827d5dc18SMarcel Moolenaar * The transmitter can accept more data. 24927d5dc18SMarcel Moolenaar */ 2508af03381SMarcel Moolenaar static __inline int 2518af03381SMarcel Moolenaar uart_intr_txidle(void *arg) 25227d5dc18SMarcel Moolenaar { 2538af03381SMarcel Moolenaar struct uart_softc *sc = arg; 2548af03381SMarcel Moolenaar 25527d5dc18SMarcel Moolenaar if (sc->sc_txbusy) { 25627d5dc18SMarcel Moolenaar sc->sc_txbusy = 0; 2578af03381SMarcel Moolenaar uart_sched_softih(sc, SER_INT_TXIDLE); 25827d5dc18SMarcel Moolenaar } 2598af03381SMarcel Moolenaar return (0); 26027d5dc18SMarcel Moolenaar } 26127d5dc18SMarcel Moolenaar 262ef544f63SPaolo Pisati static int 26327d5dc18SMarcel Moolenaar uart_intr(void *arg) 26427d5dc18SMarcel Moolenaar { 26527d5dc18SMarcel Moolenaar struct uart_softc *sc = arg; 266ef544f63SPaolo Pisati int flag = 0, ipend; 26727d5dc18SMarcel Moolenaar 2688af03381SMarcel Moolenaar while (!sc->sc_leaving && (ipend = UART_IPEND(sc)) != 0) { 269ef544f63SPaolo Pisati flag = 1; 2702d511805SMarcel Moolenaar if (ipend & SER_INT_OVERRUN) 27127d5dc18SMarcel Moolenaar uart_intr_overrun(sc); 2722d511805SMarcel Moolenaar if (ipend & SER_INT_BREAK) 27327d5dc18SMarcel Moolenaar uart_intr_break(sc); 2742d511805SMarcel Moolenaar if (ipend & SER_INT_RXREADY) 27527d5dc18SMarcel Moolenaar uart_intr_rxready(sc); 2762d511805SMarcel Moolenaar if (ipend & SER_INT_SIGCHG) 27727d5dc18SMarcel Moolenaar uart_intr_sigchg(sc); 2782d511805SMarcel Moolenaar if (ipend & SER_INT_TXIDLE) 27927d5dc18SMarcel Moolenaar uart_intr_txidle(sc); 2808af03381SMarcel Moolenaar } 281ef544f63SPaolo Pisati return((flag)?FILTER_HANDLED:FILTER_STRAY); 2828af03381SMarcel Moolenaar } 28327d5dc18SMarcel Moolenaar 2848af03381SMarcel Moolenaar serdev_intr_t * 2858af03381SMarcel Moolenaar uart_bus_ihand(device_t dev, int ipend) 2868af03381SMarcel Moolenaar { 2878af03381SMarcel Moolenaar 2888af03381SMarcel Moolenaar switch (ipend) { 2898af03381SMarcel Moolenaar case SER_INT_BREAK: 2908af03381SMarcel Moolenaar return (uart_intr_break); 2918af03381SMarcel Moolenaar case SER_INT_OVERRUN: 2928af03381SMarcel Moolenaar return (uart_intr_overrun); 2938af03381SMarcel Moolenaar case SER_INT_RXREADY: 2948af03381SMarcel Moolenaar return (uart_intr_rxready); 2958af03381SMarcel Moolenaar case SER_INT_SIGCHG: 2968af03381SMarcel Moolenaar return (uart_intr_sigchg); 2978af03381SMarcel Moolenaar case SER_INT_TXIDLE: 2988af03381SMarcel Moolenaar return (uart_intr_txidle); 2998af03381SMarcel Moolenaar } 3008af03381SMarcel Moolenaar return (NULL); 3018af03381SMarcel Moolenaar } 3028af03381SMarcel Moolenaar 3038af03381SMarcel Moolenaar int 304a31f91a0SMarcel Moolenaar uart_bus_ipend(device_t dev) 305a31f91a0SMarcel Moolenaar { 306a31f91a0SMarcel Moolenaar struct uart_softc *sc; 307a31f91a0SMarcel Moolenaar 308a31f91a0SMarcel Moolenaar sc = device_get_softc(dev); 309a31f91a0SMarcel Moolenaar return (UART_IPEND(sc)); 310a31f91a0SMarcel Moolenaar } 311a31f91a0SMarcel Moolenaar 312a31f91a0SMarcel Moolenaar int 3138af03381SMarcel Moolenaar uart_bus_sysdev(device_t dev) 3148af03381SMarcel Moolenaar { 3158af03381SMarcel Moolenaar struct uart_softc *sc; 3168af03381SMarcel Moolenaar 3178af03381SMarcel Moolenaar sc = device_get_softc(dev); 3188af03381SMarcel Moolenaar return ((sc->sc_sysdev != NULL) ? 1 : 0); 31927d5dc18SMarcel Moolenaar } 32027d5dc18SMarcel Moolenaar 32127d5dc18SMarcel Moolenaar int 322875f70dbSMarcel Moolenaar uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan) 32327d5dc18SMarcel Moolenaar { 32427d5dc18SMarcel Moolenaar struct uart_softc *sc; 32527d5dc18SMarcel Moolenaar struct uart_devinfo *sysdev; 32627d5dc18SMarcel Moolenaar int error; 32727d5dc18SMarcel Moolenaar 328f8100ce2SMarcel Moolenaar sc = device_get_softc(dev); 329f8100ce2SMarcel Moolenaar 330f8100ce2SMarcel Moolenaar /* 331f8100ce2SMarcel Moolenaar * All uart_class references are weak. Check that the needed 332f8100ce2SMarcel Moolenaar * class has been compiled-in. Fail if not. 333f8100ce2SMarcel Moolenaar */ 334f8100ce2SMarcel Moolenaar if (sc->sc_class == NULL) 335f8100ce2SMarcel Moolenaar return (ENXIO); 336f8100ce2SMarcel Moolenaar 33727d5dc18SMarcel Moolenaar /* 33827d5dc18SMarcel Moolenaar * Initialize the instance. Note that the instance (=softc) does 33927d5dc18SMarcel Moolenaar * not necessarily match the hardware specific softc. We can't do 34027d5dc18SMarcel Moolenaar * anything about it now, because we may not attach to the device. 34127d5dc18SMarcel Moolenaar * Hardware drivers cannot use any of the class specific fields 34227d5dc18SMarcel Moolenaar * while probing. 34327d5dc18SMarcel Moolenaar */ 34427d5dc18SMarcel Moolenaar kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class); 34527d5dc18SMarcel Moolenaar sc->sc_dev = dev; 34627d5dc18SMarcel Moolenaar if (device_get_desc(dev) == NULL) 347f8100ce2SMarcel Moolenaar device_set_desc(dev, uart_getname(sc->sc_class)); 34827d5dc18SMarcel Moolenaar 34927d5dc18SMarcel Moolenaar /* 35027d5dc18SMarcel Moolenaar * Allocate the register resource. We assume that all UARTs have 35127d5dc18SMarcel Moolenaar * a single register window in either I/O port space or memory 35227d5dc18SMarcel Moolenaar * mapped I/O space. Any UART that needs multiple windows will 35327d5dc18SMarcel Moolenaar * consequently not be supported by this driver as-is. We try I/O 35427d5dc18SMarcel Moolenaar * port space first because that's the common case. 35527d5dc18SMarcel Moolenaar */ 35627d5dc18SMarcel Moolenaar sc->sc_rrid = rid; 35727d5dc18SMarcel Moolenaar sc->sc_rtype = SYS_RES_IOPORT; 35827d5dc18SMarcel Moolenaar sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 359f8100ce2SMarcel Moolenaar 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE); 36027d5dc18SMarcel Moolenaar if (sc->sc_rres == NULL) { 36127d5dc18SMarcel Moolenaar sc->sc_rrid = rid; 36227d5dc18SMarcel Moolenaar sc->sc_rtype = SYS_RES_MEMORY; 36327d5dc18SMarcel Moolenaar sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, 364f8100ce2SMarcel Moolenaar &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class), 365f8100ce2SMarcel Moolenaar RF_ACTIVE); 36627d5dc18SMarcel Moolenaar if (sc->sc_rres == NULL) 36727d5dc18SMarcel Moolenaar return (ENXIO); 36827d5dc18SMarcel Moolenaar } 36927d5dc18SMarcel Moolenaar 37027d5dc18SMarcel Moolenaar /* 37127d5dc18SMarcel Moolenaar * Fill in the bus access structure and compare this device with 37227d5dc18SMarcel Moolenaar * a possible console device and/or a debug port. We set the flags 37327d5dc18SMarcel Moolenaar * in the softc so that the hardware dependent probe can adjust 37427d5dc18SMarcel Moolenaar * accordingly. In general, you don't want to permanently disrupt 37527d5dc18SMarcel Moolenaar * console I/O. 37627d5dc18SMarcel Moolenaar */ 37727d5dc18SMarcel Moolenaar sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 37827d5dc18SMarcel Moolenaar sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 379875f70dbSMarcel Moolenaar sc->sc_bas.chan = chan; 38027d5dc18SMarcel Moolenaar sc->sc_bas.regshft = regshft; 38127d5dc18SMarcel Moolenaar sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; 38227d5dc18SMarcel Moolenaar 38327d5dc18SMarcel Moolenaar SLIST_FOREACH(sysdev, &uart_sysdevs, next) { 384875f70dbSMarcel Moolenaar if (chan == sysdev->bas.chan && 385875f70dbSMarcel Moolenaar uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) { 38627d5dc18SMarcel Moolenaar /* XXX check if ops matches class. */ 38727d5dc18SMarcel Moolenaar sc->sc_sysdev = sysdev; 3881c5e367bSMarcel Moolenaar sysdev->bas.rclk = sc->sc_bas.rclk; 38927d5dc18SMarcel Moolenaar } 39027d5dc18SMarcel Moolenaar } 39127d5dc18SMarcel Moolenaar 39227d5dc18SMarcel Moolenaar error = UART_PROBE(sc); 39327d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 394b923a710SMarcel Moolenaar return ((error) ? error : BUS_PROBE_DEFAULT); 39527d5dc18SMarcel Moolenaar } 39627d5dc18SMarcel Moolenaar 39727d5dc18SMarcel Moolenaar int 39827d5dc18SMarcel Moolenaar uart_bus_attach(device_t dev) 39927d5dc18SMarcel Moolenaar { 40027d5dc18SMarcel Moolenaar struct uart_softc *sc, *sc0; 40127d5dc18SMarcel Moolenaar const char *sep; 40227d5dc18SMarcel Moolenaar int error; 40327d5dc18SMarcel Moolenaar 40427d5dc18SMarcel Moolenaar /* 40527d5dc18SMarcel Moolenaar * The sc_class field defines the type of UART we're going to work 40627d5dc18SMarcel Moolenaar * with and thus the size of the softc. Replace the generic softc 40727d5dc18SMarcel Moolenaar * with one that matches the UART now that we're certain we handle 40827d5dc18SMarcel Moolenaar * the device. 40927d5dc18SMarcel Moolenaar */ 41027d5dc18SMarcel Moolenaar sc0 = device_get_softc(dev); 41127d5dc18SMarcel Moolenaar if (sc0->sc_class->size > sizeof(*sc)) { 41227d5dc18SMarcel Moolenaar sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO); 41327d5dc18SMarcel Moolenaar bcopy(sc0, sc, sizeof(*sc)); 41427d5dc18SMarcel Moolenaar device_set_softc(dev, sc); 41527d5dc18SMarcel Moolenaar } else 41627d5dc18SMarcel Moolenaar sc = sc0; 41727d5dc18SMarcel Moolenaar 41827d5dc18SMarcel Moolenaar /* 41927d5dc18SMarcel Moolenaar * Protect ourselves against interrupts while we're not completely 42027d5dc18SMarcel Moolenaar * finished attaching and initializing. We don't expect interrupts 42127d5dc18SMarcel Moolenaar * until after UART_ATTACH() though. 42227d5dc18SMarcel Moolenaar */ 42327d5dc18SMarcel Moolenaar sc->sc_leaving = 1; 42427d5dc18SMarcel Moolenaar 4258af03381SMarcel Moolenaar mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN); 4268af03381SMarcel Moolenaar if (sc->sc_hwmtx == NULL) 4278af03381SMarcel Moolenaar sc->sc_hwmtx = &sc->sc_hwmtx_s; 42806287620SMarcel Moolenaar 42927d5dc18SMarcel Moolenaar /* 43027d5dc18SMarcel Moolenaar * Re-allocate. We expect that the softc contains the information 43127d5dc18SMarcel Moolenaar * collected by uart_bus_probe() intact. 43227d5dc18SMarcel Moolenaar */ 43327d5dc18SMarcel Moolenaar sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 434f8100ce2SMarcel Moolenaar 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE); 4352682e7b6SMarius Strobl if (sc->sc_rres == NULL) { 4368af03381SMarcel Moolenaar mtx_destroy(&sc->sc_hwmtx_s); 43727d5dc18SMarcel Moolenaar return (ENXIO); 4382682e7b6SMarius Strobl } 439b8759afcSYoshihiro Takahashi sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); 440b8759afcSYoshihiro Takahashi sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); 441b8759afcSYoshihiro Takahashi 44227d5dc18SMarcel Moolenaar sc->sc_irid = 0; 4435f96beb9SNate Lawson sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid, 4442682e7b6SMarius Strobl RF_ACTIVE | RF_SHAREABLE); 44527d5dc18SMarcel Moolenaar if (sc->sc_ires != NULL) { 44657fb5e60SJohn Baldwin error = bus_setup_intr(dev, 447ef544f63SPaolo Pisati sc->sc_ires, INTR_TYPE_TTY, 448ef544f63SPaolo Pisati uart_intr, NULL, sc, &sc->sc_icookie); 44927d5dc18SMarcel Moolenaar if (error) 45057fb5e60SJohn Baldwin error = bus_setup_intr(dev, 4515918c72dSMarcel Moolenaar sc->sc_ires, INTR_TYPE_TTY | INTR_MPSAFE, 452ef544f63SPaolo Pisati NULL, (driver_intr_t *)uart_intr, sc, &sc->sc_icookie); 45327d5dc18SMarcel Moolenaar else 45427d5dc18SMarcel Moolenaar sc->sc_fastintr = 1; 45527d5dc18SMarcel Moolenaar 45627d5dc18SMarcel Moolenaar if (error) { 45727d5dc18SMarcel Moolenaar device_printf(dev, "could not activate interrupt\n"); 45827d5dc18SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 45927d5dc18SMarcel Moolenaar sc->sc_ires); 46027d5dc18SMarcel Moolenaar sc->sc_ires = NULL; 46127d5dc18SMarcel Moolenaar } 46227d5dc18SMarcel Moolenaar } 46327d5dc18SMarcel Moolenaar if (sc->sc_ires == NULL) { 46427d5dc18SMarcel Moolenaar /* XXX no interrupt resource. Force polled mode. */ 46527d5dc18SMarcel Moolenaar sc->sc_polled = 1; 46627d5dc18SMarcel Moolenaar } 46727d5dc18SMarcel Moolenaar 468bc093719SEd Schouten sc->sc_rxbufsz = 384; 46927d5dc18SMarcel Moolenaar sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf), 47027d5dc18SMarcel Moolenaar M_UART, M_WAITOK); 47127d5dc18SMarcel Moolenaar sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf), 47227d5dc18SMarcel Moolenaar M_UART, M_WAITOK); 47327d5dc18SMarcel Moolenaar 47427d5dc18SMarcel Moolenaar error = UART_ATTACH(sc); 47527d5dc18SMarcel Moolenaar if (error) 47627d5dc18SMarcel Moolenaar goto fail; 47727d5dc18SMarcel Moolenaar 47827d5dc18SMarcel Moolenaar if (sc->sc_hwiflow || sc->sc_hwoflow) { 47927d5dc18SMarcel Moolenaar sep = ""; 48027d5dc18SMarcel Moolenaar device_print_prettyname(dev); 48127d5dc18SMarcel Moolenaar if (sc->sc_hwiflow) { 48227d5dc18SMarcel Moolenaar printf("%sRTS iflow", sep); 48327d5dc18SMarcel Moolenaar sep = ", "; 48427d5dc18SMarcel Moolenaar } 48527d5dc18SMarcel Moolenaar if (sc->sc_hwoflow) { 48627d5dc18SMarcel Moolenaar printf("%sCTS oflow", sep); 48727d5dc18SMarcel Moolenaar sep = ", "; 48827d5dc18SMarcel Moolenaar } 48927d5dc18SMarcel Moolenaar printf("\n"); 49027d5dc18SMarcel Moolenaar } 49127d5dc18SMarcel Moolenaar 49227d5dc18SMarcel Moolenaar if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) { 49327d5dc18SMarcel Moolenaar sep = ""; 49427d5dc18SMarcel Moolenaar device_print_prettyname(dev); 49527d5dc18SMarcel Moolenaar if (sc->sc_fastintr) { 49627d5dc18SMarcel Moolenaar printf("%sfast interrupt", sep); 49727d5dc18SMarcel Moolenaar sep = ", "; 49827d5dc18SMarcel Moolenaar } 49927d5dc18SMarcel Moolenaar if (sc->sc_polled) { 50027d5dc18SMarcel Moolenaar printf("%spolled mode", sep); 50127d5dc18SMarcel Moolenaar sep = ", "; 50227d5dc18SMarcel Moolenaar } 50327d5dc18SMarcel Moolenaar printf("\n"); 50427d5dc18SMarcel Moolenaar } 50527d5dc18SMarcel Moolenaar 50627d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL) { 50754e2bcc7SMarcel Moolenaar if (sc->sc_sysdev->baudrate == 0) { 50854e2bcc7SMarcel Moolenaar if (UART_IOCTL(sc, UART_IOCTL_BAUD, 50954e2bcc7SMarcel Moolenaar (intptr_t)&sc->sc_sysdev->baudrate) != 0) 51054e2bcc7SMarcel Moolenaar sc->sc_sysdev->baudrate = -1; 51154e2bcc7SMarcel Moolenaar } 51227d5dc18SMarcel Moolenaar switch (sc->sc_sysdev->type) { 51327d5dc18SMarcel Moolenaar case UART_DEV_CONSOLE: 51427d5dc18SMarcel Moolenaar device_printf(dev, "console"); 51527d5dc18SMarcel Moolenaar break; 51627d5dc18SMarcel Moolenaar case UART_DEV_DBGPORT: 51727d5dc18SMarcel Moolenaar device_printf(dev, "debug port"); 51827d5dc18SMarcel Moolenaar break; 51927d5dc18SMarcel Moolenaar case UART_DEV_KEYBOARD: 52027d5dc18SMarcel Moolenaar device_printf(dev, "keyboard"); 52127d5dc18SMarcel Moolenaar break; 52227d5dc18SMarcel Moolenaar default: 52327d5dc18SMarcel Moolenaar device_printf(dev, "unknown system device"); 52427d5dc18SMarcel Moolenaar break; 52527d5dc18SMarcel Moolenaar } 52627d5dc18SMarcel Moolenaar printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate, 52727d5dc18SMarcel Moolenaar "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits, 52827d5dc18SMarcel Moolenaar sc->sc_sysdev->stopbits); 52927d5dc18SMarcel Moolenaar } 53027d5dc18SMarcel Moolenaar 5318194412bSMarcel Moolenaar sc->sc_pps.ppscap = PPS_CAPTUREBOTH; 5328194412bSMarcel Moolenaar pps_init(&sc->sc_pps); 5338194412bSMarcel Moolenaar 53427d5dc18SMarcel Moolenaar error = (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) 53527d5dc18SMarcel Moolenaar ? (*sc->sc_sysdev->attach)(sc) : uart_tty_attach(sc); 53627d5dc18SMarcel Moolenaar if (error) 53727d5dc18SMarcel Moolenaar goto fail; 53827d5dc18SMarcel Moolenaar 5398af03381SMarcel Moolenaar if (sc->sc_sysdev != NULL) 5408af03381SMarcel Moolenaar sc->sc_sysdev->hwmtx = sc->sc_hwmtx; 5418af03381SMarcel Moolenaar 54227d5dc18SMarcel Moolenaar sc->sc_leaving = 0; 54327d5dc18SMarcel Moolenaar uart_intr(sc); 54427d5dc18SMarcel Moolenaar return (0); 54527d5dc18SMarcel Moolenaar 54627d5dc18SMarcel Moolenaar fail: 54727d5dc18SMarcel Moolenaar free(sc->sc_txbuf, M_UART); 54827d5dc18SMarcel Moolenaar free(sc->sc_rxbuf, M_UART); 54927d5dc18SMarcel Moolenaar 55027d5dc18SMarcel Moolenaar if (sc->sc_ires != NULL) { 55127d5dc18SMarcel Moolenaar bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 55227d5dc18SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 55327d5dc18SMarcel Moolenaar sc->sc_ires); 55427d5dc18SMarcel Moolenaar } 55527d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 55627d5dc18SMarcel Moolenaar 5578af03381SMarcel Moolenaar mtx_destroy(&sc->sc_hwmtx_s); 5582682e7b6SMarius Strobl 55927d5dc18SMarcel Moolenaar return (error); 56027d5dc18SMarcel Moolenaar } 56127d5dc18SMarcel Moolenaar 56227d5dc18SMarcel Moolenaar int 56327d5dc18SMarcel Moolenaar uart_bus_detach(device_t dev) 56427d5dc18SMarcel Moolenaar { 56527d5dc18SMarcel Moolenaar struct uart_softc *sc; 56627d5dc18SMarcel Moolenaar 56727d5dc18SMarcel Moolenaar sc = device_get_softc(dev); 56827d5dc18SMarcel Moolenaar 56927d5dc18SMarcel Moolenaar sc->sc_leaving = 1; 57027d5dc18SMarcel Moolenaar 5718af03381SMarcel Moolenaar if (sc->sc_sysdev != NULL) 5728af03381SMarcel Moolenaar sc->sc_sysdev->hwmtx = NULL; 5738af03381SMarcel Moolenaar 57427d5dc18SMarcel Moolenaar UART_DETACH(sc); 57527d5dc18SMarcel Moolenaar 57627d5dc18SMarcel Moolenaar if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL) 57727d5dc18SMarcel Moolenaar (*sc->sc_sysdev->detach)(sc); 57827d5dc18SMarcel Moolenaar else 57927d5dc18SMarcel Moolenaar uart_tty_detach(sc); 58027d5dc18SMarcel Moolenaar 58127d5dc18SMarcel Moolenaar free(sc->sc_txbuf, M_UART); 58227d5dc18SMarcel Moolenaar free(sc->sc_rxbuf, M_UART); 58327d5dc18SMarcel Moolenaar 58427d5dc18SMarcel Moolenaar if (sc->sc_ires != NULL) { 58527d5dc18SMarcel Moolenaar bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie); 58627d5dc18SMarcel Moolenaar bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, 58727d5dc18SMarcel Moolenaar sc->sc_ires); 58827d5dc18SMarcel Moolenaar } 58927d5dc18SMarcel Moolenaar bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres); 59027d5dc18SMarcel Moolenaar 5918af03381SMarcel Moolenaar mtx_destroy(&sc->sc_hwmtx_s); 5922682e7b6SMarius Strobl 59327d5dc18SMarcel Moolenaar if (sc->sc_class->size > sizeof(*sc)) { 59427d5dc18SMarcel Moolenaar device_set_softc(dev, NULL); 59527d5dc18SMarcel Moolenaar free(sc, M_UART); 59627d5dc18SMarcel Moolenaar } else 59727d5dc18SMarcel Moolenaar device_set_softc(dev, NULL); 59827d5dc18SMarcel Moolenaar 59927d5dc18SMarcel Moolenaar return (0); 60027d5dc18SMarcel Moolenaar } 601