xref: /freebsd-13.1/sys/dev/flash/mx25l.c (revision c03ab159)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2006 M. Warner Losh.  All rights reserved.
5  * Copyright (c) 2009 Oleksandr Tymoshenko.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include "opt_platform.h"
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bio.h>
36 #include <sys/bus.h>
37 #include <sys/conf.h>
38 #include <sys/kernel.h>
39 #include <sys/kthread.h>
40 #include <sys/lock.h>
41 #include <sys/mbuf.h>
42 #include <sys/malloc.h>
43 #include <sys/module.h>
44 #include <sys/mutex.h>
45 #include <geom/geom_disk.h>
46 
47 #ifdef FDT
48 #include <dev/fdt/fdt_common.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50 #include <dev/ofw/openfirm.h>
51 #endif
52 
53 #include <dev/spibus/spi.h>
54 #include "spibus_if.h"
55 
56 #include <dev/flash/mx25lreg.h>
57 
58 #define	FL_NONE			0x00
59 #define	FL_ERASE_4K		0x01
60 #define	FL_ERASE_32K		0x02
61 #define	FL_ENABLE_4B_ADDR	0x04
62 #define	FL_DISABLE_4B_ADDR	0x08
63 
64 /*
65  * Define the sectorsize to be a smaller size rather than the flash
66  * sector size. Trying to run FFS off of a 64k flash sector size
67  * results in a completely un-usable system.
68  */
69 #define	MX25L_SECTORSIZE	512
70 
71 struct mx25l_flash_ident
72 {
73 	const char	*name;
74 	uint8_t		manufacturer_id;
75 	uint16_t	device_id;
76 	unsigned int	sectorsize;
77 	unsigned int	sectorcount;
78 	unsigned int	flags;
79 };
80 
81 struct mx25l_softc
82 {
83 	device_t	sc_dev;
84 	device_t	sc_parent;
85 	uint8_t		sc_manufacturer_id;
86 	uint16_t	sc_device_id;
87 	unsigned int	sc_sectorsize;
88 	struct mtx	sc_mtx;
89 	struct disk	*sc_disk;
90 	struct proc	*sc_p;
91 	struct bio_queue_head sc_bio_queue;
92 	unsigned int	sc_flags;
93 	unsigned int	sc_taskstate;
94 	uint8_t		sc_dummybuf[FLASH_PAGE_SIZE];
95 };
96 
97 #define	TSTATE_STOPPED	0
98 #define	TSTATE_STOPPING	1
99 #define	TSTATE_RUNNING	2
100 
101 #define M25PXX_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
102 #define	M25PXX_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
103 #define M25PXX_LOCK_INIT(_sc) \
104 	mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \
105 	    "mx25l", MTX_DEF)
106 #define M25PXX_LOCK_DESTROY(_sc)	mtx_destroy(&_sc->sc_mtx);
107 #define M25PXX_ASSERT_LOCKED(_sc)	mtx_assert(&_sc->sc_mtx, MA_OWNED);
108 #define M25PXX_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
109 
110 /* disk routines */
111 static int mx25l_open(struct disk *dp);
112 static int mx25l_close(struct disk *dp);
113 static int mx25l_ioctl(struct disk *, u_long, void *, int, struct thread *);
114 static void mx25l_strategy(struct bio *bp);
115 static int mx25l_getattr(struct bio *bp);
116 static void mx25l_task(void *arg);
117 
118 struct mx25l_flash_ident flash_devices[] = {
119 	{ "en25f32",	0x1c, 0x3116, 64 * 1024, 64, FL_NONE },
120 	{ "en25p32",	0x1c, 0x2016, 64 * 1024, 64, FL_NONE },
121 	{ "en25p64",	0x1c, 0x2017, 64 * 1024, 128, FL_NONE },
122 	{ "en25q32",	0x1c, 0x3016, 64 * 1024, 64, FL_NONE },
123 	{ "en25q64",	0x1c, 0x3017, 64 * 1024, 128, FL_ERASE_4K },
124 	{ "m25p32",	0x20, 0x2016, 64 * 1024, 64, FL_NONE },
125 	{ "m25p64",	0x20, 0x2017, 64 * 1024, 128, FL_NONE },
126 	{ "mx25ll32",	0xc2, 0x2016, 64 * 1024, 64, FL_NONE },
127 	{ "mx25ll64",	0xc2, 0x2017, 64 * 1024, 128, FL_NONE },
128 	{ "mx25ll128",	0xc2, 0x2018, 64 * 1024, 256, FL_ERASE_4K | FL_ERASE_32K },
129 	{ "mx25ll256",	0xc2, 0x2019, 64 * 1024, 512, FL_ERASE_4K | FL_ERASE_32K | FL_ENABLE_4B_ADDR },
130 	{ "s25fl032",	0x01, 0x0215, 64 * 1024, 64, FL_NONE },
131 	{ "s25fl064",	0x01, 0x0216, 64 * 1024, 128, FL_NONE },
132 	{ "s25fl128",	0x01, 0x2018, 64 * 1024, 256, FL_NONE },
133 	{ "s25fl256s",	0x01, 0x0219, 64 * 1024, 512, FL_NONE },
134 	{ "SST25VF010A", 0xbf, 0x2549, 4 * 1024, 32, FL_ERASE_4K | FL_ERASE_32K },
135 	{ "SST25VF032B", 0xbf, 0x254a, 64 * 1024, 64, FL_ERASE_4K | FL_ERASE_32K },
136 
137 	/* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
138 	{ "w25x32",	0xef, 0x3016, 64 * 1024, 64, FL_ERASE_4K },
139 	{ "w25x64",	0xef, 0x3017, 64 * 1024, 128, FL_ERASE_4K },
140 	{ "w25q32",	0xef, 0x4016, 64 * 1024, 64, FL_ERASE_4K },
141 	{ "w25q64",	0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K },
142 	{ "w25q64bv",	0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K },
143 	{ "w25q128",	0xef, 0x4018, 64 * 1024, 256, FL_ERASE_4K },
144 	{ "w25q256",	0xef, 0x4019, 64 * 1024, 512, FL_ERASE_4K },
145 
146 	 /* Atmel */
147 	{ "at25df641",  0x1f, 0x4800, 64 * 1024, 128, FL_ERASE_4K },
148 
149 	/* GigaDevice */
150 	{ "gd25q64",	0xc8, 0x4017, 64 * 1024, 128, FL_ERASE_4K },
151 };
152 
153 static int
154 mx25l_wait_for_device_ready(struct mx25l_softc *sc)
155 {
156 	uint8_t txBuf[2], rxBuf[2];
157 	struct spi_command cmd;
158 	int err;
159 
160 	memset(&cmd, 0, sizeof(cmd));
161 
162 	do {
163 		txBuf[0] = CMD_READ_STATUS;
164 		cmd.tx_cmd = txBuf;
165 		cmd.rx_cmd = rxBuf;
166 		cmd.rx_cmd_sz = 2;
167 		cmd.tx_cmd_sz = 2;
168 		err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
169 	} while (err == 0 && (rxBuf[1] & STATUS_WIP));
170 
171 	return (err);
172 }
173 
174 static struct mx25l_flash_ident*
175 mx25l_get_device_ident(struct mx25l_softc *sc)
176 {
177 	uint8_t txBuf[8], rxBuf[8];
178 	struct spi_command cmd;
179 	uint8_t manufacturer_id;
180 	uint16_t dev_id;
181 	int err, i;
182 
183 	memset(&cmd, 0, sizeof(cmd));
184 	memset(txBuf, 0, sizeof(txBuf));
185 	memset(rxBuf, 0, sizeof(rxBuf));
186 
187 	txBuf[0] = CMD_READ_IDENT;
188 	cmd.tx_cmd = &txBuf;
189 	cmd.rx_cmd = &rxBuf;
190 	/*
191 	 * Some compatible devices has extended two-bytes ID
192 	 * We'll use only manufacturer/deviceid atm
193 	 */
194 	cmd.tx_cmd_sz = 4;
195 	cmd.rx_cmd_sz = 4;
196 	err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
197 	if (err)
198 		return (NULL);
199 
200 	manufacturer_id = rxBuf[1];
201 	dev_id = (rxBuf[2] << 8) | (rxBuf[3]);
202 
203 	for (i = 0; i < nitems(flash_devices); i++) {
204 		if ((flash_devices[i].manufacturer_id == manufacturer_id) &&
205 		    (flash_devices[i].device_id == dev_id))
206 			return &flash_devices[i];
207 	}
208 
209 	device_printf(sc->sc_dev,
210 	    "Unknown SPI flash device. Vendor: %02x, device id: %04x\n",
211 	    manufacturer_id, dev_id);
212 	return (NULL);
213 }
214 
215 static int
216 mx25l_set_writable(struct mx25l_softc *sc, int writable)
217 {
218 	uint8_t txBuf[1], rxBuf[1];
219 	struct spi_command cmd;
220 	int err;
221 
222 	memset(&cmd, 0, sizeof(cmd));
223 	memset(txBuf, 0, sizeof(txBuf));
224 	memset(rxBuf, 0, sizeof(rxBuf));
225 
226 	txBuf[0] = writable ? CMD_WRITE_ENABLE : CMD_WRITE_DISABLE;
227 	cmd.tx_cmd = txBuf;
228 	cmd.rx_cmd = rxBuf;
229 	cmd.rx_cmd_sz = 1;
230 	cmd.tx_cmd_sz = 1;
231 	err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
232 	return (err);
233 }
234 
235 static int
236 mx25l_erase_cmd(struct mx25l_softc *sc, off_t sector, uint8_t ecmd)
237 {
238 	uint8_t txBuf[5], rxBuf[5];
239 	struct spi_command cmd;
240 	int err;
241 
242 	if ((err = mx25l_set_writable(sc, 1)) != 0)
243 		return (err);
244 
245 	memset(&cmd, 0, sizeof(cmd));
246 	memset(txBuf, 0, sizeof(txBuf));
247 	memset(rxBuf, 0, sizeof(rxBuf));
248 
249 	txBuf[0] = ecmd;
250 	cmd.tx_cmd = txBuf;
251 	cmd.rx_cmd = rxBuf;
252 	if (sc->sc_flags & FL_ENABLE_4B_ADDR) {
253 		cmd.rx_cmd_sz = 5;
254 		cmd.tx_cmd_sz = 5;
255 		txBuf[1] = ((sector >> 24) & 0xff);
256 		txBuf[2] = ((sector >> 16) & 0xff);
257 		txBuf[3] = ((sector >> 8) & 0xff);
258 		txBuf[4] = (sector & 0xff);
259 	} else {
260 		cmd.rx_cmd_sz = 4;
261 		cmd.tx_cmd_sz = 4;
262 		txBuf[1] = ((sector >> 16) & 0xff);
263 		txBuf[2] = ((sector >> 8) & 0xff);
264 		txBuf[3] = (sector & 0xff);
265 	}
266 	if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) != 0)
267 		return (err);
268 	err = mx25l_wait_for_device_ready(sc);
269 	return (err);
270 }
271 
272 static int
273 mx25l_write(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count)
274 {
275 	uint8_t txBuf[8], rxBuf[8];
276 	struct spi_command cmd;
277 	off_t bytes_to_write;
278 	int err = 0;
279 
280 	if (sc->sc_flags & FL_ENABLE_4B_ADDR) {
281 		cmd.tx_cmd_sz = 5;
282 		cmd.rx_cmd_sz = 5;
283 	} else {
284 		cmd.tx_cmd_sz = 4;
285 		cmd.rx_cmd_sz = 4;
286 	}
287 
288 	/*
289 	 * Writes must be aligned to the erase sectorsize, since blocks are
290 	 * fully erased before they're written to.
291 	 */
292 	if (count % sc->sc_sectorsize != 0 || offset % sc->sc_sectorsize != 0)
293 		return (EIO);
294 
295 	/*
296 	 * Maximum write size for CMD_PAGE_PROGRAM is FLASH_PAGE_SIZE, so loop
297 	 * to write chunks of FLASH_PAGE_SIZE bytes each.
298 	 */
299 	while (count != 0) {
300 		/* If we crossed a sector boundary, erase the next sector. */
301 		if (((offset) % sc->sc_sectorsize) == 0) {
302 			err = mx25l_erase_cmd(sc, offset, CMD_SECTOR_ERASE);
303 			if (err)
304 				break;
305 		}
306 
307 		txBuf[0] = CMD_PAGE_PROGRAM;
308 		if (sc->sc_flags & FL_ENABLE_4B_ADDR) {
309 			txBuf[1] = (offset >> 24) & 0xff;
310 			txBuf[2] = (offset >> 16) & 0xff;
311 			txBuf[3] = (offset >> 8) & 0xff;
312 			txBuf[4] = offset & 0xff;
313 		} else {
314 			txBuf[1] = (offset >> 16) & 0xff;
315 			txBuf[2] = (offset >> 8) & 0xff;
316 			txBuf[3] = offset & 0xff;
317 		}
318 
319 		bytes_to_write = MIN(FLASH_PAGE_SIZE, count);
320 		cmd.tx_cmd = txBuf;
321 		cmd.rx_cmd = rxBuf;
322 		cmd.tx_data = data;
323 		cmd.rx_data = sc->sc_dummybuf;
324 		cmd.tx_data_sz = (uint32_t)bytes_to_write;
325 		cmd.rx_data_sz = (uint32_t)bytes_to_write;
326 
327 		/*
328 		 * Each completed write operation resets WEL (write enable
329 		 * latch) to disabled state, so we re-enable it here.
330 		 */
331 		if ((err = mx25l_wait_for_device_ready(sc)) != 0)
332 			break;
333 		if ((err = mx25l_set_writable(sc, 1)) != 0)
334 			break;
335 
336 		err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
337 		if (err != 0)
338 			break;
339 		err = mx25l_wait_for_device_ready(sc);
340 		if (err)
341 			break;
342 
343 		data   += bytes_to_write;
344 		offset += bytes_to_write;
345 		count  -= bytes_to_write;
346 	}
347 
348 	return (err);
349 }
350 
351 static int
352 mx25l_read(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count)
353 {
354 	uint8_t txBuf[8], rxBuf[8];
355 	struct spi_command cmd;
356 	int err = 0;
357 
358 	/*
359 	 * Enforce that reads are aligned to the disk sectorsize, not the
360 	 * erase sectorsize.  In this way, smaller read IO is possible,
361 	 * dramatically speeding up filesystem/geom_compress access.
362 	 */
363 	if (count % sc->sc_disk->d_sectorsize != 0 ||
364 	    offset % sc->sc_disk->d_sectorsize != 0)
365 		return (EIO);
366 
367 	txBuf[0] = CMD_FAST_READ;
368 	if (sc->sc_flags & FL_ENABLE_4B_ADDR) {
369 		cmd.tx_cmd_sz = 6;
370 		cmd.rx_cmd_sz = 6;
371 
372 		txBuf[1] = (offset >> 24) & 0xff;
373 		txBuf[2] = (offset >> 16) & 0xff;
374 		txBuf[3] = (offset >> 8) & 0xff;
375 		txBuf[4] = offset & 0xff;
376 		/* Dummy byte */
377 		txBuf[5] = 0;
378 	} else {
379 		cmd.tx_cmd_sz = 5;
380 		cmd.rx_cmd_sz = 5;
381 
382 		txBuf[1] = (offset >> 16) & 0xff;
383 		txBuf[2] = (offset >> 8) & 0xff;
384 		txBuf[3] = offset & 0xff;
385 		/* Dummy byte */
386 		txBuf[4] = 0;
387 	}
388 
389 	cmd.tx_cmd = txBuf;
390 	cmd.rx_cmd = rxBuf;
391 	cmd.tx_data = data;
392 	cmd.rx_data = data;
393 	cmd.tx_data_sz = count;
394 	cmd.rx_data_sz = count;
395 
396 	err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
397 	return (err);
398 }
399 
400 static int
401 mx25l_set_4b_mode(struct mx25l_softc *sc, uint8_t command)
402 {
403 	uint8_t txBuf[1], rxBuf[1];
404 	struct spi_command cmd;
405 	int err;
406 
407 	memset(&cmd, 0, sizeof(cmd));
408 	memset(txBuf, 0, sizeof(txBuf));
409 	memset(rxBuf, 0, sizeof(rxBuf));
410 
411 	cmd.tx_cmd_sz = cmd.rx_cmd_sz = 1;
412 
413 	cmd.tx_cmd = txBuf;
414 	cmd.rx_cmd = rxBuf;
415 
416 	txBuf[0] = command;
417 
418 	if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) == 0)
419 		err = mx25l_wait_for_device_ready(sc);
420 
421 	return (err);
422 }
423 
424 #ifdef	FDT
425 static struct ofw_compat_data compat_data[] = {
426 	{ "st,m25p",		1 },
427 	{ "jedec,spi-nor",	1 },
428 	{ NULL,			0 },
429 };
430 #endif
431 
432 static int
433 mx25l_probe(device_t dev)
434 {
435 #ifdef FDT
436 	int i;
437 
438 	if (!ofw_bus_status_okay(dev))
439 		return (ENXIO);
440 
441 	/* First try to match the compatible property to the compat_data */
442 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 1)
443 		goto found;
444 
445 	/*
446 	 * Next, try to find a compatible device using the names in the
447 	 * flash_devices structure
448 	 */
449 	for (i = 0; i < nitems(flash_devices); i++)
450 		if (ofw_bus_is_compatible(dev, flash_devices[i].name))
451 			goto found;
452 
453 	return (ENXIO);
454 found:
455 #endif
456 	device_set_desc(dev, "M25Pxx Flash Family");
457 
458 	return (0);
459 }
460 
461 static int
462 mx25l_attach(device_t dev)
463 {
464 	struct mx25l_softc *sc;
465 	struct mx25l_flash_ident *ident;
466 	int err;
467 
468 	sc = device_get_softc(dev);
469 	sc->sc_dev = dev;
470 	sc->sc_parent = device_get_parent(sc->sc_dev);
471 
472 	M25PXX_LOCK_INIT(sc);
473 
474 	ident = mx25l_get_device_ident(sc);
475 	if (ident == NULL)
476 		return (ENXIO);
477 
478 	if ((err = mx25l_wait_for_device_ready(sc)) != 0)
479 		return (err);
480 
481 	if (sc->sc_flags & FL_ENABLE_4B_ADDR) {
482 		if ((err = mx25l_set_4b_mode(sc, CMD_ENTER_4B_MODE)) != 0)
483 			return (err);
484 	} else if (sc->sc_flags & FL_DISABLE_4B_ADDR) {
485 		if ((err = mx25l_set_4b_mode(sc, CMD_EXIT_4B_MODE)) != 0)
486 			return (err);
487 	}
488 
489 	sc->sc_disk = disk_alloc();
490 	sc->sc_disk->d_open = mx25l_open;
491 	sc->sc_disk->d_close = mx25l_close;
492 	sc->sc_disk->d_strategy = mx25l_strategy;
493 	sc->sc_disk->d_getattr = mx25l_getattr;
494 	sc->sc_disk->d_ioctl = mx25l_ioctl;
495 	sc->sc_disk->d_name = "flash/spi";
496 	sc->sc_disk->d_drv1 = sc;
497 	sc->sc_disk->d_maxsize = DFLTPHYS;
498 	sc->sc_disk->d_sectorsize = MX25L_SECTORSIZE;
499 	sc->sc_disk->d_mediasize = ident->sectorsize * ident->sectorcount;
500 	sc->sc_disk->d_unit = device_get_unit(sc->sc_dev);
501 	sc->sc_disk->d_dump = NULL;		/* NB: no dumps */
502 	/* Sectorsize for erase operations */
503 	sc->sc_sectorsize =  ident->sectorsize;
504 	sc->sc_flags = ident->flags;
505 
506 	/* NB: use stripesize to hold the erase/region size for RedBoot */
507 	sc->sc_disk->d_stripesize = ident->sectorsize;
508 
509 	disk_create(sc->sc_disk, DISK_VERSION);
510 	bioq_init(&sc->sc_bio_queue);
511 
512 	kproc_create(&mx25l_task, sc, &sc->sc_p, 0, 0, "task: mx25l flash");
513 	sc->sc_taskstate = TSTATE_RUNNING;
514 
515 	device_printf(sc->sc_dev, "%s, sector %d bytes, %d sectors\n",
516 	    ident->name, ident->sectorsize, ident->sectorcount);
517 
518 	return (0);
519 }
520 
521 static int
522 mx25l_detach(device_t dev)
523 {
524 	struct mx25l_softc *sc;
525 	int err;
526 
527 	sc = device_get_softc(dev);
528 	err = 0;
529 
530 	M25PXX_LOCK(sc);
531 	if (sc->sc_taskstate == TSTATE_RUNNING) {
532 		sc->sc_taskstate = TSTATE_STOPPING;
533 		wakeup(sc);
534 		while (err == 0 && sc->sc_taskstate != TSTATE_STOPPED) {
535 			err = msleep(sc, &sc->sc_mtx, 0, "mx25dt", hz * 3);
536 			if (err != 0) {
537 				sc->sc_taskstate = TSTATE_RUNNING;
538 				device_printf(sc->sc_dev,
539 				    "Failed to stop queue task\n");
540 			}
541 		}
542 	}
543 	M25PXX_UNLOCK(sc);
544 
545 	if (err == 0 && sc->sc_taskstate == TSTATE_STOPPED) {
546 		disk_destroy(sc->sc_disk);
547 		bioq_flush(&sc->sc_bio_queue, NULL, ENXIO);
548 		M25PXX_LOCK_DESTROY(sc);
549 	}
550 	return (err);
551 }
552 
553 static int
554 mx25l_open(struct disk *dp)
555 {
556 	return (0);
557 }
558 
559 static int
560 mx25l_close(struct disk *dp)
561 {
562 
563 	return (0);
564 }
565 
566 static int
567 mx25l_ioctl(struct disk *dp, u_long cmd, void *data, int fflag,
568 	struct thread *td)
569 {
570 
571 	return (EINVAL);
572 }
573 
574 static void
575 mx25l_strategy(struct bio *bp)
576 {
577 	struct mx25l_softc *sc;
578 
579 	sc = (struct mx25l_softc *)bp->bio_disk->d_drv1;
580 	M25PXX_LOCK(sc);
581 	bioq_disksort(&sc->sc_bio_queue, bp);
582 	wakeup(sc);
583 	M25PXX_UNLOCK(sc);
584 }
585 
586 static int
587 mx25l_getattr(struct bio *bp)
588 {
589 	struct mx25l_softc *sc;
590 	device_t dev;
591 
592 	if (bp->bio_disk == NULL || bp->bio_disk->d_drv1 == NULL)
593 		return (ENXIO);
594 
595 	sc = bp->bio_disk->d_drv1;
596 	dev = sc->sc_dev;
597 
598 	if (strcmp(bp->bio_attribute, "SPI::device") == 0) {
599 		if (bp->bio_length != sizeof(dev))
600 			return (EFAULT);
601 		bcopy(&dev, bp->bio_data, sizeof(dev));
602 	} else
603 		return (-1);
604 	return (0);
605 }
606 
607 static void
608 mx25l_task(void *arg)
609 {
610 	struct mx25l_softc *sc = (struct mx25l_softc*)arg;
611 	struct bio *bp;
612 	device_t dev;
613 
614 	for (;;) {
615 		dev = sc->sc_dev;
616 		M25PXX_LOCK(sc);
617 		do {
618 			if (sc->sc_taskstate == TSTATE_STOPPING) {
619 				sc->sc_taskstate = TSTATE_STOPPED;
620 				M25PXX_UNLOCK(sc);
621 				wakeup(sc);
622 				kproc_exit(0);
623 			}
624 			bp = bioq_first(&sc->sc_bio_queue);
625 			if (bp == NULL)
626 				msleep(sc, &sc->sc_mtx, PRIBIO, "mx25jq", 0);
627 		} while (bp == NULL);
628 		bioq_remove(&sc->sc_bio_queue, bp);
629 		M25PXX_UNLOCK(sc);
630 
631 		switch (bp->bio_cmd) {
632 		case BIO_READ:
633 			bp->bio_error = mx25l_read(sc, bp->bio_offset,
634 			    bp->bio_data, bp->bio_bcount);
635 			break;
636 		case BIO_WRITE:
637 			bp->bio_error = mx25l_write(sc, bp->bio_offset,
638 			    bp->bio_data, bp->bio_bcount);
639 			break;
640 		default:
641 			bp->bio_error = EINVAL;
642 		}
643 
644 
645 		biodone(bp);
646 	}
647 }
648 
649 static devclass_t mx25l_devclass;
650 
651 static device_method_t mx25l_methods[] = {
652 	/* Device interface */
653 	DEVMETHOD(device_probe,		mx25l_probe),
654 	DEVMETHOD(device_attach,	mx25l_attach),
655 	DEVMETHOD(device_detach,	mx25l_detach),
656 
657 	{ 0, 0 }
658 };
659 
660 static driver_t mx25l_driver = {
661 	"mx25l",
662 	mx25l_methods,
663 	sizeof(struct mx25l_softc),
664 };
665 
666 DRIVER_MODULE(mx25l, spibus, mx25l_driver, mx25l_devclass, 0, 0);
667 MODULE_DEPEND(mx25l, spibus, 1, 1, 1);
668