xref: /freebsd-13.1/sys/dev/flash/mx25l.c (revision 3c9af13c)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2006 M. Warner Losh.  All rights reserved.
5  * Copyright (c) 2009 Oleksandr Tymoshenko.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include "opt_platform.h"
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bio.h>
36 #include <sys/bus.h>
37 #include <sys/conf.h>
38 #include <sys/kernel.h>
39 #include <sys/kthread.h>
40 #include <sys/lock.h>
41 #include <sys/mbuf.h>
42 #include <sys/malloc.h>
43 #include <sys/module.h>
44 #include <sys/mutex.h>
45 #include <geom/geom_disk.h>
46 
47 #ifdef FDT
48 #include <dev/fdt/fdt_common.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50 #include <dev/ofw/openfirm.h>
51 #endif
52 
53 #include <dev/spibus/spi.h>
54 #include "spibus_if.h"
55 
56 #include <dev/flash/mx25lreg.h>
57 
58 #define	FL_NONE			0x00
59 #define	FL_ERASE_4K		0x01
60 #define	FL_ERASE_32K		0x02
61 #define	FL_ENABLE_4B_ADDR	0x04
62 #define	FL_DISABLE_4B_ADDR	0x08
63 
64 /*
65  * Define the sectorsize to be a smaller size rather than the flash
66  * sector size. Trying to run FFS off of a 64k flash sector size
67  * results in a completely un-usable system.
68  */
69 #define	MX25L_SECTORSIZE	512
70 
71 struct mx25l_flash_ident
72 {
73 	const char	*name;
74 	uint8_t		manufacturer_id;
75 	uint16_t	device_id;
76 	unsigned int	sectorsize;
77 	unsigned int	sectorcount;
78 	unsigned int	flags;
79 };
80 
81 struct mx25l_softc
82 {
83 	device_t	sc_dev;
84 	device_t	sc_parent;
85 	uint8_t		sc_manufacturer_id;
86 	uint16_t	sc_device_id;
87 	unsigned int	sc_erasesize;
88 	struct mtx	sc_mtx;
89 	struct disk	*sc_disk;
90 	struct proc	*sc_p;
91 	struct bio_queue_head sc_bio_queue;
92 	unsigned int	sc_flags;
93 	unsigned int	sc_taskstate;
94 	uint8_t		sc_dummybuf[FLASH_PAGE_SIZE];
95 };
96 
97 #define	TSTATE_STOPPED	0
98 #define	TSTATE_STOPPING	1
99 #define	TSTATE_RUNNING	2
100 
101 #define M25PXX_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
102 #define	M25PXX_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
103 #define M25PXX_LOCK_INIT(_sc) \
104 	mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \
105 	    "mx25l", MTX_DEF)
106 #define M25PXX_LOCK_DESTROY(_sc)	mtx_destroy(&_sc->sc_mtx);
107 #define M25PXX_ASSERT_LOCKED(_sc)	mtx_assert(&_sc->sc_mtx, MA_OWNED);
108 #define M25PXX_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
109 
110 /* disk routines */
111 static int mx25l_open(struct disk *dp);
112 static int mx25l_close(struct disk *dp);
113 static int mx25l_ioctl(struct disk *, u_long, void *, int, struct thread *);
114 static void mx25l_strategy(struct bio *bp);
115 static int mx25l_getattr(struct bio *bp);
116 static void mx25l_task(void *arg);
117 
118 struct mx25l_flash_ident flash_devices[] = {
119 	{ "en25f32",	0x1c, 0x3116, 64 * 1024, 64, FL_NONE },
120 	{ "en25p32",	0x1c, 0x2016, 64 * 1024, 64, FL_NONE },
121 	{ "en25p64",	0x1c, 0x2017, 64 * 1024, 128, FL_NONE },
122 	{ "en25q32",	0x1c, 0x3016, 64 * 1024, 64, FL_NONE },
123 	{ "en25q64",	0x1c, 0x3017, 64 * 1024, 128, FL_ERASE_4K },
124 	{ "m25p32",	0x20, 0x2016, 64 * 1024, 64, FL_NONE },
125 	{ "m25p64",	0x20, 0x2017, 64 * 1024, 128, FL_NONE },
126 	{ "mx25ll32",	0xc2, 0x2016, 64 * 1024, 64, FL_NONE },
127 	{ "mx25ll64",	0xc2, 0x2017, 64 * 1024, 128, FL_NONE },
128 	{ "mx25ll128",	0xc2, 0x2018, 64 * 1024, 256, FL_ERASE_4K | FL_ERASE_32K },
129 	{ "mx25ll256",	0xc2, 0x2019, 64 * 1024, 512, FL_ERASE_4K | FL_ERASE_32K | FL_ENABLE_4B_ADDR },
130 	{ "s25fl032",	0x01, 0x0215, 64 * 1024, 64, FL_NONE },
131 	{ "s25fl064",	0x01, 0x0216, 64 * 1024, 128, FL_NONE },
132 	{ "s25fl128",	0x01, 0x2018, 64 * 1024, 256, FL_NONE },
133 	{ "s25fl256s",	0x01, 0x0219, 64 * 1024, 512, FL_NONE },
134 	{ "SST25VF010A", 0xbf, 0x2549, 4 * 1024, 32, FL_ERASE_4K | FL_ERASE_32K },
135 	{ "SST25VF032B", 0xbf, 0x254a, 64 * 1024, 64, FL_ERASE_4K | FL_ERASE_32K },
136 
137 	/* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
138 	{ "w25x32",	0xef, 0x3016, 64 * 1024, 64, FL_ERASE_4K },
139 	{ "w25x64",	0xef, 0x3017, 64 * 1024, 128, FL_ERASE_4K },
140 	{ "w25q32",	0xef, 0x4016, 64 * 1024, 64, FL_ERASE_4K },
141 	{ "w25q64",	0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K },
142 	{ "w25q64bv",	0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K },
143 	{ "w25q128",	0xef, 0x4018, 64 * 1024, 256, FL_ERASE_4K },
144 	{ "w25q256",	0xef, 0x4019, 64 * 1024, 512, FL_ERASE_4K },
145 
146 	 /* Atmel */
147 	{ "at25df641",  0x1f, 0x4800, 64 * 1024, 128, FL_ERASE_4K },
148 
149 	/* GigaDevice */
150 	{ "gd25q64",	0xc8, 0x4017, 64 * 1024, 128, FL_ERASE_4K },
151 };
152 
153 static int
154 mx25l_wait_for_device_ready(struct mx25l_softc *sc)
155 {
156 	uint8_t txBuf[2], rxBuf[2];
157 	struct spi_command cmd;
158 	int err;
159 
160 	memset(&cmd, 0, sizeof(cmd));
161 
162 	do {
163 		txBuf[0] = CMD_READ_STATUS;
164 		cmd.tx_cmd = txBuf;
165 		cmd.rx_cmd = rxBuf;
166 		cmd.rx_cmd_sz = 2;
167 		cmd.tx_cmd_sz = 2;
168 		err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
169 	} while (err == 0 && (rxBuf[1] & STATUS_WIP));
170 
171 	return (err);
172 }
173 
174 static struct mx25l_flash_ident*
175 mx25l_get_device_ident(struct mx25l_softc *sc)
176 {
177 	uint8_t txBuf[8], rxBuf[8];
178 	struct spi_command cmd;
179 	uint8_t manufacturer_id;
180 	uint16_t dev_id;
181 	int err, i;
182 
183 	memset(&cmd, 0, sizeof(cmd));
184 	memset(txBuf, 0, sizeof(txBuf));
185 	memset(rxBuf, 0, sizeof(rxBuf));
186 
187 	txBuf[0] = CMD_READ_IDENT;
188 	cmd.tx_cmd = &txBuf;
189 	cmd.rx_cmd = &rxBuf;
190 	/*
191 	 * Some compatible devices has extended two-bytes ID
192 	 * We'll use only manufacturer/deviceid atm
193 	 */
194 	cmd.tx_cmd_sz = 4;
195 	cmd.rx_cmd_sz = 4;
196 	err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
197 	if (err)
198 		return (NULL);
199 
200 	manufacturer_id = rxBuf[1];
201 	dev_id = (rxBuf[2] << 8) | (rxBuf[3]);
202 
203 	for (i = 0; i < nitems(flash_devices); i++) {
204 		if ((flash_devices[i].manufacturer_id == manufacturer_id) &&
205 		    (flash_devices[i].device_id == dev_id))
206 			return &flash_devices[i];
207 	}
208 
209 	device_printf(sc->sc_dev,
210 	    "Unknown SPI flash device. Vendor: %02x, device id: %04x\n",
211 	    manufacturer_id, dev_id);
212 	return (NULL);
213 }
214 
215 static int
216 mx25l_set_writable(struct mx25l_softc *sc, int writable)
217 {
218 	uint8_t txBuf[1], rxBuf[1];
219 	struct spi_command cmd;
220 	int err;
221 
222 	memset(&cmd, 0, sizeof(cmd));
223 	memset(txBuf, 0, sizeof(txBuf));
224 	memset(rxBuf, 0, sizeof(rxBuf));
225 
226 	txBuf[0] = writable ? CMD_WRITE_ENABLE : CMD_WRITE_DISABLE;
227 	cmd.tx_cmd = txBuf;
228 	cmd.rx_cmd = rxBuf;
229 	cmd.rx_cmd_sz = 1;
230 	cmd.tx_cmd_sz = 1;
231 	err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
232 	return (err);
233 }
234 
235 static int
236 mx25l_erase_cmd(struct mx25l_softc *sc, off_t sector)
237 {
238 	uint8_t txBuf[5], rxBuf[5];
239 	struct spi_command cmd;
240 	int err;
241 
242 	if ((err = mx25l_set_writable(sc, 1)) != 0)
243 		return (err);
244 
245 	memset(&cmd, 0, sizeof(cmd));
246 	memset(txBuf, 0, sizeof(txBuf));
247 	memset(rxBuf, 0, sizeof(rxBuf));
248 
249 	cmd.tx_cmd = txBuf;
250 	cmd.rx_cmd = rxBuf;
251 
252 	if (sc->sc_flags & FL_ERASE_4K)
253 		txBuf[0] = CMD_BLOCK_4K_ERASE;
254 	else if (sc->sc_flags & FL_ERASE_32K)
255 		txBuf[0] = CMD_BLOCK_32K_ERASE;
256 	else
257 		txBuf[0] = CMD_SECTOR_ERASE;
258 
259 	if (sc->sc_flags & FL_ENABLE_4B_ADDR) {
260 		cmd.rx_cmd_sz = 5;
261 		cmd.tx_cmd_sz = 5;
262 		txBuf[1] = ((sector >> 24) & 0xff);
263 		txBuf[2] = ((sector >> 16) & 0xff);
264 		txBuf[3] = ((sector >> 8) & 0xff);
265 		txBuf[4] = (sector & 0xff);
266 	} else {
267 		cmd.rx_cmd_sz = 4;
268 		cmd.tx_cmd_sz = 4;
269 		txBuf[1] = ((sector >> 16) & 0xff);
270 		txBuf[2] = ((sector >> 8) & 0xff);
271 		txBuf[3] = (sector & 0xff);
272 	}
273 	if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) != 0)
274 		return (err);
275 	err = mx25l_wait_for_device_ready(sc);
276 	return (err);
277 }
278 
279 static int
280 mx25l_write(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count)
281 {
282 	uint8_t txBuf[8], rxBuf[8];
283 	struct spi_command cmd;
284 	off_t bytes_to_write;
285 	int err = 0;
286 
287 	if (sc->sc_flags & FL_ENABLE_4B_ADDR) {
288 		cmd.tx_cmd_sz = 5;
289 		cmd.rx_cmd_sz = 5;
290 	} else {
291 		cmd.tx_cmd_sz = 4;
292 		cmd.rx_cmd_sz = 4;
293 	}
294 
295 	/*
296 	 * Writes must be aligned to the erase sectorsize, since blocks are
297 	 * fully erased before they're written to.
298 	 */
299 	if (count % sc->sc_erasesize != 0 || offset % sc->sc_erasesize != 0)
300 		return (EIO);
301 
302 	/*
303 	 * Maximum write size for CMD_PAGE_PROGRAM is FLASH_PAGE_SIZE, so loop
304 	 * to write chunks of FLASH_PAGE_SIZE bytes each.
305 	 */
306 	while (count != 0) {
307 		/* If we crossed a sector boundary, erase the next sector. */
308 		if (((offset) % sc->sc_erasesize) == 0) {
309 			err = mx25l_erase_cmd(sc, offset);
310 			if (err)
311 				break;
312 		}
313 
314 		txBuf[0] = CMD_PAGE_PROGRAM;
315 		if (sc->sc_flags & FL_ENABLE_4B_ADDR) {
316 			txBuf[1] = (offset >> 24) & 0xff;
317 			txBuf[2] = (offset >> 16) & 0xff;
318 			txBuf[3] = (offset >> 8) & 0xff;
319 			txBuf[4] = offset & 0xff;
320 		} else {
321 			txBuf[1] = (offset >> 16) & 0xff;
322 			txBuf[2] = (offset >> 8) & 0xff;
323 			txBuf[3] = offset & 0xff;
324 		}
325 
326 		bytes_to_write = MIN(FLASH_PAGE_SIZE, count);
327 		cmd.tx_cmd = txBuf;
328 		cmd.rx_cmd = rxBuf;
329 		cmd.tx_data = data;
330 		cmd.rx_data = sc->sc_dummybuf;
331 		cmd.tx_data_sz = (uint32_t)bytes_to_write;
332 		cmd.rx_data_sz = (uint32_t)bytes_to_write;
333 
334 		/*
335 		 * Each completed write operation resets WEL (write enable
336 		 * latch) to disabled state, so we re-enable it here.
337 		 */
338 		if ((err = mx25l_wait_for_device_ready(sc)) != 0)
339 			break;
340 		if ((err = mx25l_set_writable(sc, 1)) != 0)
341 			break;
342 
343 		err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
344 		if (err != 0)
345 			break;
346 		err = mx25l_wait_for_device_ready(sc);
347 		if (err)
348 			break;
349 
350 		data   += bytes_to_write;
351 		offset += bytes_to_write;
352 		count  -= bytes_to_write;
353 	}
354 
355 	return (err);
356 }
357 
358 static int
359 mx25l_read(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count)
360 {
361 	uint8_t txBuf[8], rxBuf[8];
362 	struct spi_command cmd;
363 	int err = 0;
364 
365 	/*
366 	 * Enforce that reads are aligned to the disk sectorsize, not the
367 	 * erase sectorsize.  In this way, smaller read IO is possible,
368 	 * dramatically speeding up filesystem/geom_compress access.
369 	 */
370 	if (count % sc->sc_disk->d_sectorsize != 0 ||
371 	    offset % sc->sc_disk->d_sectorsize != 0)
372 		return (EIO);
373 
374 	txBuf[0] = CMD_FAST_READ;
375 	if (sc->sc_flags & FL_ENABLE_4B_ADDR) {
376 		cmd.tx_cmd_sz = 6;
377 		cmd.rx_cmd_sz = 6;
378 
379 		txBuf[1] = (offset >> 24) & 0xff;
380 		txBuf[2] = (offset >> 16) & 0xff;
381 		txBuf[3] = (offset >> 8) & 0xff;
382 		txBuf[4] = offset & 0xff;
383 		/* Dummy byte */
384 		txBuf[5] = 0;
385 	} else {
386 		cmd.tx_cmd_sz = 5;
387 		cmd.rx_cmd_sz = 5;
388 
389 		txBuf[1] = (offset >> 16) & 0xff;
390 		txBuf[2] = (offset >> 8) & 0xff;
391 		txBuf[3] = offset & 0xff;
392 		/* Dummy byte */
393 		txBuf[4] = 0;
394 	}
395 
396 	cmd.tx_cmd = txBuf;
397 	cmd.rx_cmd = rxBuf;
398 	cmd.tx_data = data;
399 	cmd.rx_data = data;
400 	cmd.tx_data_sz = count;
401 	cmd.rx_data_sz = count;
402 
403 	err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
404 	return (err);
405 }
406 
407 static int
408 mx25l_set_4b_mode(struct mx25l_softc *sc, uint8_t command)
409 {
410 	uint8_t txBuf[1], rxBuf[1];
411 	struct spi_command cmd;
412 	int err;
413 
414 	memset(&cmd, 0, sizeof(cmd));
415 	memset(txBuf, 0, sizeof(txBuf));
416 	memset(rxBuf, 0, sizeof(rxBuf));
417 
418 	cmd.tx_cmd_sz = cmd.rx_cmd_sz = 1;
419 
420 	cmd.tx_cmd = txBuf;
421 	cmd.rx_cmd = rxBuf;
422 
423 	txBuf[0] = command;
424 
425 	if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) == 0)
426 		err = mx25l_wait_for_device_ready(sc);
427 
428 	return (err);
429 }
430 
431 #ifdef	FDT
432 static struct ofw_compat_data compat_data[] = {
433 	{ "st,m25p",		1 },
434 	{ "jedec,spi-nor",	1 },
435 	{ NULL,			0 },
436 };
437 #endif
438 
439 static int
440 mx25l_probe(device_t dev)
441 {
442 #ifdef FDT
443 	int i;
444 
445 	if (!ofw_bus_status_okay(dev))
446 		return (ENXIO);
447 
448 	/* First try to match the compatible property to the compat_data */
449 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 1)
450 		goto found;
451 
452 	/*
453 	 * Next, try to find a compatible device using the names in the
454 	 * flash_devices structure
455 	 */
456 	for (i = 0; i < nitems(flash_devices); i++)
457 		if (ofw_bus_is_compatible(dev, flash_devices[i].name))
458 			goto found;
459 
460 	return (ENXIO);
461 found:
462 #endif
463 	device_set_desc(dev, "M25Pxx Flash Family");
464 
465 	return (0);
466 }
467 
468 static int
469 mx25l_attach(device_t dev)
470 {
471 	struct mx25l_softc *sc;
472 	struct mx25l_flash_ident *ident;
473 	int err;
474 
475 	sc = device_get_softc(dev);
476 	sc->sc_dev = dev;
477 	sc->sc_parent = device_get_parent(sc->sc_dev);
478 
479 	M25PXX_LOCK_INIT(sc);
480 
481 	ident = mx25l_get_device_ident(sc);
482 	if (ident == NULL)
483 		return (ENXIO);
484 
485 	if ((err = mx25l_wait_for_device_ready(sc)) != 0)
486 		return (err);
487 
488 	sc->sc_flags = ident->flags;
489 
490 	if (sc->sc_flags & FL_ERASE_4K)
491 		sc->sc_erasesize = 4 * 1024;
492 	else if (sc->sc_flags & FL_ERASE_32K)
493 		sc->sc_erasesize = 32 * 1024;
494 	else
495 		sc->sc_erasesize = ident->sectorsize;
496 
497 	if (sc->sc_flags & FL_ENABLE_4B_ADDR) {
498 		if ((err = mx25l_set_4b_mode(sc, CMD_ENTER_4B_MODE)) != 0)
499 			return (err);
500 	} else if (sc->sc_flags & FL_DISABLE_4B_ADDR) {
501 		if ((err = mx25l_set_4b_mode(sc, CMD_EXIT_4B_MODE)) != 0)
502 			return (err);
503 	}
504 
505 	sc->sc_disk = disk_alloc();
506 	sc->sc_disk->d_open = mx25l_open;
507 	sc->sc_disk->d_close = mx25l_close;
508 	sc->sc_disk->d_strategy = mx25l_strategy;
509 	sc->sc_disk->d_getattr = mx25l_getattr;
510 	sc->sc_disk->d_ioctl = mx25l_ioctl;
511 	sc->sc_disk->d_name = "flash/spi";
512 	sc->sc_disk->d_drv1 = sc;
513 	sc->sc_disk->d_maxsize = DFLTPHYS;
514 	sc->sc_disk->d_sectorsize = MX25L_SECTORSIZE;
515 	sc->sc_disk->d_mediasize = ident->sectorsize * ident->sectorcount;
516 	sc->sc_disk->d_stripesize = sc->sc_erasesize;
517 	sc->sc_disk->d_unit = device_get_unit(sc->sc_dev);
518 	sc->sc_disk->d_dump = NULL;		/* NB: no dumps */
519 
520 	disk_create(sc->sc_disk, DISK_VERSION);
521 	bioq_init(&sc->sc_bio_queue);
522 
523 	kproc_create(&mx25l_task, sc, &sc->sc_p, 0, 0, "task: mx25l flash");
524 	sc->sc_taskstate = TSTATE_RUNNING;
525 
526 	device_printf(sc->sc_dev, "%s, sector %d bytes, %d sectors\n",
527 	    ident->name, ident->sectorsize, ident->sectorcount);
528 
529 	return (0);
530 }
531 
532 static int
533 mx25l_detach(device_t dev)
534 {
535 	struct mx25l_softc *sc;
536 	int err;
537 
538 	sc = device_get_softc(dev);
539 	err = 0;
540 
541 	M25PXX_LOCK(sc);
542 	if (sc->sc_taskstate == TSTATE_RUNNING) {
543 		sc->sc_taskstate = TSTATE_STOPPING;
544 		wakeup(sc);
545 		while (err == 0 && sc->sc_taskstate != TSTATE_STOPPED) {
546 			err = msleep(sc, &sc->sc_mtx, 0, "mx25dt", hz * 3);
547 			if (err != 0) {
548 				sc->sc_taskstate = TSTATE_RUNNING;
549 				device_printf(sc->sc_dev,
550 				    "Failed to stop queue task\n");
551 			}
552 		}
553 	}
554 	M25PXX_UNLOCK(sc);
555 
556 	if (err == 0 && sc->sc_taskstate == TSTATE_STOPPED) {
557 		disk_destroy(sc->sc_disk);
558 		bioq_flush(&sc->sc_bio_queue, NULL, ENXIO);
559 		M25PXX_LOCK_DESTROY(sc);
560 	}
561 	return (err);
562 }
563 
564 static int
565 mx25l_open(struct disk *dp)
566 {
567 	return (0);
568 }
569 
570 static int
571 mx25l_close(struct disk *dp)
572 {
573 
574 	return (0);
575 }
576 
577 static int
578 mx25l_ioctl(struct disk *dp, u_long cmd, void *data, int fflag,
579 	struct thread *td)
580 {
581 
582 	return (EINVAL);
583 }
584 
585 static void
586 mx25l_strategy(struct bio *bp)
587 {
588 	struct mx25l_softc *sc;
589 
590 	sc = (struct mx25l_softc *)bp->bio_disk->d_drv1;
591 	M25PXX_LOCK(sc);
592 	bioq_disksort(&sc->sc_bio_queue, bp);
593 	wakeup(sc);
594 	M25PXX_UNLOCK(sc);
595 }
596 
597 static int
598 mx25l_getattr(struct bio *bp)
599 {
600 	struct mx25l_softc *sc;
601 	device_t dev;
602 
603 	if (bp->bio_disk == NULL || bp->bio_disk->d_drv1 == NULL)
604 		return (ENXIO);
605 
606 	sc = bp->bio_disk->d_drv1;
607 	dev = sc->sc_dev;
608 
609 	if (strcmp(bp->bio_attribute, "SPI::device") == 0) {
610 		if (bp->bio_length != sizeof(dev))
611 			return (EFAULT);
612 		bcopy(&dev, bp->bio_data, sizeof(dev));
613 	} else
614 		return (-1);
615 	return (0);
616 }
617 
618 static void
619 mx25l_task(void *arg)
620 {
621 	struct mx25l_softc *sc = (struct mx25l_softc*)arg;
622 	struct bio *bp;
623 	device_t dev;
624 
625 	for (;;) {
626 		dev = sc->sc_dev;
627 		M25PXX_LOCK(sc);
628 		do {
629 			if (sc->sc_taskstate == TSTATE_STOPPING) {
630 				sc->sc_taskstate = TSTATE_STOPPED;
631 				M25PXX_UNLOCK(sc);
632 				wakeup(sc);
633 				kproc_exit(0);
634 			}
635 			bp = bioq_first(&sc->sc_bio_queue);
636 			if (bp == NULL)
637 				msleep(sc, &sc->sc_mtx, PRIBIO, "mx25jq", 0);
638 		} while (bp == NULL);
639 		bioq_remove(&sc->sc_bio_queue, bp);
640 		M25PXX_UNLOCK(sc);
641 
642 		switch (bp->bio_cmd) {
643 		case BIO_READ:
644 			bp->bio_error = mx25l_read(sc, bp->bio_offset,
645 			    bp->bio_data, bp->bio_bcount);
646 			break;
647 		case BIO_WRITE:
648 			bp->bio_error = mx25l_write(sc, bp->bio_offset,
649 			    bp->bio_data, bp->bio_bcount);
650 			break;
651 		default:
652 			bp->bio_error = EINVAL;
653 		}
654 
655 
656 		biodone(bp);
657 	}
658 }
659 
660 static devclass_t mx25l_devclass;
661 
662 static device_method_t mx25l_methods[] = {
663 	/* Device interface */
664 	DEVMETHOD(device_probe,		mx25l_probe),
665 	DEVMETHOD(device_attach,	mx25l_attach),
666 	DEVMETHOD(device_detach,	mx25l_detach),
667 
668 	{ 0, 0 }
669 };
670 
671 static driver_t mx25l_driver = {
672 	"mx25l",
673 	mx25l_methods,
674 	sizeof(struct mx25l_softc),
675 };
676 
677 DRIVER_MODULE(mx25l, spibus, mx25l_driver, mx25l_devclass, 0, 0);
678 MODULE_DEPEND(mx25l, spibus, 1, 1, 1);
679