1 /*- 2 * Copyright (c) 2007 Rui Paulo <[email protected]> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 16 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 17 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 22 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 23 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24 * POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 * 28 */ 29 30 /* 31 * Device driver for Intel's On Die thermal sensor via MSR. 32 * First introduced in Intel's Core line of processors. 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 #include <sys/param.h> 39 #include <sys/bus.h> 40 #include <sys/systm.h> 41 #include <sys/types.h> 42 #include <sys/module.h> 43 #include <sys/conf.h> 44 #include <sys/kernel.h> 45 #include <sys/sysctl.h> 46 #include <sys/proc.h> /* for curthread */ 47 #include <sys/sched.h> 48 49 #include <machine/specialreg.h> 50 #include <machine/cpufunc.h> 51 #include <machine/md_var.h> 52 53 struct coretemp_softc { 54 device_t sc_dev; 55 int sc_tjmax; 56 struct sysctl_oid *sc_oid; 57 }; 58 59 /* 60 * Device methods. 61 */ 62 static void coretemp_identify(driver_t *driver, device_t parent); 63 static int coretemp_probe(device_t dev); 64 static int coretemp_attach(device_t dev); 65 static int coretemp_detach(device_t dev); 66 67 static int coretemp_get_temp(device_t dev); 68 static int coretemp_get_temp_sysctl(SYSCTL_HANDLER_ARGS); 69 70 static device_method_t coretemp_methods[] = { 71 /* Device interface */ 72 DEVMETHOD(device_identify, coretemp_identify), 73 DEVMETHOD(device_probe, coretemp_probe), 74 DEVMETHOD(device_attach, coretemp_attach), 75 DEVMETHOD(device_detach, coretemp_detach), 76 77 {0, 0} 78 }; 79 80 static driver_t coretemp_driver = { 81 "coretemp", 82 coretemp_methods, 83 sizeof(struct coretemp_softc), 84 }; 85 86 static devclass_t coretemp_devclass; 87 DRIVER_MODULE(coretemp, cpu, coretemp_driver, coretemp_devclass, NULL, NULL); 88 89 static void 90 coretemp_identify(driver_t *driver, device_t parent) 91 { 92 device_t child; 93 u_int regs[4]; 94 95 /* Make sure we're not being doubly invoked. */ 96 if (device_find_child(parent, "coretemp", -1) != NULL) 97 return; 98 99 /* Check that CPUID is supported and the vendor is Intel.*/ 100 if (cpu_high == 0 || strcmp(cpu_vendor, "GenuineIntel")) 101 return; 102 /* 103 * CPUID 0x06 returns 1 if the processor has on-die thermal 104 * sensors. EBX[0:3] contains the number of sensors. 105 */ 106 do_cpuid(0x06, regs); 107 if ((regs[0] & 0x1) != 1) 108 return; 109 110 /* 111 * We add a child for each CPU since settings must be performed 112 * on each CPU in the SMP case. 113 */ 114 child = device_add_child(parent, "coretemp", -1); 115 if (child == NULL) 116 device_printf(parent, "add coretemp child failed\n"); 117 } 118 119 static int 120 coretemp_probe(device_t dev) 121 { 122 if (resource_disabled("coretemp", 0)) 123 return (ENXIO); 124 125 device_set_desc(dev, "CPU On-Die Thermal Sensors"); 126 127 return (BUS_PROBE_GENERIC); 128 } 129 130 static int 131 coretemp_attach(device_t dev) 132 { 133 struct coretemp_softc *sc = device_get_softc(dev); 134 device_t pdev; 135 uint64_t msr; 136 int cpu_model; 137 int cpu_mask; 138 139 pdev = device_get_parent(dev); 140 141 cpu_model = (cpu_id >> 4) & 15; 142 /* extended model */ 143 cpu_model += ((cpu_id >> 16) & 0xf) << 4; 144 cpu_mask = cpu_id & 15; 145 146 /* 147 * Check for errata AE18. 148 * "Processor Digital Thermal Sensor (DTS) Readout stops 149 * updating upon returning from C3/C4 state." 150 * 151 * Adapted from the Linux coretemp driver. 152 */ 153 if (cpu_model == 0xe && cpu_mask < 0xc) { 154 msr = rdmsr(MSR_BIOS_SIGN); 155 msr = msr >> 32; 156 if (msr < 0x39) { 157 device_printf(dev, "This processor behaves " 158 "erronously regarding to Intel errata " 159 "AE18.\nPlease update your BIOS or the " 160 "CPU microcode.\n"); 161 return (ENXIO); 162 } 163 } 164 /* 165 * On some Core 2 CPUs, there's an undocumented MSR that 166 * can tell us if Tj(max) is 100 or 85. 167 * 168 * The if-clause for CPUs having the MSR_IA32_EXT_CONFIG was adapted 169 * from the Linux coretemp driver. 170 */ 171 if ((cpu_model == 0xf && cpu_mask > 3) || cpu_model == 0xe) { 172 msr = rdmsr(MSR_IA32_EXT_CONFIG); 173 if ((msr >> 30) & 0x1) 174 sc->sc_tjmax = 85; 175 } else 176 sc->sc_tjmax = 100; 177 178 /* 179 * Add the "temperature" MIB to dev.cpu.N. 180 */ 181 sc->sc_oid = SYSCTL_ADD_PROC(device_get_sysctl_ctx(pdev), 182 SYSCTL_CHILDREN(device_get_sysctl_tree(pdev)), 183 OID_AUTO, "temperature", 184 CTLTYPE_INT | CTLFLAG_RD, 185 dev, 0, coretemp_get_temp_sysctl, "I", 186 "Current temperature in degC"); 187 188 return (0); 189 } 190 191 static int 192 coretemp_detach(device_t dev) 193 { 194 struct coretemp_softc *sc = device_get_softc(dev); 195 196 sysctl_remove_oid(sc->sc_oid, 1, 0); 197 198 return (0); 199 } 200 201 202 static int 203 coretemp_get_temp(device_t dev) 204 { 205 uint64_t temp; 206 int cpu = device_get_unit(dev); 207 struct coretemp_softc *sc = device_get_softc(dev); 208 209 thread_lock(curthread); 210 sched_bind(curthread, cpu); 211 thread_unlock(curthread); 212 213 /* 214 * The digital temperature reading is located at bit 16 215 * of MSR_THERM_STATUS. 216 * 217 * There is a bit on that MSR that indicates whether the 218 * temperature is valid or not. 219 * 220 * The temperature is computed by subtracting the temperature 221 * reading by Tj(max). 222 */ 223 temp = rdmsr(MSR_THERM_STATUS); 224 225 /* 226 * Check for Thermal Status and Thermal Status Log. 227 */ 228 if ((temp & 0x3) == 0x3) 229 device_printf(dev, "PROCHOT asserted\n"); 230 231 /* 232 * Check for Critical Temperature Status and Critical 233 * Temperature Log. 234 * 235 * If we reach a critical level, allow devctl(4) to catch this 236 * and shutdown the system. 237 */ 238 if (((temp >> 4) & 0x3) == 0x3) { 239 device_printf(dev, "Critical Temperature detected.\n" 240 "Advising system shutdown.\n"); 241 devctl_notify("CPU", "coretemp", "temperature", 242 "notify=0x1"); 243 } 244 245 /* 246 * Bit 31 contains "Reading valid" 247 */ 248 if (((temp >> 31) & 0x1) == 1) { 249 /* 250 * Starting on bit 16 and ending on bit 22. 251 */ 252 temp = sc->sc_tjmax - ((temp >> 16) & 0x7f); 253 return ((int) temp); 254 } 255 256 return (-1); 257 } 258 259 static int 260 coretemp_get_temp_sysctl(SYSCTL_HANDLER_ARGS) 261 { 262 device_t dev = (device_t) arg1; 263 int temp; 264 265 temp = coretemp_get_temp(dev); 266 267 return (sysctl_handle_int(oidp, &temp, 0, req)); 268 } 269