1*5ffd83dbSDimitry Andric //===-- RegisterContextNetBSD_i386.cpp -------------------------*- C++ -*-===//
2*5ffd83dbSDimitry Andric //
3*5ffd83dbSDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4*5ffd83dbSDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5*5ffd83dbSDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6*5ffd83dbSDimitry Andric //
7*5ffd83dbSDimitry Andric //===---------------------------------------------------------------------===//
8*5ffd83dbSDimitry Andric 
9*5ffd83dbSDimitry Andric #include "RegisterContextNetBSD_i386.h"
10*5ffd83dbSDimitry Andric #include "RegisterContextPOSIX_x86.h"
11*5ffd83dbSDimitry Andric 
12*5ffd83dbSDimitry Andric using namespace lldb_private;
13*5ffd83dbSDimitry Andric using namespace lldb;
14*5ffd83dbSDimitry Andric 
15*5ffd83dbSDimitry Andric // this needs to match 'struct reg'
16*5ffd83dbSDimitry Andric struct GPR {
17*5ffd83dbSDimitry Andric   uint32_t eax;
18*5ffd83dbSDimitry Andric   uint32_t ecx;
19*5ffd83dbSDimitry Andric   uint32_t edx;
20*5ffd83dbSDimitry Andric   uint32_t ebx;
21*5ffd83dbSDimitry Andric   uint32_t esp;
22*5ffd83dbSDimitry Andric   uint32_t ebp;
23*5ffd83dbSDimitry Andric   uint32_t esi;
24*5ffd83dbSDimitry Andric   uint32_t edi;
25*5ffd83dbSDimitry Andric   uint32_t eip;
26*5ffd83dbSDimitry Andric   uint32_t eflags;
27*5ffd83dbSDimitry Andric   uint32_t cs;
28*5ffd83dbSDimitry Andric   uint32_t ss;
29*5ffd83dbSDimitry Andric   uint32_t ds;
30*5ffd83dbSDimitry Andric   uint32_t es;
31*5ffd83dbSDimitry Andric   uint32_t fs;
32*5ffd83dbSDimitry Andric   uint32_t gs;
33*5ffd83dbSDimitry Andric };
34*5ffd83dbSDimitry Andric 
35*5ffd83dbSDimitry Andric struct FPR_i386 {
36*5ffd83dbSDimitry Andric   uint16_t fctrl;     // FPU Control Word (fcw)
37*5ffd83dbSDimitry Andric   uint16_t fstat;     // FPU Status Word (fsw)
38*5ffd83dbSDimitry Andric   uint16_t ftag;      // FPU Tag Word (ftw)
39*5ffd83dbSDimitry Andric   uint16_t fop;       // Last Instruction Opcode (fop)
40*5ffd83dbSDimitry Andric   union {
41*5ffd83dbSDimitry Andric     struct {
42*5ffd83dbSDimitry Andric       uint64_t fip; // Instruction Pointer
43*5ffd83dbSDimitry Andric       uint64_t fdp; // Data Pointer
44*5ffd83dbSDimitry Andric     } x86_64;
45*5ffd83dbSDimitry Andric     struct {
46*5ffd83dbSDimitry Andric       uint32_t fioff; // FPU IP Offset (fip)
47*5ffd83dbSDimitry Andric       uint32_t fiseg; // FPU IP Selector (fcs)
48*5ffd83dbSDimitry Andric       uint32_t fooff; // FPU Operand Pointer Offset (foo)
49*5ffd83dbSDimitry Andric       uint32_t foseg; // FPU Operand Pointer Selector (fos)
50*5ffd83dbSDimitry Andric     } i386_; // Added _ in the end to avoid error with gcc defining i386 in some
51*5ffd83dbSDimitry Andric              // cases
52*5ffd83dbSDimitry Andric   } ptr;
53*5ffd83dbSDimitry Andric   uint32_t mxcsr;     // MXCSR Register State
54*5ffd83dbSDimitry Andric   uint32_t mxcsrmask; // MXCSR Mask
55*5ffd83dbSDimitry Andric   MMSReg stmm[8];     // 8*16 bytes for each FP-reg = 128 bytes
56*5ffd83dbSDimitry Andric   XMMReg xmm[8];      // 8*16 bytes for each XMM-reg = 128 bytes
57*5ffd83dbSDimitry Andric   uint32_t padding[56];
58*5ffd83dbSDimitry Andric };
59*5ffd83dbSDimitry Andric 
60*5ffd83dbSDimitry Andric struct UserArea {
61*5ffd83dbSDimitry Andric   GPR gpr;
62*5ffd83dbSDimitry Andric   FPR_i386 i387;
63*5ffd83dbSDimitry Andric   uint32_t u_debugreg[8]; // Debug registers (DR0 - DR7).
64*5ffd83dbSDimitry Andric   uint32_t tlsbase;
65*5ffd83dbSDimitry Andric };
66*5ffd83dbSDimitry Andric 
67*5ffd83dbSDimitry Andric #define DR_SIZE sizeof(((UserArea *)NULL)->u_debugreg[0])
68*5ffd83dbSDimitry Andric #define DR_OFFSET(reg_index)                                                   \
69*5ffd83dbSDimitry Andric   (LLVM_EXTENSION offsetof(UserArea, u_debugreg[reg_index]))
70*5ffd83dbSDimitry Andric 
71*5ffd83dbSDimitry Andric // Include RegisterInfos_i386 to declare our g_register_infos_i386 structure.
72*5ffd83dbSDimitry Andric #define DECLARE_REGISTER_INFOS_I386_STRUCT
73*5ffd83dbSDimitry Andric #include "RegisterInfos_i386.h"
74*5ffd83dbSDimitry Andric #undef DECLARE_REGISTER_INFOS_I386_STRUCT
75*5ffd83dbSDimitry Andric 
RegisterContextNetBSD_i386(const ArchSpec & target_arch)76*5ffd83dbSDimitry Andric RegisterContextNetBSD_i386::RegisterContextNetBSD_i386(
77*5ffd83dbSDimitry Andric     const ArchSpec &target_arch)
78*5ffd83dbSDimitry Andric     : RegisterInfoInterface(target_arch) {}
79*5ffd83dbSDimitry Andric 
GetGPRSize() const80*5ffd83dbSDimitry Andric size_t RegisterContextNetBSD_i386::GetGPRSize() const { return sizeof(GPR); }
81*5ffd83dbSDimitry Andric 
GetRegisterInfo() const82*5ffd83dbSDimitry Andric const RegisterInfo *RegisterContextNetBSD_i386::GetRegisterInfo() const {
83*5ffd83dbSDimitry Andric   switch (m_target_arch.GetMachine()) {
84*5ffd83dbSDimitry Andric   case llvm::Triple::x86:
85*5ffd83dbSDimitry Andric   case llvm::Triple::x86_64:
86*5ffd83dbSDimitry Andric     return g_register_infos_i386;
87*5ffd83dbSDimitry Andric   default:
88*5ffd83dbSDimitry Andric     assert(false && "Unhandled target architecture.");
89*5ffd83dbSDimitry Andric     return nullptr;
90*5ffd83dbSDimitry Andric   }
91*5ffd83dbSDimitry Andric }
92*5ffd83dbSDimitry Andric 
GetRegisterCount() const93*5ffd83dbSDimitry Andric uint32_t RegisterContextNetBSD_i386::GetRegisterCount() const {
94*5ffd83dbSDimitry Andric   return static_cast<uint32_t>(sizeof(g_register_infos_i386) /
95*5ffd83dbSDimitry Andric                                sizeof(g_register_infos_i386[0]));
96*5ffd83dbSDimitry Andric }
97