xref: /freebsd-12.1/sys/dev/uart/uart_cpu.h (revision 2ae4f1fd)
127d5dc18SMarcel Moolenaar /*
2*2ae4f1fdSMarcel Moolenaar  * Copyright (c) 2003, 2004 Marcel Moolenaar
327d5dc18SMarcel Moolenaar  * All rights reserved.
427d5dc18SMarcel Moolenaar  *
527d5dc18SMarcel Moolenaar  * Redistribution and use in source and binary forms, with or without
627d5dc18SMarcel Moolenaar  * modification, are permitted provided that the following conditions
727d5dc18SMarcel Moolenaar  * are met:
827d5dc18SMarcel Moolenaar  *
927d5dc18SMarcel Moolenaar  * 1. Redistributions of source code must retain the above copyright
1027d5dc18SMarcel Moolenaar  *    notice, this list of conditions and the following disclaimer.
1127d5dc18SMarcel Moolenaar  * 2. Redistributions in binary form must reproduce the above copyright
1227d5dc18SMarcel Moolenaar  *    notice, this list of conditions and the following disclaimer in the
1327d5dc18SMarcel Moolenaar  *    documentation and/or other materials provided with the distribution.
1427d5dc18SMarcel Moolenaar  *
1527d5dc18SMarcel Moolenaar  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1627d5dc18SMarcel Moolenaar  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1727d5dc18SMarcel Moolenaar  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1827d5dc18SMarcel Moolenaar  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1927d5dc18SMarcel Moolenaar  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2027d5dc18SMarcel Moolenaar  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2127d5dc18SMarcel Moolenaar  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2227d5dc18SMarcel Moolenaar  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2327d5dc18SMarcel Moolenaar  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2427d5dc18SMarcel Moolenaar  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2527d5dc18SMarcel Moolenaar  *
2627d5dc18SMarcel Moolenaar  * $FreeBSD$
2727d5dc18SMarcel Moolenaar  */
2827d5dc18SMarcel Moolenaar 
2927d5dc18SMarcel Moolenaar #ifndef _DEV_UART_CPU_H_
3027d5dc18SMarcel Moolenaar #define _DEV_UART_CPU_H_
3127d5dc18SMarcel Moolenaar 
3227d5dc18SMarcel Moolenaar /*
3327d5dc18SMarcel Moolenaar  * Low-level operations for use by console and/or debug port support.
3427d5dc18SMarcel Moolenaar  */
3527d5dc18SMarcel Moolenaar struct uart_ops {
3627d5dc18SMarcel Moolenaar 	int (*probe)(struct uart_bas *);
3727d5dc18SMarcel Moolenaar 	void (*init)(struct uart_bas *, int, int, int, int);
3827d5dc18SMarcel Moolenaar 	void (*term)(struct uart_bas *);
3927d5dc18SMarcel Moolenaar 	void (*putc)(struct uart_bas *, int);
4027d5dc18SMarcel Moolenaar 	int (*poll)(struct uart_bas *);
4127d5dc18SMarcel Moolenaar 	int (*getc)(struct uart_bas *);
4227d5dc18SMarcel Moolenaar };
4327d5dc18SMarcel Moolenaar 
44af1af2d2SWarner Losh extern struct uart_ops uart_i8251_ops;
4527d5dc18SMarcel Moolenaar extern struct uart_ops uart_ns8250_ops;
4627d5dc18SMarcel Moolenaar extern struct uart_ops uart_sab82532_ops;
4727d5dc18SMarcel Moolenaar extern struct uart_ops uart_z8530_ops;
4827d5dc18SMarcel Moolenaar 
49*2ae4f1fdSMarcel Moolenaar extern bus_space_tag_t uart_bus_space_io;
50*2ae4f1fdSMarcel Moolenaar extern bus_space_tag_t uart_bus_space_mem;
51*2ae4f1fdSMarcel Moolenaar 
5227d5dc18SMarcel Moolenaar /*
5327d5dc18SMarcel Moolenaar  * Console and debug port device info.
5427d5dc18SMarcel Moolenaar  */
5527d5dc18SMarcel Moolenaar struct uart_softc;
5627d5dc18SMarcel Moolenaar struct uart_devinfo {
5727d5dc18SMarcel Moolenaar 	SLIST_ENTRY(uart_devinfo) next;
5827d5dc18SMarcel Moolenaar 	struct uart_ops ops;
5927d5dc18SMarcel Moolenaar 	struct uart_bas bas;
6027d5dc18SMarcel Moolenaar 	int	baudrate;
6127d5dc18SMarcel Moolenaar 	int	databits;
6227d5dc18SMarcel Moolenaar 	int	stopbits;
6327d5dc18SMarcel Moolenaar 	int	parity;
6427d5dc18SMarcel Moolenaar 	int	type;
6527d5dc18SMarcel Moolenaar #define	UART_DEV_CONSOLE	0
6627d5dc18SMarcel Moolenaar #define	UART_DEV_DBGPORT	1
6727d5dc18SMarcel Moolenaar #define	UART_DEV_KEYBOARD	2
6827d5dc18SMarcel Moolenaar 	int	(*attach)(struct uart_softc*);
6927d5dc18SMarcel Moolenaar 	int	(*detach)(struct uart_softc*);
7027d5dc18SMarcel Moolenaar 	void	*cookie;		/* Type dependent use. */
7127d5dc18SMarcel Moolenaar };
7227d5dc18SMarcel Moolenaar 
735cc70551SMarcel Moolenaar int uart_cpu_eqres(struct uart_bas *, struct uart_bas *);
745cc70551SMarcel Moolenaar int uart_cpu_getdev(int, struct uart_devinfo *);
75*2ae4f1fdSMarcel Moolenaar int uart_getenv(int, struct uart_devinfo *);
7627d5dc18SMarcel Moolenaar 
7727d5dc18SMarcel Moolenaar void uart_add_sysdev(struct uart_devinfo *);
7827d5dc18SMarcel Moolenaar 
7927d5dc18SMarcel Moolenaar /*
8027d5dc18SMarcel Moolenaar  * Operations for low-level access to the UART. Primarily for use
8127d5dc18SMarcel Moolenaar  * by console and debug port logic.
8227d5dc18SMarcel Moolenaar  */
8327d5dc18SMarcel Moolenaar static __inline int
8427d5dc18SMarcel Moolenaar uart_probe(struct uart_devinfo *di)
8527d5dc18SMarcel Moolenaar {
8627d5dc18SMarcel Moolenaar 	return (di->ops.probe(&di->bas));
8727d5dc18SMarcel Moolenaar }
8827d5dc18SMarcel Moolenaar 
8927d5dc18SMarcel Moolenaar static __inline void
9027d5dc18SMarcel Moolenaar uart_init(struct uart_devinfo *di)
9127d5dc18SMarcel Moolenaar {
9227d5dc18SMarcel Moolenaar 	di->ops.init(&di->bas, di->baudrate, di->databits, di->stopbits,
9327d5dc18SMarcel Moolenaar 	    di->parity);
9427d5dc18SMarcel Moolenaar }
9527d5dc18SMarcel Moolenaar 
9627d5dc18SMarcel Moolenaar static __inline void
9727d5dc18SMarcel Moolenaar uart_term(struct uart_devinfo *di)
9827d5dc18SMarcel Moolenaar {
9927d5dc18SMarcel Moolenaar 	di->ops.term(&di->bas);
10027d5dc18SMarcel Moolenaar }
10127d5dc18SMarcel Moolenaar 
10227d5dc18SMarcel Moolenaar static __inline void
10327d5dc18SMarcel Moolenaar uart_putc(struct uart_devinfo *di, int c)
10427d5dc18SMarcel Moolenaar {
10527d5dc18SMarcel Moolenaar 	di->ops.putc(&di->bas, c);
10627d5dc18SMarcel Moolenaar }
10727d5dc18SMarcel Moolenaar 
10827d5dc18SMarcel Moolenaar static __inline int
10927d5dc18SMarcel Moolenaar uart_poll(struct uart_devinfo *di)
11027d5dc18SMarcel Moolenaar {
11127d5dc18SMarcel Moolenaar 	return (di->ops.poll(&di->bas));
11227d5dc18SMarcel Moolenaar }
11327d5dc18SMarcel Moolenaar 
11427d5dc18SMarcel Moolenaar static __inline int
11527d5dc18SMarcel Moolenaar uart_getc(struct uart_devinfo *di)
11627d5dc18SMarcel Moolenaar {
11727d5dc18SMarcel Moolenaar 	return (di->ops.getc(&di->bas));
11827d5dc18SMarcel Moolenaar }
11927d5dc18SMarcel Moolenaar 
12027d5dc18SMarcel Moolenaar #endif /* _DEV_UART_CPU_H_ */
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