1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * Copyright (c) 2011-2015 LSI Corp. 6 * Copyright (c) 2013-2015 Avago Technologies 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31 * 32 * $FreeBSD$ 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 /* Communications core for Avago Technologies (LSI) MPT2 */ 39 40 /* TODO Move headers to mpsvar */ 41 #include <sys/types.h> 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/selinfo.h> 46 #include <sys/lock.h> 47 #include <sys/mutex.h> 48 #include <sys/module.h> 49 #include <sys/bus.h> 50 #include <sys/conf.h> 51 #include <sys/bio.h> 52 #include <sys/malloc.h> 53 #include <sys/uio.h> 54 #include <sys/sysctl.h> 55 #include <sys/smp.h> 56 #include <sys/queue.h> 57 #include <sys/kthread.h> 58 #include <sys/taskqueue.h> 59 #include <sys/endian.h> 60 #include <sys/eventhandler.h> 61 #include <sys/sbuf.h> 62 63 #include <machine/bus.h> 64 #include <machine/resource.h> 65 #include <sys/rman.h> 66 #include <sys/proc.h> 67 68 #include <dev/pci/pcivar.h> 69 70 #include <cam/cam.h> 71 #include <cam/scsi/scsi_all.h> 72 73 #include <dev/mps/mpi/mpi2_type.h> 74 #include <dev/mps/mpi/mpi2.h> 75 #include <dev/mps/mpi/mpi2_ioc.h> 76 #include <dev/mps/mpi/mpi2_sas.h> 77 #include <dev/mps/mpi/mpi2_cnfg.h> 78 #include <dev/mps/mpi/mpi2_init.h> 79 #include <dev/mps/mpi/mpi2_tool.h> 80 #include <dev/mps/mps_ioctl.h> 81 #include <dev/mps/mpsvar.h> 82 #include <dev/mps/mps_table.h> 83 84 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag); 85 static int mps_init_queues(struct mps_softc *sc); 86 static void mps_resize_queues(struct mps_softc *sc); 87 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag); 88 static int mps_transition_operational(struct mps_softc *sc); 89 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching); 90 static void mps_iocfacts_free(struct mps_softc *sc); 91 static void mps_startup(void *arg); 92 static int mps_send_iocinit(struct mps_softc *sc); 93 static int mps_alloc_queues(struct mps_softc *sc); 94 static int mps_alloc_hw_queues(struct mps_softc *sc); 95 static int mps_alloc_replies(struct mps_softc *sc); 96 static int mps_alloc_requests(struct mps_softc *sc); 97 static int mps_attach_log(struct mps_softc *sc); 98 static __inline void mps_complete_command(struct mps_softc *sc, 99 struct mps_command *cm); 100 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 101 MPI2_EVENT_NOTIFICATION_REPLY *reply); 102 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm); 103 static void mps_periodic(void *); 104 static int mps_reregister_events(struct mps_softc *sc); 105 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm); 106 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts); 107 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag); 108 static int mps_debug_sysctl(SYSCTL_HANDLER_ARGS); 109 static void mps_parse_debug(struct mps_softc *sc, char *list); 110 111 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters"); 112 113 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory"); 114 MALLOC_DECLARE(M_MPSUSER); 115 116 /* 117 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 118 * any state and back to its initialization state machine. 119 */ 120 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 121 122 /* Added this union to smoothly convert le64toh cm->cm_desc.Words. 123 * Compiler only support unint64_t to be passed as argument. 124 * Otherwise it will throw below error 125 * "aggregate value used where an integer was expected" 126 */ 127 128 typedef union _reply_descriptor { 129 u64 word; 130 struct { 131 u32 low; 132 u32 high; 133 } u; 134 }reply_descriptor,address_descriptor; 135 136 /* Rate limit chain-fail messages to 1 per minute */ 137 static struct timeval mps_chainfail_interval = { 60, 0 }; 138 139 /* 140 * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 141 * If this function is called from process context, it can sleep 142 * and there is no harm to sleep, in case if this fuction is called 143 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 144 * based on sleep flags driver will call either msleep, pause or DELAY. 145 * msleep and pause are of same variant, but pause is used when mps_mtx 146 * is not hold by driver. 147 * 148 */ 149 static int 150 mps_diag_reset(struct mps_softc *sc,int sleep_flag) 151 { 152 uint32_t reg; 153 int i, error, tries = 0; 154 uint8_t first_wait_done = FALSE; 155 156 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 157 158 /* Clear any pending interrupts */ 159 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 160 161 /* 162 * Force NO_SLEEP for threads prohibited to sleep 163 * e.a Thread from interrupt handler are prohibited to sleep. 164 */ 165 if (curthread->td_no_sleeping != 0) 166 sleep_flag = NO_SLEEP; 167 168 mps_dprint(sc, MPS_INIT, "sequence start, sleep_flag= %d\n", sleep_flag); 169 170 /* Push the magic sequence */ 171 error = ETIMEDOUT; 172 while (tries++ < 20) { 173 for (i = 0; i < sizeof(mpt2_reset_magic); i++) 174 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 175 mpt2_reset_magic[i]); 176 /* wait 100 msec */ 177 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 178 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 179 "mpsdiag", hz/10); 180 else if (sleep_flag == CAN_SLEEP) 181 pause("mpsdiag", hz/10); 182 else 183 DELAY(100 * 1000); 184 185 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 186 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 187 error = 0; 188 break; 189 } 190 } 191 if (error) { 192 mps_dprint(sc, MPS_INIT, "sequence failed, error=%d, exit\n", 193 error); 194 return (error); 195 } 196 197 /* Send the actual reset. XXX need to refresh the reg? */ 198 reg |= MPI2_DIAG_RESET_ADAPTER; 199 mps_dprint(sc, MPS_INIT, "sequence success, sending reset, reg= 0x%x\n", 200 reg); 201 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, reg); 202 203 /* Wait up to 300 seconds in 50ms intervals */ 204 error = ETIMEDOUT; 205 for (i = 0; i < 6000; i++) { 206 /* 207 * Wait 50 msec. If this is the first time through, wait 256 208 * msec to satisfy Diag Reset timing requirements. 209 */ 210 if (first_wait_done) { 211 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 212 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 213 "mpsdiag", hz/20); 214 else if (sleep_flag == CAN_SLEEP) 215 pause("mpsdiag", hz/20); 216 else 217 DELAY(50 * 1000); 218 } else { 219 DELAY(256 * 1000); 220 first_wait_done = TRUE; 221 } 222 /* 223 * Check for the RESET_ADAPTER bit to be cleared first, then 224 * wait for the RESET state to be cleared, which takes a little 225 * longer. 226 */ 227 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 228 if (reg & MPI2_DIAG_RESET_ADAPTER) { 229 continue; 230 } 231 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 232 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 233 error = 0; 234 break; 235 } 236 } 237 if (error) { 238 mps_dprint(sc, MPS_INIT, "reset failed, error= %d, exit\n", 239 error); 240 return (error); 241 } 242 243 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 244 mps_dprint(sc, MPS_INIT, "diag reset success, exit\n"); 245 246 return (0); 247 } 248 249 static int 250 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag) 251 { 252 int error; 253 254 MPS_FUNCTRACE(sc); 255 256 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 257 258 error = 0; 259 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 260 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 261 MPI2_DOORBELL_FUNCTION_SHIFT); 262 263 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) { 264 mps_dprint(sc, MPS_INIT|MPS_FAULT, 265 "Doorbell handshake failed\n"); 266 error = ETIMEDOUT; 267 } 268 269 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 270 return (error); 271 } 272 273 static int 274 mps_transition_ready(struct mps_softc *sc) 275 { 276 uint32_t reg, state; 277 int error, tries = 0; 278 int sleep_flags; 279 280 MPS_FUNCTRACE(sc); 281 /* If we are in attach call, do not sleep */ 282 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE) 283 ? CAN_SLEEP:NO_SLEEP; 284 error = 0; 285 286 mps_dprint(sc, MPS_INIT, "%s entered, sleep_flags= %d\n", 287 __func__, sleep_flags); 288 289 while (tries++ < 1200) { 290 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 291 mps_dprint(sc, MPS_INIT, " Doorbell= 0x%x\n", reg); 292 293 /* 294 * Ensure the IOC is ready to talk. If it's not, try 295 * resetting it. 296 */ 297 if (reg & MPI2_DOORBELL_USED) { 298 mps_dprint(sc, MPS_INIT, " Not ready, sending diag " 299 "reset\n"); 300 mps_diag_reset(sc, sleep_flags); 301 DELAY(50000); 302 continue; 303 } 304 305 /* Is the adapter owned by another peer? */ 306 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 307 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 308 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC is under the " 309 "control of another peer host, aborting " 310 "initialization.\n"); 311 error = ENXIO; 312 break; 313 } 314 315 state = reg & MPI2_IOC_STATE_MASK; 316 if (state == MPI2_IOC_STATE_READY) { 317 /* Ready to go! */ 318 error = 0; 319 break; 320 } else if (state == MPI2_IOC_STATE_FAULT) { 321 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC in fault " 322 "state 0x%x, resetting\n", 323 state & MPI2_DOORBELL_FAULT_CODE_MASK); 324 mps_diag_reset(sc, sleep_flags); 325 } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 326 /* Need to take ownership */ 327 mps_message_unit_reset(sc, sleep_flags); 328 } else if (state == MPI2_IOC_STATE_RESET) { 329 /* Wait a bit, IOC might be in transition */ 330 mps_dprint(sc, MPS_INIT|MPS_FAULT, 331 "IOC in unexpected reset state\n"); 332 } else { 333 mps_dprint(sc, MPS_INIT|MPS_FAULT, 334 "IOC in unknown state 0x%x\n", state); 335 error = EINVAL; 336 break; 337 } 338 339 /* Wait 50ms for things to settle down. */ 340 DELAY(50000); 341 } 342 343 if (error) 344 mps_dprint(sc, MPS_INIT|MPS_FAULT, 345 "Cannot transition IOC to ready\n"); 346 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 347 348 return (error); 349 } 350 351 static int 352 mps_transition_operational(struct mps_softc *sc) 353 { 354 uint32_t reg, state; 355 int error; 356 357 MPS_FUNCTRACE(sc); 358 359 error = 0; 360 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 361 mps_dprint(sc, MPS_INIT, "%s entered, Doorbell= 0x%x\n", __func__, reg); 362 363 state = reg & MPI2_IOC_STATE_MASK; 364 if (state != MPI2_IOC_STATE_READY) { 365 mps_dprint(sc, MPS_INIT, "IOC not ready\n"); 366 if ((error = mps_transition_ready(sc)) != 0) { 367 mps_dprint(sc, MPS_INIT|MPS_FAULT, 368 "failed to transition ready, exit\n"); 369 return (error); 370 } 371 } 372 373 error = mps_send_iocinit(sc); 374 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 375 376 return (error); 377 } 378 379 static void 380 mps_resize_queues(struct mps_softc *sc) 381 { 382 u_int reqcr, prireqcr, maxio, sges_per_frame; 383 384 /* 385 * Size the queues. Since the reply queues always need one free 386 * entry, we'll deduct one reply message here. The LSI documents 387 * suggest instead to add a count to the request queue, but I think 388 * that it's better to deduct from reply queue. 389 */ 390 prireqcr = MAX(1, sc->max_prireqframes); 391 prireqcr = MIN(prireqcr, sc->facts->HighPriorityCredit); 392 393 reqcr = MAX(2, sc->max_reqframes); 394 reqcr = MIN(reqcr, sc->facts->RequestCredit); 395 396 sc->num_reqs = prireqcr + reqcr; 397 sc->num_prireqs = prireqcr; 398 sc->num_replies = MIN(sc->max_replyframes + sc->max_evtframes, 399 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 400 401 /* Store the request frame size in bytes rather than as 32bit words */ 402 sc->reqframesz = sc->facts->IOCRequestFrameSize * 4; 403 404 /* 405 * Max IO Size is Page Size * the following: 406 * ((SGEs per frame - 1 for chain element) * Max Chain Depth) 407 * + 1 for no chain needed in last frame 408 * 409 * If user suggests a Max IO size to use, use the smaller of the 410 * user's value and the calculated value as long as the user's 411 * value is larger than 0. The user's value is in pages. 412 */ 413 sges_per_frame = sc->reqframesz / sizeof(MPI2_SGE_SIMPLE64) - 1; 414 maxio = (sges_per_frame * sc->facts->MaxChainDepth + 1) * PAGE_SIZE; 415 416 /* 417 * If I/O size limitation requested, then use it and pass up to CAM. 418 * If not, use MAXPHYS as an optimization hint, but report HW limit. 419 */ 420 if (sc->max_io_pages > 0) { 421 maxio = min(maxio, sc->max_io_pages * PAGE_SIZE); 422 sc->maxio = maxio; 423 } else { 424 sc->maxio = maxio; 425 maxio = min(maxio, MAXPHYS); 426 } 427 428 sc->num_chains = (maxio / PAGE_SIZE + sges_per_frame - 2) / 429 sges_per_frame * reqcr; 430 if (sc->max_chains > 0 && sc->max_chains < sc->num_chains) 431 sc->num_chains = sc->max_chains; 432 433 /* 434 * Figure out the number of MSIx-based queues. If the firmware or 435 * user has done something crazy and not allowed enough credit for 436 * the queues to be useful then don't enable multi-queue. 437 */ 438 if (sc->facts->MaxMSIxVectors < 2) 439 sc->msi_msgs = 1; 440 441 if (sc->msi_msgs > 1) { 442 sc->msi_msgs = MIN(sc->msi_msgs, mp_ncpus); 443 sc->msi_msgs = MIN(sc->msi_msgs, sc->facts->MaxMSIxVectors); 444 if (sc->num_reqs / sc->msi_msgs < 2) 445 sc->msi_msgs = 1; 446 } 447 448 mps_dprint(sc, MPS_INIT, "Sized queues to q=%d reqs=%d replies=%d\n", 449 sc->msi_msgs, sc->num_reqs, sc->num_replies); 450 } 451 452 /* 453 * This is called during attach and when re-initializing due to a Diag Reset. 454 * IOC Facts is used to allocate many of the structures needed by the driver. 455 * If called from attach, de-allocation is not required because the driver has 456 * not allocated any structures yet, but if called from a Diag Reset, previously 457 * allocated structures based on IOC Facts will need to be freed and re- 458 * allocated bases on the latest IOC Facts. 459 */ 460 static int 461 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching) 462 { 463 int error; 464 Mpi2IOCFactsReply_t saved_facts; 465 uint8_t saved_mode, reallocating; 466 467 mps_dprint(sc, MPS_INIT|MPS_TRACE, "%s entered\n", __func__); 468 469 /* Save old IOC Facts and then only reallocate if Facts have changed */ 470 if (!attaching) { 471 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 472 } 473 474 /* 475 * Get IOC Facts. In all cases throughout this function, panic if doing 476 * a re-initialization and only return the error if attaching so the OS 477 * can handle it. 478 */ 479 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) { 480 if (attaching) { 481 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to get " 482 "IOC Facts with error %d, exit\n", error); 483 return (error); 484 } else { 485 panic("%s failed to get IOC Facts with error %d\n", 486 __func__, error); 487 } 488 } 489 490 MPS_DPRINT_PAGE(sc, MPS_XINFO, iocfacts, sc->facts); 491 492 snprintf(sc->fw_version, sizeof(sc->fw_version), 493 "%02d.%02d.%02d.%02d", 494 sc->facts->FWVersion.Struct.Major, 495 sc->facts->FWVersion.Struct.Minor, 496 sc->facts->FWVersion.Struct.Unit, 497 sc->facts->FWVersion.Struct.Dev); 498 499 mps_dprint(sc, MPS_INFO, "Firmware: %s, Driver: %s\n", sc->fw_version, 500 MPS_DRIVER_VERSION); 501 mps_dprint(sc, MPS_INFO, "IOCCapabilities: %b\n", 502 sc->facts->IOCCapabilities, 503 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 504 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 505 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); 506 507 /* 508 * If the chip doesn't support event replay then a hard reset will be 509 * required to trigger a full discovery. Do the reset here then 510 * retransition to Ready. A hard reset might have already been done, 511 * but it doesn't hurt to do it again. Only do this if attaching, not 512 * for a Diag Reset. 513 */ 514 if (attaching && ((sc->facts->IOCCapabilities & 515 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0)) { 516 mps_dprint(sc, MPS_INIT, "No event replay, reseting\n"); 517 mps_diag_reset(sc, NO_SLEEP); 518 if ((error = mps_transition_ready(sc)) != 0) { 519 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 520 "transition to ready with error %d, exit\n", 521 error); 522 return (error); 523 } 524 } 525 526 /* 527 * Set flag if IR Firmware is loaded. If the RAID Capability has 528 * changed from the previous IOC Facts, log a warning, but only if 529 * checking this after a Diag Reset and not during attach. 530 */ 531 saved_mode = sc->ir_firmware; 532 if (sc->facts->IOCCapabilities & 533 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 534 sc->ir_firmware = 1; 535 if (!attaching) { 536 if (sc->ir_firmware != saved_mode) { 537 mps_dprint(sc, MPS_INIT|MPS_FAULT, "new IR/IT mode " 538 "in IOC Facts does not match previous mode\n"); 539 } 540 } 541 542 /* Only deallocate and reallocate if relevant IOC Facts have changed */ 543 reallocating = FALSE; 544 sc->mps_flags &= ~MPS_FLAGS_REALLOCATED; 545 546 if ((!attaching) && 547 ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 548 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 549 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 550 (saved_facts.RequestCredit != sc->facts->RequestCredit) || 551 (saved_facts.ProductID != sc->facts->ProductID) || 552 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 553 (saved_facts.IOCRequestFrameSize != 554 sc->facts->IOCRequestFrameSize) || 555 (saved_facts.MaxTargets != sc->facts->MaxTargets) || 556 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 557 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 558 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 559 (saved_facts.MaxReplyDescriptorPostQueueDepth != 560 sc->facts->MaxReplyDescriptorPostQueueDepth) || 561 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 562 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 563 (saved_facts.MaxPersistentEntries != 564 sc->facts->MaxPersistentEntries))) { 565 reallocating = TRUE; 566 567 /* Record that we reallocated everything */ 568 sc->mps_flags |= MPS_FLAGS_REALLOCATED; 569 } 570 571 /* 572 * Some things should be done if attaching or re-allocating after a Diag 573 * Reset, but are not needed after a Diag Reset if the FW has not 574 * changed. 575 */ 576 if (attaching || reallocating) { 577 /* 578 * Check if controller supports FW diag buffers and set flag to 579 * enable each type. 580 */ 581 if (sc->facts->IOCCapabilities & 582 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 583 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 584 enabled = TRUE; 585 if (sc->facts->IOCCapabilities & 586 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 587 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 588 enabled = TRUE; 589 if (sc->facts->IOCCapabilities & 590 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 591 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 592 enabled = TRUE; 593 594 /* 595 * Set flag if EEDP is supported and if TLR is supported. 596 */ 597 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 598 sc->eedp_enabled = TRUE; 599 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 600 sc->control_TLR = TRUE; 601 602 mps_resize_queues(sc); 603 604 /* 605 * Initialize all Tail Queues 606 */ 607 TAILQ_INIT(&sc->req_list); 608 TAILQ_INIT(&sc->high_priority_req_list); 609 TAILQ_INIT(&sc->chain_list); 610 TAILQ_INIT(&sc->tm_list); 611 } 612 613 /* 614 * If doing a Diag Reset and the FW is significantly different 615 * (reallocating will be set above in IOC Facts comparison), then all 616 * buffers based on the IOC Facts will need to be freed before they are 617 * reallocated. 618 */ 619 if (reallocating) { 620 mps_iocfacts_free(sc); 621 mpssas_realloc_targets(sc, saved_facts.MaxTargets + 622 saved_facts.MaxVolumes); 623 } 624 625 /* 626 * Any deallocation has been completed. Now start reallocating 627 * if needed. Will only need to reallocate if attaching or if the new 628 * IOC Facts are different from the previous IOC Facts after a Diag 629 * Reset. Targets have already been allocated above if needed. 630 */ 631 error = 0; 632 while (attaching || reallocating) { 633 if ((error = mps_alloc_hw_queues(sc)) != 0) 634 break; 635 if ((error = mps_alloc_replies(sc)) != 0) 636 break; 637 if ((error = mps_alloc_requests(sc)) != 0) 638 break; 639 if ((error = mps_alloc_queues(sc)) != 0) 640 break; 641 642 break; 643 } 644 if (error) { 645 mps_dprint(sc, MPS_INIT|MPS_FAULT, 646 "Failed to alloc queues with error %d\n", error); 647 mps_free(sc); 648 return (error); 649 } 650 651 /* Always initialize the queues */ 652 bzero(sc->free_queue, sc->fqdepth * 4); 653 mps_init_queues(sc); 654 655 /* 656 * Always get the chip out of the reset state, but only panic if not 657 * attaching. If attaching and there is an error, that is handled by 658 * the OS. 659 */ 660 error = mps_transition_operational(sc); 661 if (error != 0) { 662 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 663 "transition to operational with error %d\n", error); 664 mps_free(sc); 665 return (error); 666 } 667 668 /* 669 * Finish the queue initialization. 670 * These are set here instead of in mps_init_queues() because the 671 * IOC resets these values during the state transition in 672 * mps_transition_operational(). The free index is set to 1 673 * because the corresponding index in the IOC is set to 0, and the 674 * IOC treats the queues as full if both are set to the same value. 675 * Hence the reason that the queue can't hold all of the possible 676 * replies. 677 */ 678 sc->replypostindex = 0; 679 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 680 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 681 682 /* 683 * Attach the subsystems so they can prepare their event masks. 684 * XXX Should be dynamic so that IM/IR and user modules can attach 685 */ 686 error = 0; 687 while (attaching) { 688 mps_dprint(sc, MPS_INIT, "Attaching subsystems\n"); 689 if ((error = mps_attach_log(sc)) != 0) 690 break; 691 if ((error = mps_attach_sas(sc)) != 0) 692 break; 693 if ((error = mps_attach_user(sc)) != 0) 694 break; 695 break; 696 } 697 if (error) { 698 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to attach all " 699 "subsystems: error %d\n", error); 700 mps_free(sc); 701 return (error); 702 } 703 704 /* 705 * XXX If the number of MSI-X vectors changes during re-init, this 706 * won't see it and adjust. 707 */ 708 if (attaching && (error = mps_pci_setup_interrupts(sc)) != 0) { 709 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to setup " 710 "interrupts\n"); 711 mps_free(sc); 712 return (error); 713 } 714 715 /* 716 * Set flag if this is a WD controller. This shouldn't ever change, but 717 * reset it after a Diag Reset, just in case. 718 */ 719 sc->WD_available = FALSE; 720 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200) 721 sc->WD_available = TRUE; 722 723 return (error); 724 } 725 726 /* 727 * This is called if memory is being free (during detach for example) and when 728 * buffers need to be reallocated due to a Diag Reset. 729 */ 730 static void 731 mps_iocfacts_free(struct mps_softc *sc) 732 { 733 struct mps_command *cm; 734 int i; 735 736 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 737 738 if (sc->free_busaddr != 0) 739 bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 740 if (sc->free_queue != NULL) 741 bus_dmamem_free(sc->queues_dmat, sc->free_queue, 742 sc->queues_map); 743 if (sc->queues_dmat != NULL) 744 bus_dma_tag_destroy(sc->queues_dmat); 745 746 if (sc->chain_busaddr != 0) 747 bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 748 if (sc->chain_frames != NULL) 749 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 750 sc->chain_map); 751 if (sc->chain_dmat != NULL) 752 bus_dma_tag_destroy(sc->chain_dmat); 753 754 if (sc->sense_busaddr != 0) 755 bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 756 if (sc->sense_frames != NULL) 757 bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 758 sc->sense_map); 759 if (sc->sense_dmat != NULL) 760 bus_dma_tag_destroy(sc->sense_dmat); 761 762 if (sc->reply_busaddr != 0) 763 bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 764 if (sc->reply_frames != NULL) 765 bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 766 sc->reply_map); 767 if (sc->reply_dmat != NULL) 768 bus_dma_tag_destroy(sc->reply_dmat); 769 770 if (sc->req_busaddr != 0) 771 bus_dmamap_unload(sc->req_dmat, sc->req_map); 772 if (sc->req_frames != NULL) 773 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 774 if (sc->req_dmat != NULL) 775 bus_dma_tag_destroy(sc->req_dmat); 776 777 if (sc->chains != NULL) 778 free(sc->chains, M_MPT2); 779 if (sc->commands != NULL) { 780 for (i = 1; i < sc->num_reqs; i++) { 781 cm = &sc->commands[i]; 782 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 783 } 784 free(sc->commands, M_MPT2); 785 } 786 if (sc->buffer_dmat != NULL) 787 bus_dma_tag_destroy(sc->buffer_dmat); 788 789 mps_pci_free_interrupts(sc); 790 free(sc->queues, M_MPT2); 791 sc->queues = NULL; 792 } 793 794 /* 795 * The terms diag reset and hard reset are used interchangeably in the MPI 796 * docs to mean resetting the controller chip. In this code diag reset 797 * cleans everything up, and the hard reset function just sends the reset 798 * sequence to the chip. This should probably be refactored so that every 799 * subsystem gets a reset notification of some sort, and can clean up 800 * appropriately. 801 */ 802 int 803 mps_reinit(struct mps_softc *sc) 804 { 805 int error; 806 struct mpssas_softc *sassc; 807 808 sassc = sc->sassc; 809 810 MPS_FUNCTRACE(sc); 811 812 mtx_assert(&sc->mps_mtx, MA_OWNED); 813 814 mps_dprint(sc, MPS_INIT|MPS_INFO, "Reinitializing controller\n"); 815 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) { 816 mps_dprint(sc, MPS_INIT, "Reset already in progress\n"); 817 return 0; 818 } 819 820 /* make sure the completion callbacks can recognize they're getting 821 * a NULL cm_reply due to a reset. 822 */ 823 sc->mps_flags |= MPS_FLAGS_DIAGRESET; 824 825 /* 826 * Mask interrupts here. 827 */ 828 mps_dprint(sc, MPS_INIT, "masking interrupts and resetting\n"); 829 mps_mask_intr(sc); 830 831 error = mps_diag_reset(sc, CAN_SLEEP); 832 if (error != 0) { 833 /* XXXSL No need to panic here */ 834 panic("%s hard reset failed with error %d\n", 835 __func__, error); 836 } 837 838 /* Restore the PCI state, including the MSI-X registers */ 839 mps_pci_restore(sc); 840 841 /* Give the I/O subsystem special priority to get itself prepared */ 842 mpssas_handle_reinit(sc); 843 844 /* 845 * Get IOC Facts and allocate all structures based on this information. 846 * The attach function will also call mps_iocfacts_allocate at startup. 847 * If relevant values have changed in IOC Facts, this function will free 848 * all of the memory based on IOC Facts and reallocate that memory. 849 */ 850 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) { 851 panic("%s IOC Facts based allocation failed with error %d\n", 852 __func__, error); 853 } 854 855 /* 856 * Mapping structures will be re-allocated after getting IOC Page8, so 857 * free these structures here. 858 */ 859 mps_mapping_exit(sc); 860 861 /* 862 * The static page function currently read is IOC Page8. Others can be 863 * added in future. It's possible that the values in IOC Page8 have 864 * changed after a Diag Reset due to user modification, so always read 865 * these. Interrupts are masked, so unmask them before getting config 866 * pages. 867 */ 868 mps_unmask_intr(sc); 869 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET; 870 mps_base_static_config_pages(sc); 871 872 /* 873 * Some mapping info is based in IOC Page8 data, so re-initialize the 874 * mapping tables. 875 */ 876 mps_mapping_initialize(sc); 877 878 /* 879 * Restart will reload the event masks clobbered by the reset, and 880 * then enable the port. 881 */ 882 mps_reregister_events(sc); 883 884 /* the end of discovery will release the simq, so we're done. */ 885 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Finished sc %p post %u free %u\n", 886 sc, sc->replypostindex, sc->replyfreeindex); 887 888 mpssas_release_simq_reinit(sassc); 889 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 890 891 return 0; 892 } 893 894 /* Wait for the chip to ACK a word that we've put into its FIFO 895 * Wait for <timeout> seconds. In single loop wait for busy loop 896 * for 500 microseconds. 897 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 898 * */ 899 static int 900 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag) 901 { 902 903 u32 cntdn, count; 904 u32 int_status; 905 u32 doorbell; 906 907 count = 0; 908 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 909 do { 910 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 911 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 912 mps_dprint(sc, MPS_TRACE, 913 "%s: successful count(%d), timeout(%d)\n", 914 __func__, count, timeout); 915 return 0; 916 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 917 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET); 918 if ((doorbell & MPI2_IOC_STATE_MASK) == 919 MPI2_IOC_STATE_FAULT) { 920 mps_dprint(sc, MPS_FAULT, 921 "fault_state(0x%04x)!\n", doorbell); 922 return (EFAULT); 923 } 924 } else if (int_status == 0xFFFFFFFF) 925 goto out; 926 927 /* If it can sleep, sleep for 1 milisecond, else busy loop for 928 * 0.5 milisecond */ 929 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 930 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 931 "mpsdba", hz/1000); 932 else if (sleep_flag == CAN_SLEEP) 933 pause("mpsdba", hz/1000); 934 else 935 DELAY(500); 936 count++; 937 } while (--cntdn); 938 939 out: 940 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), " 941 "int_status(%x)!\n", __func__, count, int_status); 942 return (ETIMEDOUT); 943 944 } 945 946 /* Wait for the chip to signal that the next word in its FIFO can be fetched */ 947 static int 948 mps_wait_db_int(struct mps_softc *sc) 949 { 950 int retry; 951 952 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { 953 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 954 MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 955 return (0); 956 DELAY(2000); 957 } 958 return (ETIMEDOUT); 959 } 960 961 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 962 static int 963 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 964 int req_sz, int reply_sz, int timeout) 965 { 966 uint32_t *data32; 967 uint16_t *data16; 968 int i, count, ioc_sz, residual; 969 int sleep_flags = CAN_SLEEP; 970 971 if (curthread->td_no_sleeping != 0) 972 sleep_flags = NO_SLEEP; 973 974 /* Step 1 */ 975 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 976 977 /* Step 2 */ 978 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 979 return (EBUSY); 980 981 /* Step 3 982 * Announce that a message is coming through the doorbell. Messages 983 * are pushed at 32bit words, so round up if needed. 984 */ 985 count = (req_sz + 3) / 4; 986 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 987 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 988 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 989 990 /* Step 4 */ 991 if (mps_wait_db_int(sc) || 992 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 993 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n"); 994 return (ENXIO); 995 } 996 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 997 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 998 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n"); 999 return (ENXIO); 1000 } 1001 1002 /* Step 5 */ 1003 /* Clock out the message data synchronously in 32-bit dwords*/ 1004 data32 = (uint32_t *)req; 1005 for (i = 0; i < count; i++) { 1006 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 1007 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 1008 mps_dprint(sc, MPS_FAULT, 1009 "Timeout while writing doorbell\n"); 1010 return (ENXIO); 1011 } 1012 } 1013 1014 /* Step 6 */ 1015 /* Clock in the reply in 16-bit words. The total length of the 1016 * message is always in the 4th byte, so clock out the first 2 words 1017 * manually, then loop the rest. 1018 */ 1019 data16 = (uint16_t *)reply; 1020 if (mps_wait_db_int(sc) != 0) { 1021 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n"); 1022 return (ENXIO); 1023 } 1024 data16[0] = 1025 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 1026 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1027 if (mps_wait_db_int(sc) != 0) { 1028 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n"); 1029 return (ENXIO); 1030 } 1031 data16[1] = 1032 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 1033 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1034 1035 /* Number of 32bit words in the message */ 1036 ioc_sz = reply->MsgLength; 1037 1038 /* 1039 * Figure out how many 16bit words to clock in without overrunning. 1040 * The precision loss with dividing reply_sz can safely be 1041 * ignored because the messages can only be multiples of 32bits. 1042 */ 1043 residual = 0; 1044 count = MIN((reply_sz / 4), ioc_sz) * 2; 1045 if (count < ioc_sz * 2) { 1046 residual = ioc_sz * 2 - count; 1047 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d " 1048 "residual message words\n", residual); 1049 } 1050 1051 for (i = 2; i < count; i++) { 1052 if (mps_wait_db_int(sc) != 0) { 1053 mps_dprint(sc, MPS_FAULT, 1054 "Timeout reading doorbell %d\n", i); 1055 return (ENXIO); 1056 } 1057 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) & 1058 MPI2_DOORBELL_DATA_MASK; 1059 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1060 } 1061 1062 /* 1063 * Pull out residual words that won't fit into the provided buffer. 1064 * This keeps the chip from hanging due to a driver programming 1065 * error. 1066 */ 1067 while (residual--) { 1068 if (mps_wait_db_int(sc) != 0) { 1069 mps_dprint(sc, MPS_FAULT, 1070 "Timeout reading doorbell\n"); 1071 return (ENXIO); 1072 } 1073 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET); 1074 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1075 } 1076 1077 /* Step 7 */ 1078 if (mps_wait_db_int(sc) != 0) { 1079 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n"); 1080 return (ENXIO); 1081 } 1082 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 1083 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n"); 1084 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1085 1086 return (0); 1087 } 1088 1089 static void 1090 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) 1091 { 1092 reply_descriptor rd; 1093 MPS_FUNCTRACE(sc); 1094 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n", 1095 cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 1096 1097 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN)) 1098 mtx_assert(&sc->mps_mtx, MA_OWNED); 1099 1100 if (++sc->io_cmds_active > sc->io_cmds_highwater) 1101 sc->io_cmds_highwater++; 1102 rd.u.low = cm->cm_desc.Words.Low; 1103 rd.u.high = cm->cm_desc.Words.High; 1104 rd.word = htole64(rd.word); 1105 /* TODO-We may need to make below regwrite atomic */ 1106 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 1107 rd.u.low); 1108 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 1109 rd.u.high); 1110 } 1111 1112 /* 1113 * Just the FACTS, ma'am. 1114 */ 1115 static int 1116 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 1117 { 1118 MPI2_DEFAULT_REPLY *reply; 1119 MPI2_IOC_FACTS_REQUEST request; 1120 int error, req_sz, reply_sz; 1121 1122 MPS_FUNCTRACE(sc); 1123 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1124 1125 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 1126 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 1127 reply = (MPI2_DEFAULT_REPLY *)facts; 1128 1129 bzero(&request, req_sz); 1130 request.Function = MPI2_FUNCTION_IOC_FACTS; 1131 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1132 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1133 1134 return (error); 1135 } 1136 1137 static int 1138 mps_send_iocinit(struct mps_softc *sc) 1139 { 1140 MPI2_IOC_INIT_REQUEST init; 1141 MPI2_DEFAULT_REPLY reply; 1142 int req_sz, reply_sz, error; 1143 struct timeval now; 1144 uint64_t time_in_msec; 1145 1146 MPS_FUNCTRACE(sc); 1147 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1148 1149 /* Do a quick sanity check on proper initialization */ 1150 if ((sc->pqdepth == 0) || (sc->fqdepth == 0) || (sc->reqframesz == 0) 1151 || (sc->replyframesz == 0)) { 1152 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1153 "Driver not fully initialized for IOCInit\n"); 1154 return (EINVAL); 1155 } 1156 1157 req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1158 reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1159 bzero(&init, req_sz); 1160 bzero(&reply, reply_sz); 1161 1162 /* 1163 * Fill in the init block. Note that most addresses are 1164 * deliberately in the lower 32bits of memory. This is a micro- 1165 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1166 */ 1167 init.Function = MPI2_FUNCTION_IOC_INIT; 1168 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1169 init.MsgVersion = htole16(MPI2_VERSION); 1170 init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1171 init.SystemRequestFrameSize = htole16((uint16_t)(sc->reqframesz / 4)); 1172 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1173 init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1174 init.SenseBufferAddressHigh = 0; 1175 init.SystemReplyAddressHigh = 0; 1176 init.SystemRequestFrameBaseAddress.High = 0; 1177 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr); 1178 init.ReplyDescriptorPostQueueAddress.High = 0; 1179 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr); 1180 init.ReplyFreeQueueAddress.High = 0; 1181 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1182 getmicrotime(&now); 1183 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1184 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1185 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1186 1187 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1188 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1189 error = ENXIO; 1190 1191 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1192 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1193 return (error); 1194 } 1195 1196 void 1197 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1198 { 1199 bus_addr_t *addr; 1200 1201 addr = arg; 1202 *addr = segs[0].ds_addr; 1203 } 1204 1205 void 1206 mps_memaddr_wait_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1207 { 1208 struct mps_busdma_context *ctx; 1209 int need_unload, need_free; 1210 1211 ctx = (struct mps_busdma_context *)arg; 1212 need_unload = 0; 1213 need_free = 0; 1214 1215 mps_lock(ctx->softc); 1216 ctx->error = error; 1217 ctx->completed = 1; 1218 if ((error == 0) && (ctx->abandoned == 0)) { 1219 *ctx->addr = segs[0].ds_addr; 1220 } else { 1221 if (nsegs != 0) 1222 need_unload = 1; 1223 if (ctx->abandoned != 0) 1224 need_free = 1; 1225 } 1226 if (need_free == 0) 1227 wakeup(ctx); 1228 1229 mps_unlock(ctx->softc); 1230 1231 if (need_unload != 0) { 1232 bus_dmamap_unload(ctx->buffer_dmat, 1233 ctx->buffer_dmamap); 1234 *ctx->addr = 0; 1235 } 1236 1237 if (need_free != 0) 1238 free(ctx, M_MPSUSER); 1239 } 1240 1241 static int 1242 mps_alloc_queues(struct mps_softc *sc) 1243 { 1244 struct mps_queue *q; 1245 u_int nq, i; 1246 1247 nq = sc->msi_msgs; 1248 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Allocating %d I/O queues\n", nq); 1249 1250 sc->queues = malloc(sizeof(struct mps_queue) * nq, M_MPT2, 1251 M_NOWAIT|M_ZERO); 1252 if (sc->queues == NULL) 1253 return (ENOMEM); 1254 1255 for (i = 0; i < nq; i++) { 1256 q = &sc->queues[i]; 1257 mps_dprint(sc, MPS_INIT, "Configuring queue %d %p\n", i, q); 1258 q->sc = sc; 1259 q->qnum = i; 1260 } 1261 1262 return (0); 1263 } 1264 1265 static int 1266 mps_alloc_hw_queues(struct mps_softc *sc) 1267 { 1268 bus_addr_t queues_busaddr; 1269 uint8_t *queues; 1270 int qsize, fqsize, pqsize; 1271 1272 /* 1273 * The reply free queue contains 4 byte entries in multiples of 16 and 1274 * aligned on a 16 byte boundary. There must always be an unused entry. 1275 * This queue supplies fresh reply frames for the firmware to use. 1276 * 1277 * The reply descriptor post queue contains 8 byte entries in 1278 * multiples of 16 and aligned on a 16 byte boundary. This queue 1279 * contains filled-in reply frames sent from the firmware to the host. 1280 * 1281 * These two queues are allocated together for simplicity. 1282 */ 1283 sc->fqdepth = roundup2(sc->num_replies + 1, 16); 1284 sc->pqdepth = roundup2(sc->num_replies + 1, 16); 1285 fqsize= sc->fqdepth * 4; 1286 pqsize = sc->pqdepth * 8; 1287 qsize = fqsize + pqsize; 1288 1289 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1290 16, 0, /* algnmnt, boundary */ 1291 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1292 BUS_SPACE_MAXADDR, /* highaddr */ 1293 NULL, NULL, /* filter, filterarg */ 1294 qsize, /* maxsize */ 1295 1, /* nsegments */ 1296 qsize, /* maxsegsize */ 1297 0, /* flags */ 1298 NULL, NULL, /* lockfunc, lockarg */ 1299 &sc->queues_dmat)) { 1300 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues DMA tag\n"); 1301 return (ENOMEM); 1302 } 1303 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1304 &sc->queues_map)) { 1305 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues memory\n"); 1306 return (ENOMEM); 1307 } 1308 bzero(queues, qsize); 1309 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1310 mps_memaddr_cb, &queues_busaddr, 0); 1311 1312 sc->free_queue = (uint32_t *)queues; 1313 sc->free_busaddr = queues_busaddr; 1314 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1315 sc->post_busaddr = queues_busaddr + fqsize; 1316 1317 return (0); 1318 } 1319 1320 static int 1321 mps_alloc_replies(struct mps_softc *sc) 1322 { 1323 int rsize, num_replies; 1324 1325 /* Store the reply frame size in bytes rather than as 32bit words */ 1326 sc->replyframesz = sc->facts->ReplyFrameSize * 4; 1327 1328 /* 1329 * sc->num_replies should be one less than sc->fqdepth. We need to 1330 * allocate space for sc->fqdepth replies, but only sc->num_replies 1331 * replies can be used at once. 1332 */ 1333 num_replies = max(sc->fqdepth, sc->num_replies); 1334 1335 rsize = sc->replyframesz * num_replies; 1336 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1337 4, 0, /* algnmnt, boundary */ 1338 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1339 BUS_SPACE_MAXADDR, /* highaddr */ 1340 NULL, NULL, /* filter, filterarg */ 1341 rsize, /* maxsize */ 1342 1, /* nsegments */ 1343 rsize, /* maxsegsize */ 1344 0, /* flags */ 1345 NULL, NULL, /* lockfunc, lockarg */ 1346 &sc->reply_dmat)) { 1347 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies DMA tag\n"); 1348 return (ENOMEM); 1349 } 1350 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1351 BUS_DMA_NOWAIT, &sc->reply_map)) { 1352 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies memory\n"); 1353 return (ENOMEM); 1354 } 1355 bzero(sc->reply_frames, rsize); 1356 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1357 mps_memaddr_cb, &sc->reply_busaddr, 0); 1358 1359 return (0); 1360 } 1361 1362 static int 1363 mps_alloc_requests(struct mps_softc *sc) 1364 { 1365 struct mps_command *cm; 1366 struct mps_chain *chain; 1367 int i, rsize, nsegs; 1368 1369 rsize = sc->reqframesz * sc->num_reqs; 1370 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1371 16, 0, /* algnmnt, boundary */ 1372 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1373 BUS_SPACE_MAXADDR, /* highaddr */ 1374 NULL, NULL, /* filter, filterarg */ 1375 rsize, /* maxsize */ 1376 1, /* nsegments */ 1377 rsize, /* maxsegsize */ 1378 0, /* flags */ 1379 NULL, NULL, /* lockfunc, lockarg */ 1380 &sc->req_dmat)) { 1381 mps_dprint(sc, MPS_ERROR, "Cannot allocate request DMA tag\n"); 1382 return (ENOMEM); 1383 } 1384 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1385 BUS_DMA_NOWAIT, &sc->req_map)) { 1386 mps_dprint(sc, MPS_ERROR, "Cannot allocate request memory\n"); 1387 return (ENOMEM); 1388 } 1389 bzero(sc->req_frames, rsize); 1390 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1391 mps_memaddr_cb, &sc->req_busaddr, 0); 1392 1393 rsize = sc->reqframesz * sc->num_chains; 1394 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1395 16, 0, /* algnmnt, boundary */ 1396 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1397 BUS_SPACE_MAXADDR, /* highaddr */ 1398 NULL, NULL, /* filter, filterarg */ 1399 rsize, /* maxsize */ 1400 1, /* nsegments */ 1401 rsize, /* maxsegsize */ 1402 0, /* flags */ 1403 NULL, NULL, /* lockfunc, lockarg */ 1404 &sc->chain_dmat)) { 1405 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain DMA tag\n"); 1406 return (ENOMEM); 1407 } 1408 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1409 BUS_DMA_NOWAIT, &sc->chain_map)) { 1410 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n"); 1411 return (ENOMEM); 1412 } 1413 bzero(sc->chain_frames, rsize); 1414 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize, 1415 mps_memaddr_cb, &sc->chain_busaddr, 0); 1416 1417 rsize = MPS_SENSE_LEN * sc->num_reqs; 1418 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1419 1, 0, /* algnmnt, boundary */ 1420 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1421 BUS_SPACE_MAXADDR, /* highaddr */ 1422 NULL, NULL, /* filter, filterarg */ 1423 rsize, /* maxsize */ 1424 1, /* nsegments */ 1425 rsize, /* maxsegsize */ 1426 0, /* flags */ 1427 NULL, NULL, /* lockfunc, lockarg */ 1428 &sc->sense_dmat)) { 1429 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense DMA tag\n"); 1430 return (ENOMEM); 1431 } 1432 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1433 BUS_DMA_NOWAIT, &sc->sense_map)) { 1434 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense memory\n"); 1435 return (ENOMEM); 1436 } 1437 bzero(sc->sense_frames, rsize); 1438 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1439 mps_memaddr_cb, &sc->sense_busaddr, 0); 1440 1441 sc->chains = malloc(sizeof(struct mps_chain) * sc->num_chains, M_MPT2, 1442 M_WAITOK | M_ZERO); 1443 if(!sc->chains) { 1444 mps_dprint(sc, MPS_ERROR, "Cannot allocate chains memory\n"); 1445 return (ENOMEM); 1446 } 1447 for (i = 0; i < sc->num_chains; i++) { 1448 chain = &sc->chains[i]; 1449 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames + 1450 i * sc->reqframesz); 1451 chain->chain_busaddr = sc->chain_busaddr + 1452 i * sc->reqframesz; 1453 mps_free_chain(sc, chain); 1454 sc->chain_free_lowwater++; 1455 } 1456 1457 nsegs = (sc->maxio / PAGE_SIZE) + 1; 1458 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1459 1, 0, /* algnmnt, boundary */ 1460 BUS_SPACE_MAXADDR, /* lowaddr */ 1461 BUS_SPACE_MAXADDR, /* highaddr */ 1462 NULL, NULL, /* filter, filterarg */ 1463 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 1464 nsegs, /* nsegments */ 1465 BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */ 1466 BUS_DMA_ALLOCNOW, /* flags */ 1467 busdma_lock_mutex, /* lockfunc */ 1468 &sc->mps_mtx, /* lockarg */ 1469 &sc->buffer_dmat)) { 1470 mps_dprint(sc, MPS_ERROR, "Cannot allocate buffer DMA tag\n"); 1471 return (ENOMEM); 1472 } 1473 1474 /* 1475 * SMID 0 cannot be used as a free command per the firmware spec. 1476 * Just drop that command instead of risking accounting bugs. 1477 */ 1478 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs, 1479 M_MPT2, M_WAITOK | M_ZERO); 1480 if(!sc->commands) { 1481 mps_dprint(sc, MPS_ERROR, "Cannot allocate command memory\n"); 1482 return (ENOMEM); 1483 } 1484 for (i = 1; i < sc->num_reqs; i++) { 1485 cm = &sc->commands[i]; 1486 cm->cm_req = sc->req_frames + i * sc->reqframesz; 1487 cm->cm_req_busaddr = sc->req_busaddr + i * sc->reqframesz; 1488 cm->cm_sense = &sc->sense_frames[i]; 1489 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN; 1490 cm->cm_desc.Default.SMID = i; 1491 cm->cm_sc = sc; 1492 TAILQ_INIT(&cm->cm_chain_list); 1493 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0); 1494 1495 /* XXX Is a failure here a critical problem? */ 1496 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) 1497 if (i <= sc->num_prireqs) 1498 mps_free_high_priority_command(sc, cm); 1499 else 1500 mps_free_command(sc, cm); 1501 else { 1502 panic("failed to allocate command %d\n", i); 1503 sc->num_reqs = i; 1504 break; 1505 } 1506 } 1507 1508 return (0); 1509 } 1510 1511 static int 1512 mps_init_queues(struct mps_softc *sc) 1513 { 1514 int i; 1515 1516 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1517 1518 /* 1519 * According to the spec, we need to use one less reply than we 1520 * have space for on the queue. So sc->num_replies (the number we 1521 * use) should be less than sc->fqdepth (allocated size). 1522 */ 1523 if (sc->num_replies >= sc->fqdepth) 1524 return (EINVAL); 1525 1526 /* 1527 * Initialize all of the free queue entries. 1528 */ 1529 for (i = 0; i < sc->fqdepth; i++) 1530 sc->free_queue[i] = sc->reply_busaddr + (i * sc->replyframesz); 1531 sc->replyfreeindex = sc->num_replies; 1532 1533 return (0); 1534 } 1535 1536 /* Get the driver parameter tunables. Lowest priority are the driver defaults. 1537 * Next are the global settings, if they exist. Highest are the per-unit 1538 * settings, if they exist. 1539 */ 1540 void 1541 mps_get_tunables(struct mps_softc *sc) 1542 { 1543 char tmpstr[80], mps_debug[80]; 1544 1545 /* XXX default to some debugging for now */ 1546 sc->mps_debug = MPS_INFO|MPS_FAULT; 1547 sc->disable_msix = 0; 1548 sc->disable_msi = 0; 1549 sc->max_msix = MPS_MSIX_MAX; 1550 sc->max_chains = MPS_CHAIN_FRAMES; 1551 sc->max_io_pages = MPS_MAXIO_PAGES; 1552 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD; 1553 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1554 sc->use_phynum = 1; 1555 sc->max_reqframes = MPS_REQ_FRAMES; 1556 sc->max_prireqframes = MPS_PRI_REQ_FRAMES; 1557 sc->max_replyframes = MPS_REPLY_FRAMES; 1558 sc->max_evtframes = MPS_EVT_REPLY_FRAMES; 1559 1560 /* 1561 * Grab the global variables. 1562 */ 1563 bzero(mps_debug, 80); 1564 if (TUNABLE_STR_FETCH("hw.mps.debug_level", mps_debug, 80) != 0) 1565 mps_parse_debug(sc, mps_debug); 1566 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix); 1567 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi); 1568 TUNABLE_INT_FETCH("hw.mps.max_msix", &sc->max_msix); 1569 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains); 1570 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages); 1571 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu); 1572 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time); 1573 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum); 1574 TUNABLE_INT_FETCH("hw.mps.max_reqframes", &sc->max_reqframes); 1575 TUNABLE_INT_FETCH("hw.mps.max_prireqframes", &sc->max_prireqframes); 1576 TUNABLE_INT_FETCH("hw.mps.max_replyframes", &sc->max_replyframes); 1577 TUNABLE_INT_FETCH("hw.mps.max_evtframes", &sc->max_evtframes); 1578 1579 /* Grab the unit-instance variables */ 1580 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level", 1581 device_get_unit(sc->mps_dev)); 1582 bzero(mps_debug, 80); 1583 if (TUNABLE_STR_FETCH(tmpstr, mps_debug, 80) != 0) 1584 mps_parse_debug(sc, mps_debug); 1585 1586 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix", 1587 device_get_unit(sc->mps_dev)); 1588 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1589 1590 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi", 1591 device_get_unit(sc->mps_dev)); 1592 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1593 1594 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_msix", 1595 device_get_unit(sc->mps_dev)); 1596 TUNABLE_INT_FETCH(tmpstr, &sc->max_msix); 1597 1598 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains", 1599 device_get_unit(sc->mps_dev)); 1600 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1601 1602 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages", 1603 device_get_unit(sc->mps_dev)); 1604 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages); 1605 1606 bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1607 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids", 1608 device_get_unit(sc->mps_dev)); 1609 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1610 1611 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu", 1612 device_get_unit(sc->mps_dev)); 1613 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1614 1615 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time", 1616 device_get_unit(sc->mps_dev)); 1617 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1618 1619 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num", 1620 device_get_unit(sc->mps_dev)); 1621 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum); 1622 1623 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_reqframes", 1624 device_get_unit(sc->mps_dev)); 1625 TUNABLE_INT_FETCH(tmpstr, &sc->max_reqframes); 1626 1627 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_prireqframes", 1628 device_get_unit(sc->mps_dev)); 1629 TUNABLE_INT_FETCH(tmpstr, &sc->max_prireqframes); 1630 1631 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_replyframes", 1632 device_get_unit(sc->mps_dev)); 1633 TUNABLE_INT_FETCH(tmpstr, &sc->max_replyframes); 1634 1635 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_evtframes", 1636 device_get_unit(sc->mps_dev)); 1637 TUNABLE_INT_FETCH(tmpstr, &sc->max_evtframes); 1638 1639 } 1640 1641 static void 1642 mps_setup_sysctl(struct mps_softc *sc) 1643 { 1644 struct sysctl_ctx_list *sysctl_ctx = NULL; 1645 struct sysctl_oid *sysctl_tree = NULL; 1646 char tmpstr[80], tmpstr2[80]; 1647 1648 /* 1649 * Setup the sysctl variable so the user can change the debug level 1650 * on the fly. 1651 */ 1652 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d", 1653 device_get_unit(sc->mps_dev)); 1654 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev)); 1655 1656 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev); 1657 if (sysctl_ctx != NULL) 1658 sysctl_tree = device_get_sysctl_tree(sc->mps_dev); 1659 1660 if (sysctl_tree == NULL) { 1661 sysctl_ctx_init(&sc->sysctl_ctx); 1662 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1663 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, 1664 CTLFLAG_RD, 0, tmpstr); 1665 if (sc->sysctl_tree == NULL) 1666 return; 1667 sysctl_ctx = &sc->sysctl_ctx; 1668 sysctl_tree = sc->sysctl_tree; 1669 } 1670 1671 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1672 OID_AUTO, "debug_level", CTLTYPE_STRING | CTLFLAG_RW |CTLFLAG_MPSAFE, 1673 sc, 0, mps_debug_sysctl, "A", "mps debug level"); 1674 1675 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1676 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1677 "Disable the use of MSI-X interrupts"); 1678 1679 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1680 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1681 "Disable the use of MSI interrupts"); 1682 1683 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1684 OID_AUTO, "max_msix", CTLFLAG_RD, &sc->max_msix, 0, 1685 "User-defined maximum number of MSIX queues"); 1686 1687 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1688 OID_AUTO, "msix_msgs", CTLFLAG_RD, &sc->msi_msgs, 0, 1689 "Negotiated number of MSIX queues"); 1690 1691 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1692 OID_AUTO, "max_reqframes", CTLFLAG_RD, &sc->max_reqframes, 0, 1693 "Total number of allocated request frames"); 1694 1695 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1696 OID_AUTO, "max_prireqframes", CTLFLAG_RD, &sc->max_prireqframes, 0, 1697 "Total number of allocated high priority request frames"); 1698 1699 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1700 OID_AUTO, "max_replyframes", CTLFLAG_RD, &sc->max_replyframes, 0, 1701 "Total number of allocated reply frames"); 1702 1703 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1704 OID_AUTO, "max_evtframes", CTLFLAG_RD, &sc->max_evtframes, 0, 1705 "Total number of event frames allocated"); 1706 1707 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1708 OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version, 1709 strlen(sc->fw_version), "firmware version"); 1710 1711 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1712 OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION, 1713 strlen(MPS_DRIVER_VERSION), "driver version"); 1714 1715 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1716 OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1717 &sc->io_cmds_active, 0, "number of currently active commands"); 1718 1719 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1720 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1721 &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1722 1723 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1724 OID_AUTO, "chain_free", CTLFLAG_RD, 1725 &sc->chain_free, 0, "number of free chain elements"); 1726 1727 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1728 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1729 &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1730 1731 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1732 OID_AUTO, "max_chains", CTLFLAG_RD, 1733 &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1734 1735 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1736 OID_AUTO, "max_io_pages", CTLFLAG_RD, 1737 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use " 1738 "IOCFacts)"); 1739 1740 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1741 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1742 "enable SSU to SATA SSD/HDD at shutdown"); 1743 1744 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1745 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1746 &sc->chain_alloc_fail, "chain allocation failures"); 1747 1748 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1749 OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1750 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1751 "spinup after SATA ID error"); 1752 1753 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1754 OID_AUTO, "mapping_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1755 mps_mapping_dump, "A", "Mapping Table Dump"); 1756 1757 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1758 OID_AUTO, "encl_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1759 mps_mapping_encl_dump, "A", "Enclosure Table Dump"); 1760 1761 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1762 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0, 1763 "Use the phy number for enumeration"); 1764 } 1765 1766 static struct mps_debug_string { 1767 char *name; 1768 int flag; 1769 } mps_debug_strings[] = { 1770 {"info", MPS_INFO}, 1771 {"fault", MPS_FAULT}, 1772 {"event", MPS_EVENT}, 1773 {"log", MPS_LOG}, 1774 {"recovery", MPS_RECOVERY}, 1775 {"error", MPS_ERROR}, 1776 {"init", MPS_INIT}, 1777 {"xinfo", MPS_XINFO}, 1778 {"user", MPS_USER}, 1779 {"mapping", MPS_MAPPING}, 1780 {"trace", MPS_TRACE} 1781 }; 1782 1783 enum mps_debug_level_combiner { 1784 COMB_NONE, 1785 COMB_ADD, 1786 COMB_SUB 1787 }; 1788 1789 static int 1790 mps_debug_sysctl(SYSCTL_HANDLER_ARGS) 1791 { 1792 struct mps_softc *sc; 1793 struct mps_debug_string *string; 1794 struct sbuf *sbuf; 1795 char *buffer; 1796 size_t sz; 1797 int i, len, debug, error; 1798 1799 sc = (struct mps_softc *)arg1; 1800 1801 error = sysctl_wire_old_buffer(req, 0); 1802 if (error != 0) 1803 return (error); 1804 1805 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 1806 debug = sc->mps_debug; 1807 1808 sbuf_printf(sbuf, "%#x", debug); 1809 1810 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1811 for (i = 0; i < sz; i++) { 1812 string = &mps_debug_strings[i]; 1813 if (debug & string->flag) 1814 sbuf_printf(sbuf, ",%s", string->name); 1815 } 1816 1817 error = sbuf_finish(sbuf); 1818 sbuf_delete(sbuf); 1819 1820 if (error || req->newptr == NULL) 1821 return (error); 1822 1823 len = req->newlen - req->newidx; 1824 if (len == 0) 1825 return (0); 1826 1827 buffer = malloc(len, M_MPT2, M_ZERO|M_WAITOK); 1828 error = SYSCTL_IN(req, buffer, len); 1829 1830 mps_parse_debug(sc, buffer); 1831 1832 free(buffer, M_MPT2); 1833 return (error); 1834 } 1835 1836 static void 1837 mps_parse_debug(struct mps_softc *sc, char *list) 1838 { 1839 struct mps_debug_string *string; 1840 enum mps_debug_level_combiner op; 1841 char *token, *endtoken; 1842 size_t sz; 1843 int flags, i; 1844 1845 if (list == NULL || *list == '\0') 1846 return; 1847 1848 if (*list == '+') { 1849 op = COMB_ADD; 1850 list++; 1851 } else if (*list == '-') { 1852 op = COMB_SUB; 1853 list++; 1854 } else 1855 op = COMB_NONE; 1856 if (*list == '\0') 1857 return; 1858 1859 flags = 0; 1860 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1861 while ((token = strsep(&list, ":,")) != NULL) { 1862 1863 /* Handle integer flags */ 1864 flags |= strtol(token, &endtoken, 0); 1865 if (token != endtoken) 1866 continue; 1867 1868 /* Handle text flags */ 1869 for (i = 0; i < sz; i++) { 1870 string = &mps_debug_strings[i]; 1871 if (strcasecmp(token, string->name) == 0) { 1872 flags |= string->flag; 1873 break; 1874 } 1875 } 1876 } 1877 1878 switch (op) { 1879 case COMB_NONE: 1880 sc->mps_debug = flags; 1881 break; 1882 case COMB_ADD: 1883 sc->mps_debug |= flags; 1884 break; 1885 case COMB_SUB: 1886 sc->mps_debug &= (~flags); 1887 break; 1888 } 1889 1890 return; 1891 } 1892 1893 int 1894 mps_attach(struct mps_softc *sc) 1895 { 1896 int error; 1897 1898 MPS_FUNCTRACE(sc); 1899 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1900 1901 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF); 1902 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0); 1903 callout_init_mtx(&sc->device_check_callout, &sc->mps_mtx, 0); 1904 TAILQ_INIT(&sc->event_list); 1905 timevalclear(&sc->lastfail); 1906 1907 if ((error = mps_transition_ready(sc)) != 0) { 1908 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to transition " 1909 "ready\n"); 1910 return (error); 1911 } 1912 1913 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2, 1914 M_ZERO|M_NOWAIT); 1915 if(!sc->facts) { 1916 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Cannot allocate memory, " 1917 "exit\n"); 1918 return (ENOMEM); 1919 } 1920 1921 /* 1922 * Get IOC Facts and allocate all structures based on this information. 1923 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC 1924 * Facts. If relevant values have changed in IOC Facts, this function 1925 * will free all of the memory based on IOC Facts and reallocate that 1926 * memory. If this fails, any allocated memory should already be freed. 1927 */ 1928 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) { 1929 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC Facts based allocation " 1930 "failed with error %d, exit\n", error); 1931 return (error); 1932 } 1933 1934 /* Start the periodic watchdog check on the IOC Doorbell */ 1935 mps_periodic(sc); 1936 1937 /* 1938 * The portenable will kick off discovery events that will drive the 1939 * rest of the initialization process. The CAM/SAS module will 1940 * hold up the boot sequence until discovery is complete. 1941 */ 1942 sc->mps_ich.ich_func = mps_startup; 1943 sc->mps_ich.ich_arg = sc; 1944 if (config_intrhook_establish(&sc->mps_ich) != 0) { 1945 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1946 "Cannot establish MPS config hook\n"); 1947 error = EINVAL; 1948 } 1949 1950 /* 1951 * Allow IR to shutdown gracefully when shutdown occurs. 1952 */ 1953 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 1954 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 1955 1956 if (sc->shutdown_eh == NULL) 1957 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1958 "shutdown event registration failed\n"); 1959 1960 mps_setup_sysctl(sc); 1961 1962 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE; 1963 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1964 1965 return (error); 1966 } 1967 1968 /* Run through any late-start handlers. */ 1969 static void 1970 mps_startup(void *arg) 1971 { 1972 struct mps_softc *sc; 1973 1974 sc = (struct mps_softc *)arg; 1975 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1976 1977 mps_lock(sc); 1978 mps_unmask_intr(sc); 1979 1980 /* initialize device mapping tables */ 1981 mps_base_static_config_pages(sc); 1982 mps_mapping_initialize(sc); 1983 mpssas_startup(sc); 1984 mps_unlock(sc); 1985 1986 mps_dprint(sc, MPS_INIT, "disestablish config intrhook\n"); 1987 config_intrhook_disestablish(&sc->mps_ich); 1988 sc->mps_ich.ich_arg = NULL; 1989 1990 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1991 } 1992 1993 /* Periodic watchdog. Is called with the driver lock already held. */ 1994 static void 1995 mps_periodic(void *arg) 1996 { 1997 struct mps_softc *sc; 1998 uint32_t db; 1999 2000 sc = (struct mps_softc *)arg; 2001 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN) 2002 return; 2003 2004 db = mps_regread(sc, MPI2_DOORBELL_OFFSET); 2005 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 2006 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 2007 mps_reinit(sc); 2008 } 2009 2010 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc); 2011 } 2012 2013 static void 2014 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data, 2015 MPI2_EVENT_NOTIFICATION_REPLY *event) 2016 { 2017 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 2018 2019 MPS_DPRINT_EVENT(sc, generic, event); 2020 2021 switch (event->Event) { 2022 case MPI2_EVENT_LOG_DATA: 2023 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 2024 if (sc->mps_debug & MPS_EVENT) 2025 hexdump(event->EventData, event->EventDataLength, NULL, 0); 2026 break; 2027 case MPI2_EVENT_LOG_ENTRY_ADDED: 2028 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 2029 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 2030 "0x%x Sequence %d:\n", entry->LogEntryQualifier, 2031 entry->LogSequence); 2032 break; 2033 default: 2034 break; 2035 } 2036 return; 2037 } 2038 2039 static int 2040 mps_attach_log(struct mps_softc *sc) 2041 { 2042 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 2043 2044 bzero(events, 16); 2045 setbit(events, MPI2_EVENT_LOG_DATA); 2046 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 2047 2048 mps_register_events(sc, events, mps_log_evt_handler, NULL, 2049 &sc->mps_log_eh); 2050 2051 return (0); 2052 } 2053 2054 static int 2055 mps_detach_log(struct mps_softc *sc) 2056 { 2057 2058 if (sc->mps_log_eh != NULL) 2059 mps_deregister_events(sc, sc->mps_log_eh); 2060 return (0); 2061 } 2062 2063 /* 2064 * Free all of the driver resources and detach submodules. Should be called 2065 * without the lock held. 2066 */ 2067 int 2068 mps_free(struct mps_softc *sc) 2069 { 2070 int error; 2071 2072 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 2073 /* Turn off the watchdog */ 2074 mps_lock(sc); 2075 sc->mps_flags |= MPS_FLAGS_SHUTDOWN; 2076 mps_unlock(sc); 2077 /* Lock must not be held for this */ 2078 callout_drain(&sc->periodic); 2079 callout_drain(&sc->device_check_callout); 2080 2081 if (((error = mps_detach_log(sc)) != 0) || 2082 ((error = mps_detach_sas(sc)) != 0)) { 2083 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to detach " 2084 "subsystems, exit\n"); 2085 return (error); 2086 } 2087 2088 mps_detach_user(sc); 2089 2090 /* Put the IOC back in the READY state. */ 2091 mps_lock(sc); 2092 if ((error = mps_transition_ready(sc)) != 0) { 2093 mps_unlock(sc); 2094 return (error); 2095 } 2096 mps_unlock(sc); 2097 2098 if (sc->facts != NULL) 2099 free(sc->facts, M_MPT2); 2100 2101 /* 2102 * Free all buffers that are based on IOC Facts. A Diag Reset may need 2103 * to free these buffers too. 2104 */ 2105 mps_iocfacts_free(sc); 2106 2107 if (sc->sysctl_tree != NULL) 2108 sysctl_ctx_free(&sc->sysctl_ctx); 2109 2110 /* Deregister the shutdown function */ 2111 if (sc->shutdown_eh != NULL) 2112 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 2113 2114 mtx_destroy(&sc->mps_mtx); 2115 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 2116 2117 return (0); 2118 } 2119 2120 static __inline void 2121 mps_complete_command(struct mps_softc *sc, struct mps_command *cm) 2122 { 2123 MPS_FUNCTRACE(sc); 2124 2125 if (cm == NULL) { 2126 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n"); 2127 return; 2128 } 2129 2130 if (cm->cm_flags & MPS_CM_FLAGS_POLLED) 2131 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE; 2132 2133 if (cm->cm_complete != NULL) { 2134 mps_dprint(sc, MPS_TRACE, 2135 "%s cm %p calling cm_complete %p data %p reply %p\n", 2136 __func__, cm, cm->cm_complete, cm->cm_complete_data, 2137 cm->cm_reply); 2138 cm->cm_complete(sc, cm); 2139 } 2140 2141 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) { 2142 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm); 2143 wakeup(cm); 2144 } 2145 2146 if (cm->cm_sc->io_cmds_active != 0) { 2147 cm->cm_sc->io_cmds_active--; 2148 } else { 2149 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is " 2150 "out of sync - resynching to 0\n"); 2151 } 2152 } 2153 2154 2155 static void 2156 mps_sas_log_info(struct mps_softc *sc , u32 log_info) 2157 { 2158 union loginfo_type { 2159 u32 loginfo; 2160 struct { 2161 u32 subcode:16; 2162 u32 code:8; 2163 u32 originator:4; 2164 u32 bus_type:4; 2165 } dw; 2166 }; 2167 union loginfo_type sas_loginfo; 2168 char *originator_str = NULL; 2169 2170 sas_loginfo.loginfo = log_info; 2171 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 2172 return; 2173 2174 /* each nexus loss loginfo */ 2175 if (log_info == 0x31170000) 2176 return; 2177 2178 /* eat the loginfos associated with task aborts */ 2179 if ((log_info == 30050000 || log_info == 2180 0x31140000 || log_info == 0x31130000)) 2181 return; 2182 2183 switch (sas_loginfo.dw.originator) { 2184 case 0: 2185 originator_str = "IOP"; 2186 break; 2187 case 1: 2188 originator_str = "PL"; 2189 break; 2190 case 2: 2191 originator_str = "IR"; 2192 break; 2193 } 2194 2195 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), " 2196 "code(0x%02x), sub_code(0x%04x)\n", log_info, 2197 originator_str, sas_loginfo.dw.code, 2198 sas_loginfo.dw.subcode); 2199 } 2200 2201 static void 2202 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply) 2203 { 2204 MPI2DefaultReply_t *mpi_reply; 2205 u16 sc_status; 2206 2207 mpi_reply = (MPI2DefaultReply_t*)reply; 2208 sc_status = le16toh(mpi_reply->IOCStatus); 2209 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 2210 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 2211 } 2212 void 2213 mps_intr(void *data) 2214 { 2215 struct mps_softc *sc; 2216 uint32_t status; 2217 2218 sc = (struct mps_softc *)data; 2219 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2220 2221 /* 2222 * Check interrupt status register to flush the bus. This is 2223 * needed for both INTx interrupts and driver-driven polling 2224 */ 2225 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 2226 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 2227 return; 2228 2229 mps_lock(sc); 2230 mps_intr_locked(data); 2231 mps_unlock(sc); 2232 return; 2233 } 2234 2235 /* 2236 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 2237 * chip. Hopefully this theory is correct. 2238 */ 2239 void 2240 mps_intr_msi(void *data) 2241 { 2242 struct mps_softc *sc; 2243 2244 sc = (struct mps_softc *)data; 2245 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2246 mps_lock(sc); 2247 mps_intr_locked(data); 2248 mps_unlock(sc); 2249 return; 2250 } 2251 2252 /* 2253 * The locking is overly broad and simplistic, but easy to deal with for now. 2254 */ 2255 void 2256 mps_intr_locked(void *data) 2257 { 2258 MPI2_REPLY_DESCRIPTORS_UNION *desc; 2259 struct mps_softc *sc; 2260 struct mps_command *cm = NULL; 2261 uint8_t flags; 2262 u_int pq; 2263 MPI2_DIAG_RELEASE_REPLY *rel_rep; 2264 mps_fw_diagnostic_buffer_t *pBuffer; 2265 2266 sc = (struct mps_softc *)data; 2267 2268 pq = sc->replypostindex; 2269 mps_dprint(sc, MPS_TRACE, 2270 "%s sc %p starting with replypostindex %u\n", 2271 __func__, sc, sc->replypostindex); 2272 2273 for ( ;; ) { 2274 cm = NULL; 2275 desc = &sc->post_queue[sc->replypostindex]; 2276 flags = desc->Default.ReplyFlags & 2277 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 2278 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 2279 || (le32toh(desc->Words.High) == 0xffffffff)) 2280 break; 2281 2282 /* increment the replypostindex now, so that event handlers 2283 * and cm completion handlers which decide to do a diag 2284 * reset can zero it without it getting incremented again 2285 * afterwards, and we break out of this loop on the next 2286 * iteration since the reply post queue has been cleared to 2287 * 0xFF and all descriptors look unused (which they are). 2288 */ 2289 if (++sc->replypostindex >= sc->pqdepth) 2290 sc->replypostindex = 0; 2291 2292 switch (flags) { 2293 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 2294 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 2295 cm->cm_reply = NULL; 2296 break; 2297 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 2298 { 2299 uint32_t baddr; 2300 uint8_t *reply; 2301 2302 /* 2303 * Re-compose the reply address from the address 2304 * sent back from the chip. The ReplyFrameAddress 2305 * is the lower 32 bits of the physical address of 2306 * particular reply frame. Convert that address to 2307 * host format, and then use that to provide the 2308 * offset against the virtual address base 2309 * (sc->reply_frames). 2310 */ 2311 baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 2312 reply = sc->reply_frames + 2313 (baddr - ((uint32_t)sc->reply_busaddr)); 2314 /* 2315 * Make sure the reply we got back is in a valid 2316 * range. If not, go ahead and panic here, since 2317 * we'll probably panic as soon as we deference the 2318 * reply pointer anyway. 2319 */ 2320 if ((reply < sc->reply_frames) 2321 || (reply > (sc->reply_frames + 2322 (sc->fqdepth * sc->replyframesz)))) { 2323 printf("%s: WARNING: reply %p out of range!\n", 2324 __func__, reply); 2325 printf("%s: reply_frames %p, fqdepth %d, " 2326 "frame size %d\n", __func__, 2327 sc->reply_frames, sc->fqdepth, 2328 sc->replyframesz); 2329 printf("%s: baddr %#x,\n", __func__, baddr); 2330 /* LSI-TODO. See Linux Code. Need Graceful exit*/ 2331 panic("Reply address out of range"); 2332 } 2333 if (le16toh(desc->AddressReply.SMID) == 0) { 2334 if (((MPI2_DEFAULT_REPLY *)reply)->Function == 2335 MPI2_FUNCTION_DIAG_BUFFER_POST) { 2336 /* 2337 * If SMID is 0 for Diag Buffer Post, 2338 * this implies that the reply is due to 2339 * a release function with a status that 2340 * the buffer has been released. Set 2341 * the buffer flags accordingly. 2342 */ 2343 rel_rep = 2344 (MPI2_DIAG_RELEASE_REPLY *)reply; 2345 if ((le16toh(rel_rep->IOCStatus) & 2346 MPI2_IOCSTATUS_MASK) == 2347 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 2348 { 2349 pBuffer = 2350 &sc->fw_diag_buffer_list[ 2351 rel_rep->BufferType]; 2352 pBuffer->valid_data = TRUE; 2353 pBuffer->owned_by_firmware = 2354 FALSE; 2355 pBuffer->immediate = FALSE; 2356 } 2357 } else 2358 mps_dispatch_event(sc, baddr, 2359 (MPI2_EVENT_NOTIFICATION_REPLY *) 2360 reply); 2361 } else { 2362 cm = &sc->commands[le16toh(desc->AddressReply.SMID)]; 2363 cm->cm_reply = reply; 2364 cm->cm_reply_data = 2365 le32toh(desc->AddressReply.ReplyFrameAddress); 2366 } 2367 break; 2368 } 2369 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 2370 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 2371 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 2372 default: 2373 /* Unhandled */ 2374 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n", 2375 desc->Default.ReplyFlags); 2376 cm = NULL; 2377 break; 2378 } 2379 2380 2381 if (cm != NULL) { 2382 // Print Error reply frame 2383 if (cm->cm_reply) 2384 mps_display_reply_info(sc,cm->cm_reply); 2385 mps_complete_command(sc, cm); 2386 } 2387 2388 desc->Words.Low = 0xffffffff; 2389 desc->Words.High = 0xffffffff; 2390 } 2391 2392 if (pq != sc->replypostindex) { 2393 mps_dprint(sc, MPS_TRACE, 2394 "%s sc %p writing postindex %d\n", 2395 __func__, sc, sc->replypostindex); 2396 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex); 2397 } 2398 2399 return; 2400 } 2401 2402 static void 2403 mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 2404 MPI2_EVENT_NOTIFICATION_REPLY *reply) 2405 { 2406 struct mps_event_handle *eh; 2407 int event, handled = 0; 2408 2409 event = le16toh(reply->Event); 2410 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2411 if (isset(eh->mask, event)) { 2412 eh->callback(sc, data, reply); 2413 handled++; 2414 } 2415 } 2416 2417 if (handled == 0) 2418 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event)); 2419 2420 /* 2421 * This is the only place that the event/reply should be freed. 2422 * Anything wanting to hold onto the event data should have 2423 * already copied it into their own storage. 2424 */ 2425 mps_free_reply(sc, data); 2426 } 2427 2428 static void 2429 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm) 2430 { 2431 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2432 2433 if (cm->cm_reply) 2434 MPS_DPRINT_EVENT(sc, generic, 2435 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2436 2437 mps_free_command(sc, cm); 2438 2439 /* next, send a port enable */ 2440 mpssas_startup(sc); 2441 } 2442 2443 /* 2444 * For both register_events and update_events, the caller supplies a bitmap 2445 * of events that it _wants_. These functions then turn that into a bitmask 2446 * suitable for the controller. 2447 */ 2448 int 2449 mps_register_events(struct mps_softc *sc, u32 *mask, 2450 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle) 2451 { 2452 struct mps_event_handle *eh; 2453 int error = 0; 2454 2455 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO); 2456 if(!eh) { 2457 mps_dprint(sc, MPS_ERROR, "Cannot allocate event memory\n"); 2458 return (ENOMEM); 2459 } 2460 eh->callback = cb; 2461 eh->data = data; 2462 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2463 if (mask != NULL) 2464 error = mps_update_events(sc, eh, mask); 2465 *handle = eh; 2466 2467 return (error); 2468 } 2469 2470 int 2471 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle, 2472 u32 *mask) 2473 { 2474 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2475 MPI2_EVENT_NOTIFICATION_REPLY *reply = NULL; 2476 struct mps_command *cm; 2477 int error, i; 2478 2479 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2480 2481 if ((mask != NULL) && (handle != NULL)) 2482 bcopy(mask, &handle->mask[0], sizeof(u32) * 2483 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2484 2485 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2486 sc->event_mask[i] = -1; 2487 2488 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2489 sc->event_mask[i] &= ~handle->mask[i]; 2490 2491 2492 if ((cm = mps_alloc_command(sc)) == NULL) 2493 return (EBUSY); 2494 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2495 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2496 evtreq->MsgFlags = 0; 2497 evtreq->SASBroadcastPrimitiveMasks = 0; 2498 #ifdef MPS_DEBUG_ALL_EVENTS 2499 { 2500 u_char fullmask[16]; 2501 memset(fullmask, 0x00, 16); 2502 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2503 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2504 } 2505 #else 2506 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2507 evtreq->EventMasks[i] = 2508 htole32(sc->event_mask[i]); 2509 #endif 2510 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2511 cm->cm_data = NULL; 2512 2513 error = mps_wait_command(sc, &cm, 60, 0); 2514 if (cm != NULL) 2515 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2516 if ((reply == NULL) || 2517 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2518 error = ENXIO; 2519 2520 if (reply) 2521 MPS_DPRINT_EVENT(sc, generic, reply); 2522 2523 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error); 2524 2525 if (cm != NULL) 2526 mps_free_command(sc, cm); 2527 return (error); 2528 } 2529 2530 static int 2531 mps_reregister_events(struct mps_softc *sc) 2532 { 2533 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2534 struct mps_command *cm; 2535 struct mps_event_handle *eh; 2536 int error, i; 2537 2538 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2539 2540 /* first, reregister events */ 2541 2542 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2543 sc->event_mask[i] = -1; 2544 2545 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2546 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2547 sc->event_mask[i] &= ~eh->mask[i]; 2548 } 2549 2550 if ((cm = mps_alloc_command(sc)) == NULL) 2551 return (EBUSY); 2552 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2553 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2554 evtreq->MsgFlags = 0; 2555 evtreq->SASBroadcastPrimitiveMasks = 0; 2556 #ifdef MPS_DEBUG_ALL_EVENTS 2557 { 2558 u_char fullmask[16]; 2559 memset(fullmask, 0x00, 16); 2560 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2561 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2562 } 2563 #else 2564 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2565 evtreq->EventMasks[i] = 2566 htole32(sc->event_mask[i]); 2567 #endif 2568 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2569 cm->cm_data = NULL; 2570 cm->cm_complete = mps_reregister_events_complete; 2571 2572 error = mps_map_command(sc, cm); 2573 2574 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__, 2575 error); 2576 return (error); 2577 } 2578 2579 void 2580 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle) 2581 { 2582 2583 TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2584 free(handle, M_MPT2); 2585 } 2586 2587 /* 2588 * Add a chain element as the next SGE for the specified command. 2589 * Reset cm_sge and cm_sgesize to indicate all the available space. 2590 */ 2591 static int 2592 mps_add_chain(struct mps_command *cm) 2593 { 2594 MPI2_SGE_CHAIN32 *sgc; 2595 struct mps_chain *chain; 2596 u_int space; 2597 2598 if (cm->cm_sglsize < MPS_SGC_SIZE) 2599 panic("MPS: Need SGE Error Code\n"); 2600 2601 chain = mps_alloc_chain(cm->cm_sc); 2602 if (chain == NULL) 2603 return (ENOBUFS); 2604 2605 space = cm->cm_sc->reqframesz; 2606 2607 /* 2608 * Note: a double-linked list is used to make it easier to 2609 * walk for debugging. 2610 */ 2611 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2612 2613 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; 2614 sgc->Length = htole16(space); 2615 sgc->NextChainOffset = 0; 2616 /* TODO Looks like bug in Setting sgc->Flags. 2617 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 2618 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT 2619 * This is fine.. because we are not using simple element. In case of 2620 * MPI2_SGE_CHAIN32, we have separate Length and Flags feild. 2621 */ 2622 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; 2623 sgc->Address = htole32(chain->chain_busaddr); 2624 2625 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; 2626 cm->cm_sglsize = space; 2627 return (0); 2628 } 2629 2630 /* 2631 * Add one scatter-gather element (chain, simple, transaction context) 2632 * to the scatter-gather list for a command. Maintain cm_sglsize and 2633 * cm_sge as the remaining size and pointer to the next SGE to fill 2634 * in, respectively. 2635 */ 2636 int 2637 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) 2638 { 2639 MPI2_SGE_TRANSACTION_UNION *tc = sgep; 2640 MPI2_SGE_SIMPLE64 *sge = sgep; 2641 int error, type; 2642 uint32_t saved_buf_len, saved_address_low, saved_address_high; 2643 2644 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); 2645 2646 #ifdef INVARIANTS 2647 switch (type) { 2648 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { 2649 if (len != tc->DetailsLength + 4) 2650 panic("TC %p length %u or %zu?", tc, 2651 tc->DetailsLength + 4, len); 2652 } 2653 break; 2654 case MPI2_SGE_FLAGS_CHAIN_ELEMENT: 2655 /* Driver only uses 32-bit chain elements */ 2656 if (len != MPS_SGC_SIZE) 2657 panic("CHAIN %p length %u or %zu?", sgep, 2658 MPS_SGC_SIZE, len); 2659 break; 2660 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: 2661 /* Driver only uses 64-bit SGE simple elements */ 2662 if (len != MPS_SGE64_SIZE) 2663 panic("SGE simple %p length %u or %zu?", sge, 2664 MPS_SGE64_SIZE, len); 2665 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) & 2666 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) 2667 panic("SGE simple %p not marked 64-bit?", sge); 2668 2669 break; 2670 default: 2671 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); 2672 } 2673 #endif 2674 2675 /* 2676 * case 1: 1 more segment, enough room for it 2677 * case 2: 2 more segments, enough room for both 2678 * case 3: >=2 more segments, only enough room for 1 and a chain 2679 * case 4: >=1 more segment, enough room for only a chain 2680 * case 5: >=1 more segment, no room for anything (error) 2681 */ 2682 2683 /* 2684 * There should be room for at least a chain element, or this 2685 * code is buggy. Case (5). 2686 */ 2687 if (cm->cm_sglsize < MPS_SGC_SIZE) 2688 panic("MPS: Need SGE Error Code\n"); 2689 2690 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { 2691 /* 2692 * 1 or more segment, enough room for only a chain. 2693 * Hope the previous element wasn't a Simple entry 2694 * that needed to be marked with 2695 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). 2696 */ 2697 if ((error = mps_add_chain(cm)) != 0) 2698 return (error); 2699 } 2700 2701 if (segsleft >= 2 && 2702 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { 2703 /* 2704 * There are 2 or more segments left to add, and only 2705 * enough room for 1 and a chain. Case (3). 2706 * 2707 * Mark as last element in this chain if necessary. 2708 */ 2709 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2710 sge->FlagsLength |= htole32( 2711 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); 2712 } 2713 2714 /* 2715 * Add the item then a chain. Do the chain now, 2716 * rather than on the next iteration, to simplify 2717 * understanding the code. 2718 */ 2719 cm->cm_sglsize -= len; 2720 bcopy(sgep, cm->cm_sge, len); 2721 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2722 return (mps_add_chain(cm)); 2723 } 2724 2725 #ifdef INVARIANTS 2726 /* Case 1: 1 more segment, enough room for it. */ 2727 if (segsleft == 1 && cm->cm_sglsize < len) 2728 panic("1 seg left and no room? %u versus %zu", 2729 cm->cm_sglsize, len); 2730 2731 /* Case 2: 2 more segments, enough room for both */ 2732 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) 2733 panic("2 segs left and no room? %u versus %zu", 2734 cm->cm_sglsize, len); 2735 #endif 2736 2737 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2738 /* 2739 * If this is a bi-directional request, need to account for that 2740 * here. Save the pre-filled sge values. These will be used 2741 * either for the 2nd SGL or for a single direction SGL. If 2742 * cm_out_len is non-zero, this is a bi-directional request, so 2743 * fill in the OUT SGL first, then the IN SGL, otherwise just 2744 * fill in the IN SGL. Note that at this time, when filling in 2745 * 2 SGL's for a bi-directional request, they both use the same 2746 * DMA buffer (same cm command). 2747 */ 2748 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF; 2749 saved_address_low = sge->Address.Low; 2750 saved_address_high = sge->Address.High; 2751 if (cm->cm_out_len) { 2752 sge->FlagsLength = htole32(cm->cm_out_len | 2753 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2754 MPI2_SGE_FLAGS_END_OF_BUFFER | 2755 MPI2_SGE_FLAGS_HOST_TO_IOC | 2756 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2757 MPI2_SGE_FLAGS_SHIFT)); 2758 cm->cm_sglsize -= len; 2759 bcopy(sgep, cm->cm_sge, len); 2760 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge 2761 + len); 2762 } 2763 saved_buf_len |= 2764 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2765 MPI2_SGE_FLAGS_END_OF_BUFFER | 2766 MPI2_SGE_FLAGS_LAST_ELEMENT | 2767 MPI2_SGE_FLAGS_END_OF_LIST | 2768 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2769 MPI2_SGE_FLAGS_SHIFT); 2770 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) { 2771 saved_buf_len |= 2772 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 2773 MPI2_SGE_FLAGS_SHIFT); 2774 } else { 2775 saved_buf_len |= 2776 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 2777 MPI2_SGE_FLAGS_SHIFT); 2778 } 2779 sge->FlagsLength = htole32(saved_buf_len); 2780 sge->Address.Low = saved_address_low; 2781 sge->Address.High = saved_address_high; 2782 } 2783 2784 cm->cm_sglsize -= len; 2785 bcopy(sgep, cm->cm_sge, len); 2786 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2787 return (0); 2788 } 2789 2790 /* 2791 * Add one dma segment to the scatter-gather list for a command. 2792 */ 2793 int 2794 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, 2795 int segsleft) 2796 { 2797 MPI2_SGE_SIMPLE64 sge; 2798 2799 /* 2800 * This driver always uses 64-bit address elements for simplicity. 2801 */ 2802 bzero(&sge, sizeof(sge)); 2803 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2804 MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 2805 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT)); 2806 mps_from_u64(pa, &sge.Address); 2807 2808 return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); 2809 } 2810 2811 static void 2812 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2813 { 2814 struct mps_softc *sc; 2815 struct mps_command *cm; 2816 u_int i, dir, sflags; 2817 2818 cm = (struct mps_command *)arg; 2819 sc = cm->cm_sc; 2820 2821 /* 2822 * In this case, just print out a warning and let the chip tell the 2823 * user they did the wrong thing. 2824 */ 2825 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 2826 mps_dprint(sc, MPS_ERROR, 2827 "%s: warning: busdma returned %d segments, " 2828 "more than the %d allowed\n", __func__, nsegs, 2829 cm->cm_max_segs); 2830 } 2831 2832 /* 2833 * Set up DMA direction flags. Bi-directional requests are also handled 2834 * here. In that case, both direction flags will be set. 2835 */ 2836 sflags = 0; 2837 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { 2838 /* 2839 * We have to add a special case for SMP passthrough, there 2840 * is no easy way to generically handle it. The first 2841 * S/G element is used for the command (therefore the 2842 * direction bit needs to be set). The second one is used 2843 * for the reply. We'll leave it to the caller to make 2844 * sure we only have two buffers. 2845 */ 2846 /* 2847 * Even though the busdma man page says it doesn't make 2848 * sense to have both direction flags, it does in this case. 2849 * We have one s/g element being accessed in each direction. 2850 */ 2851 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 2852 2853 /* 2854 * Set the direction flag on the first buffer in the SMP 2855 * passthrough request. We'll clear it for the second one. 2856 */ 2857 sflags |= MPI2_SGE_FLAGS_DIRECTION | 2858 MPI2_SGE_FLAGS_END_OF_BUFFER; 2859 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { 2860 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 2861 dir = BUS_DMASYNC_PREWRITE; 2862 } else 2863 dir = BUS_DMASYNC_PREREAD; 2864 2865 for (i = 0; i < nsegs; i++) { 2866 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) { 2867 sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 2868 } 2869 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 2870 sflags, nsegs - i); 2871 if (error != 0) { 2872 /* Resource shortage, roll back! */ 2873 if (ratecheck(&sc->lastfail, &mps_chainfail_interval)) 2874 mps_dprint(sc, MPS_INFO, "Out of chain frames, " 2875 "consider increasing hw.mps.max_chains.\n"); 2876 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED; 2877 mps_complete_command(sc, cm); 2878 return; 2879 } 2880 } 2881 2882 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 2883 mps_enqueue_request(sc, cm); 2884 2885 return; 2886 } 2887 2888 static void 2889 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 2890 int error) 2891 { 2892 mps_data_cb(arg, segs, nsegs, error); 2893 } 2894 2895 /* 2896 * This is the routine to enqueue commands ansynchronously. 2897 * Note that the only error path here is from bus_dmamap_load(), which can 2898 * return EINPROGRESS if it is waiting for resources. Other than this, it's 2899 * assumed that if you have a command in-hand, then you have enough credits 2900 * to use it. 2901 */ 2902 int 2903 mps_map_command(struct mps_softc *sc, struct mps_command *cm) 2904 { 2905 int error = 0; 2906 2907 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { 2908 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 2909 &cm->cm_uio, mps_data_cb2, cm, 0); 2910 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) { 2911 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 2912 cm->cm_data, mps_data_cb, cm, 0); 2913 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 2914 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 2915 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); 2916 } else { 2917 /* Add a zero-length element as needed */ 2918 if (cm->cm_sge != NULL) 2919 mps_add_dmaseg(cm, 0, 0, 0, 1); 2920 mps_enqueue_request(sc, cm); 2921 } 2922 2923 return (error); 2924 } 2925 2926 /* 2927 * This is the routine to enqueue commands synchronously. An error of 2928 * EINPROGRESS from mps_map_command() is ignored since the command will 2929 * be executed and enqueued automatically. Other errors come from msleep(). 2930 */ 2931 int 2932 mps_wait_command(struct mps_softc *sc, struct mps_command **cmp, int timeout, 2933 int sleep_flag) 2934 { 2935 int error, rc; 2936 struct timeval cur_time, start_time; 2937 struct mps_command *cm = *cmp; 2938 2939 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) 2940 return EBUSY; 2941 2942 cm->cm_complete = NULL; 2943 cm->cm_flags |= MPS_CM_FLAGS_POLLED; 2944 error = mps_map_command(sc, cm); 2945 if ((error != 0) && (error != EINPROGRESS)) 2946 return (error); 2947 2948 /* 2949 * Check for context and wait for 50 mSec at a time until time has 2950 * expired or the command has finished. If msleep can't be used, need 2951 * to poll. 2952 */ 2953 if (curthread->td_no_sleeping != 0) 2954 sleep_flag = NO_SLEEP; 2955 getmicrouptime(&start_time); 2956 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) { 2957 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP; 2958 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz); 2959 if (error == EWOULDBLOCK) { 2960 /* 2961 * Record the actual elapsed time in the case of a 2962 * timeout for the message below. 2963 */ 2964 getmicrouptime(&cur_time); 2965 timevalsub(&cur_time, &start_time); 2966 } 2967 } else { 2968 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) { 2969 mps_intr_locked(sc); 2970 if (sleep_flag == CAN_SLEEP) 2971 pause("mpswait", hz/20); 2972 else 2973 DELAY(50000); 2974 2975 getmicrouptime(&cur_time); 2976 timevalsub(&cur_time, &start_time); 2977 if (cur_time.tv_sec > timeout) { 2978 error = EWOULDBLOCK; 2979 break; 2980 } 2981 } 2982 } 2983 2984 if (error == EWOULDBLOCK) { 2985 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s, timeout=%d," 2986 " elapsed=%jd\n", __func__, timeout, 2987 (intmax_t)cur_time.tv_sec); 2988 rc = mps_reinit(sc); 2989 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 2990 "failed"); 2991 if (sc->mps_flags & MPS_FLAGS_REALLOCATED) { 2992 /* 2993 * Tell the caller that we freed the command in a 2994 * reinit. 2995 */ 2996 *cmp = NULL; 2997 } 2998 error = ETIMEDOUT; 2999 } 3000 return (error); 3001 } 3002 3003 /* 3004 * The MPT driver had a verbose interface for config pages. In this driver, 3005 * reduce it to much simpler terms, similar to the Linux driver. 3006 */ 3007 int 3008 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params) 3009 { 3010 MPI2_CONFIG_REQUEST *req; 3011 struct mps_command *cm; 3012 int error; 3013 3014 if (sc->mps_flags & MPS_FLAGS_BUSY) { 3015 return (EBUSY); 3016 } 3017 3018 cm = mps_alloc_command(sc); 3019 if (cm == NULL) { 3020 return (EBUSY); 3021 } 3022 3023 req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 3024 req->Function = MPI2_FUNCTION_CONFIG; 3025 req->Action = params->action; 3026 req->SGLFlags = 0; 3027 req->ChainOffset = 0; 3028 req->PageAddress = params->page_address; 3029 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3030 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 3031 3032 hdr = ¶ms->hdr.Ext; 3033 req->ExtPageType = hdr->ExtPageType; 3034 req->ExtPageLength = hdr->ExtPageLength; 3035 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 3036 req->Header.PageLength = 0; /* Must be set to zero */ 3037 req->Header.PageNumber = hdr->PageNumber; 3038 req->Header.PageVersion = hdr->PageVersion; 3039 } else { 3040 MPI2_CONFIG_PAGE_HEADER *hdr; 3041 3042 hdr = ¶ms->hdr.Struct; 3043 req->Header.PageType = hdr->PageType; 3044 req->Header.PageNumber = hdr->PageNumber; 3045 req->Header.PageLength = hdr->PageLength; 3046 req->Header.PageVersion = hdr->PageVersion; 3047 } 3048 3049 cm->cm_data = params->buffer; 3050 cm->cm_length = params->length; 3051 if (cm->cm_data != NULL) { 3052 cm->cm_sge = &req->PageBufferSGE; 3053 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 3054 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; 3055 } else 3056 cm->cm_sge = NULL; 3057 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 3058 3059 cm->cm_complete_data = params; 3060 if (params->callback != NULL) { 3061 cm->cm_complete = mps_config_complete; 3062 return (mps_map_command(sc, cm)); 3063 } else { 3064 error = mps_wait_command(sc, &cm, 0, CAN_SLEEP); 3065 if (error) { 3066 mps_dprint(sc, MPS_FAULT, 3067 "Error %d reading config page\n", error); 3068 if (cm != NULL) 3069 mps_free_command(sc, cm); 3070 return (error); 3071 } 3072 mps_config_complete(sc, cm); 3073 } 3074 3075 return (0); 3076 } 3077 3078 int 3079 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params) 3080 { 3081 return (EINVAL); 3082 } 3083 3084 static void 3085 mps_config_complete(struct mps_softc *sc, struct mps_command *cm) 3086 { 3087 MPI2_CONFIG_REPLY *reply; 3088 struct mps_config_params *params; 3089 3090 MPS_FUNCTRACE(sc); 3091 params = cm->cm_complete_data; 3092 3093 if (cm->cm_data != NULL) { 3094 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 3095 BUS_DMASYNC_POSTREAD); 3096 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 3097 } 3098 3099 /* 3100 * XXX KDM need to do more error recovery? This results in the 3101 * device in question not getting probed. 3102 */ 3103 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) { 3104 params->status = MPI2_IOCSTATUS_BUSY; 3105 goto done; 3106 } 3107 3108 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 3109 if (reply == NULL) { 3110 params->status = MPI2_IOCSTATUS_BUSY; 3111 goto done; 3112 } 3113 params->status = reply->IOCStatus; 3114 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3115 params->hdr.Ext.ExtPageType = reply->ExtPageType; 3116 params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 3117 params->hdr.Ext.PageType = reply->Header.PageType; 3118 params->hdr.Ext.PageNumber = reply->Header.PageNumber; 3119 params->hdr.Ext.PageVersion = reply->Header.PageVersion; 3120 } else { 3121 params->hdr.Struct.PageType = reply->Header.PageType; 3122 params->hdr.Struct.PageNumber = reply->Header.PageNumber; 3123 params->hdr.Struct.PageLength = reply->Header.PageLength; 3124 params->hdr.Struct.PageVersion = reply->Header.PageVersion; 3125 } 3126 3127 done: 3128 mps_free_command(sc, cm); 3129 if (params->callback != NULL) 3130 params->callback(sc, params); 3131 3132 return; 3133 } 3134