1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * Copyright (c) 2011-2015 LSI Corp. 4 * Copyright (c) 2013-2016 Avago Technologies 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef _MPRVAR_H 34 #define _MPRVAR_H 35 36 #define MPR_DRIVER_VERSION "15.03.00.00-fbsd" 37 38 #define MPR_DB_MAX_WAIT 2500 39 40 #define MPR_REQ_FRAMES 2048 41 #define MPR_PRI_REQ_FRAMES 128 42 #define MPR_EVT_REPLY_FRAMES 32 43 #define MPR_REPLY_FRAMES MPR_REQ_FRAMES 44 #define MPR_CHAIN_FRAMES 2048 45 #define MPR_MAXIO_PAGES (-1) 46 #define MPR_SENSE_LEN SSD_FULL_SIZE 47 #define MPR_MSI_MAX 1 48 #define MPR_MSIX_MAX 96 49 #define MPR_SGE64_SIZE 12 50 #define MPR_SGE32_SIZE 8 51 #define MPR_SGC_SIZE 8 52 #define MPR_DEFAULT_CHAIN_SEG_SIZE 8 53 #define MPR_MAX_CHAIN_ELEMENT_SIZE 16 54 55 /* 56 * PCIe NVMe Specific defines 57 */ 58 //SLM-for now just use the same value as a SAS disk 59 #define NVME_QDEPTH MPR_REQ_FRAMES 60 #define PRP_ENTRY_SIZE 8 61 #define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */ 62 #define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */ 63 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */ 64 #define HOST_PAGE_SIZE_4K 12 65 66 #define MPR_FUNCTRACE(sc) \ 67 mpr_dprint((sc), MPR_TRACE, "%s\n", __func__) 68 69 #define CAN_SLEEP 1 70 #define NO_SLEEP 0 71 72 #define MPR_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */ 73 #define MPR_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */ 74 #define MPR_MISSING_CHECK_DELAY 10 /* 10 seconds between missing check */ 75 76 #define IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED 0x2810 77 78 #define MPR_SCSI_RI_INVALID_FRAME (0x00000002) 79 80 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */ 81 82 #include <sys/endian.h> 83 84 /* 85 * host mapping related macro definitions 86 */ 87 #define MPR_MAPTABLE_BAD_IDX 0xFFFFFFFF 88 #define MPR_DPM_BAD_IDX 0xFFFF 89 #define MPR_ENCTABLE_BAD_IDX 0xFF 90 #define MPR_MAX_MISSING_COUNT 0x0F 91 #define MPR_DEV_RESERVED 0x20000000 92 #define MPR_MAP_IN_USE 0x10000000 93 #define MPR_MAP_BAD_ID 0xFFFFFFFF 94 95 typedef uint8_t u8; 96 typedef uint16_t u16; 97 typedef uint32_t u32; 98 typedef uint64_t u64; 99 100 /** 101 * struct dev_mapping_table - device mapping information 102 * @physical_id: SAS address for drives or WWID for RAID volumes 103 * @device_info: bitfield provides detailed info about the device 104 * @phy_bits: bitfields indicating controller phys 105 * @dpm_entry_num: index of this device in device persistent map table 106 * @dev_handle: device handle for the device pointed by this entry 107 * @id: target id 108 * @missing_count: number of times the device not detected by driver 109 * @hide_flag: Hide this physical disk/not (foreign configuration) 110 * @init_complete: Whether the start of the day checks completed or not 111 * @TLR_bits: Turn TLR support on or off 112 */ 113 struct dev_mapping_table { 114 u64 physical_id; 115 u32 device_info; 116 u32 phy_bits; 117 u16 dpm_entry_num; 118 u16 dev_handle; 119 u16 reserved1; 120 u16 id; 121 u8 missing_count; 122 u8 init_complete; 123 u8 TLR_bits; 124 u8 reserved2; 125 }; 126 127 /** 128 * struct enc_mapping_table - mapping information about an enclosure 129 * @enclosure_id: Logical ID of this enclosure 130 * @start_index: index to the entry in dev_mapping_table 131 * @phy_bits: bitfields indicating controller phys 132 * @dpm_entry_num: index of this enclosure in device persistent map table 133 * @enc_handle: device handle for the enclosure pointed by this entry 134 * @num_slots: number of slots in the enclosure 135 * @start_slot: Starting slot id 136 * @missing_count: number of times the device not detected by driver 137 * @removal_flag: used to mark the device for removal 138 * @skip_search: used as a flag to include/exclude enclosure for search 139 * @init_complete: Whether the start of the day checks completed or not 140 */ 141 struct enc_mapping_table { 142 u64 enclosure_id; 143 u32 start_index; 144 u32 phy_bits; 145 u16 dpm_entry_num; 146 u16 enc_handle; 147 u16 num_slots; 148 u16 start_slot; 149 u8 missing_count; 150 u8 removal_flag; 151 u8 skip_search; 152 u8 init_complete; 153 }; 154 155 /** 156 * struct map_removal_table - entries to be removed from mapping table 157 * @dpm_entry_num: index of this device in device persistent map table 158 * @dev_handle: device handle for the device pointed by this entry 159 */ 160 struct map_removal_table{ 161 u16 dpm_entry_num; 162 u16 dev_handle; 163 }; 164 165 typedef struct mpr_fw_diagnostic_buffer { 166 size_t size; 167 uint8_t extended_type; 168 uint8_t buffer_type; 169 uint8_t force_release; 170 uint32_t product_specific[23]; 171 uint8_t immediate; 172 uint8_t enabled; 173 uint8_t valid_data; 174 uint8_t owned_by_firmware; 175 uint32_t unique_id; 176 } mpr_fw_diagnostic_buffer_t; 177 178 struct mpr_softc; 179 struct mpr_command; 180 struct mprsas_softc; 181 union ccb; 182 struct mprsas_target; 183 struct mpr_column_map; 184 185 MALLOC_DECLARE(M_MPR); 186 187 typedef void mpr_evt_callback_t(struct mpr_softc *, uintptr_t, 188 MPI2_EVENT_NOTIFICATION_REPLY *reply); 189 typedef void mpr_command_callback_t(struct mpr_softc *, struct mpr_command *cm); 190 191 struct mpr_chain { 192 TAILQ_ENTRY(mpr_chain) chain_link; 193 void *chain; 194 uint64_t chain_busaddr; 195 }; 196 197 struct mpr_prp_page { 198 TAILQ_ENTRY(mpr_prp_page) prp_page_link; 199 uint64_t *prp_page; 200 uint64_t prp_page_busaddr; 201 }; 202 203 /* 204 * This needs to be at least 2 to support SMP passthrough. 205 */ 206 #define MPR_IOVEC_COUNT 2 207 208 struct mpr_command { 209 TAILQ_ENTRY(mpr_command) cm_link; 210 TAILQ_ENTRY(mpr_command) cm_recovery; 211 struct mpr_softc *cm_sc; 212 union ccb *cm_ccb; 213 void *cm_data; 214 u_int cm_length; 215 u_int cm_out_len; 216 struct uio cm_uio; 217 struct iovec cm_iovec[MPR_IOVEC_COUNT]; 218 u_int cm_max_segs; 219 u_int cm_sglsize; 220 void *cm_sge; 221 uint8_t *cm_req; 222 uint8_t *cm_reply; 223 uint32_t cm_reply_data; 224 mpr_command_callback_t *cm_complete; 225 void *cm_complete_data; 226 struct mprsas_target *cm_targ; 227 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc; 228 u_int cm_lun; 229 u_int cm_flags; 230 #define MPR_CM_FLAGS_POLLED (1 << 0) 231 #define MPR_CM_FLAGS_COMPLETE (1 << 1) 232 #define MPR_CM_FLAGS_SGE_SIMPLE (1 << 2) 233 #define MPR_CM_FLAGS_DATAOUT (1 << 3) 234 #define MPR_CM_FLAGS_DATAIN (1 << 4) 235 #define MPR_CM_FLAGS_WAKEUP (1 << 5) 236 #define MPR_CM_FLAGS_USE_UIO (1 << 6) 237 #define MPR_CM_FLAGS_SMP_PASS (1 << 7) 238 #define MPR_CM_FLAGS_CHAIN_FAILED (1 << 8) 239 #define MPR_CM_FLAGS_ERROR_MASK MPR_CM_FLAGS_CHAIN_FAILED 240 #define MPR_CM_FLAGS_USE_CCB (1 << 9) 241 #define MPR_CM_FLAGS_SATA_ID_TIMEOUT (1 << 10) 242 u_int cm_state; 243 #define MPR_CM_STATE_FREE 0 244 #define MPR_CM_STATE_BUSY 1 245 #define MPR_CM_STATE_TIMEDOUT 2 246 bus_dmamap_t cm_dmamap; 247 struct scsi_sense_data *cm_sense; 248 uint64_t *nvme_error_response; 249 TAILQ_HEAD(, mpr_chain) cm_chain_list; 250 TAILQ_HEAD(, mpr_prp_page) cm_prp_page_list; 251 uint32_t cm_req_busaddr; 252 bus_addr_t cm_sense_busaddr; 253 struct callout cm_callout; 254 }; 255 256 struct mpr_column_map { 257 uint16_t dev_handle; 258 uint8_t phys_disk_num; 259 }; 260 261 struct mpr_event_handle { 262 TAILQ_ENTRY(mpr_event_handle) eh_list; 263 mpr_evt_callback_t *callback; 264 void *data; 265 uint8_t mask[16]; 266 }; 267 268 struct mpr_busdma_context { 269 int completed; 270 int abandoned; 271 int error; 272 bus_addr_t *addr; 273 struct mpr_softc *softc; 274 bus_dmamap_t buffer_dmamap; 275 bus_dma_tag_t buffer_dmat; 276 }; 277 278 struct mpr_queue { 279 struct mpr_softc *sc; 280 int qnum; 281 MPI2_REPLY_DESCRIPTORS_UNION *post_queue; 282 int replypostindex; 283 #ifdef notyet 284 ck_ring_buffer_t *ringmem; 285 ck_ring_buffer_t *chainmem; 286 ck_ring_t req_ring; 287 ck_ring_t chain_ring; 288 #endif 289 bus_dma_tag_t buffer_dmat; 290 int io_cmds_highwater; 291 int chain_free_lowwater; 292 int chain_alloc_fail; 293 struct resource *irq; 294 void *intrhand; 295 int irq_rid; 296 }; 297 298 struct mpr_softc { 299 device_t mpr_dev; 300 struct cdev *mpr_cdev; 301 u_int mpr_flags; 302 #define MPR_FLAGS_INTX (1 << 0) 303 #define MPR_FLAGS_MSI (1 << 1) 304 #define MPR_FLAGS_BUSY (1 << 2) 305 #define MPR_FLAGS_SHUTDOWN (1 << 3) 306 #define MPR_FLAGS_DIAGRESET (1 << 4) 307 #define MPR_FLAGS_ATTACH_DONE (1 << 5) 308 #define MPR_FLAGS_GEN35_IOC (1 << 6) 309 #define MPR_FLAGS_REALLOCATED (1 << 7) 310 u_int mpr_debug; 311 int msi_msgs; 312 u_int reqframesz; 313 u_int replyframesz; 314 u_int atomic_desc_capable; 315 int tm_cmds_active; 316 int io_cmds_active; 317 int io_cmds_highwater; 318 int chain_free; 319 int max_chains; 320 int max_io_pages; 321 u_int maxio; 322 int chain_free_lowwater; 323 uint32_t chain_frame_size; 324 uint16_t chain_seg_size; 325 int prp_buffer_size; 326 int prp_pages_free; 327 int prp_pages_free_lowwater; 328 u_int enable_ssu; 329 int spinup_wait_time; 330 int use_phynum; 331 uint64_t chain_alloc_fail; 332 uint64_t prp_page_alloc_fail; 333 struct sysctl_ctx_list sysctl_ctx; 334 struct sysctl_oid *sysctl_tree; 335 char fw_version[16]; 336 struct mpr_command *commands; 337 struct mpr_chain *chains; 338 struct mpr_prp_page *prps; 339 struct callout periodic; 340 struct callout device_check_callout; 341 struct mpr_queue *queues; 342 343 struct mprsas_softc *sassc; 344 TAILQ_HEAD(, mpr_command) req_list; 345 TAILQ_HEAD(, mpr_command) high_priority_req_list; 346 TAILQ_HEAD(, mpr_chain) chain_list; 347 TAILQ_HEAD(, mpr_prp_page) prp_page_list; 348 TAILQ_HEAD(, mpr_command) tm_list; 349 int replypostindex; 350 int replyfreeindex; 351 352 struct resource *mpr_regs_resource; 353 bus_space_handle_t mpr_bhandle; 354 bus_space_tag_t mpr_btag; 355 int mpr_regs_rid; 356 357 bus_dma_tag_t mpr_parent_dmat; 358 bus_dma_tag_t buffer_dmat; 359 360 MPI2_IOC_FACTS_REPLY *facts; 361 int num_reqs; 362 int num_prireqs; 363 int num_replies; 364 int fqdepth; /* Free queue */ 365 int pqdepth; /* Post queue */ 366 367 uint8_t event_mask[16]; 368 TAILQ_HEAD(, mpr_event_handle) event_list; 369 struct mpr_event_handle *mpr_log_eh; 370 371 struct mtx mpr_mtx; 372 struct intr_config_hook mpr_ich; 373 374 uint8_t *req_frames; 375 bus_addr_t req_busaddr; 376 bus_dma_tag_t req_dmat; 377 bus_dmamap_t req_map; 378 379 uint8_t *reply_frames; 380 bus_addr_t reply_busaddr; 381 bus_dma_tag_t reply_dmat; 382 bus_dmamap_t reply_map; 383 384 struct scsi_sense_data *sense_frames; 385 bus_addr_t sense_busaddr; 386 bus_dma_tag_t sense_dmat; 387 bus_dmamap_t sense_map; 388 389 uint8_t *chain_frames; 390 bus_addr_t chain_busaddr; 391 bus_dma_tag_t chain_dmat; 392 bus_dmamap_t chain_map; 393 394 uint8_t *prp_pages; 395 bus_addr_t prp_page_busaddr; 396 bus_dma_tag_t prp_page_dmat; 397 bus_dmamap_t prp_page_map; 398 399 MPI2_REPLY_DESCRIPTORS_UNION *post_queue; 400 bus_addr_t post_busaddr; 401 uint32_t *free_queue; 402 bus_addr_t free_busaddr; 403 bus_dma_tag_t queues_dmat; 404 bus_dmamap_t queues_map; 405 406 uint8_t *fw_diag_buffer; 407 bus_addr_t fw_diag_busaddr; 408 bus_dma_tag_t fw_diag_dmat; 409 bus_dmamap_t fw_diag_map; 410 411 uint8_t ir_firmware; 412 413 /* static config pages */ 414 Mpi2IOCPage8_t ioc_pg8; 415 Mpi2IOUnitPage8_t iounit_pg8; 416 417 /* host mapping support */ 418 struct dev_mapping_table *mapping_table; 419 struct enc_mapping_table *enclosure_table; 420 struct map_removal_table *removal_table; 421 uint8_t *dpm_entry_used; 422 uint8_t *dpm_flush_entry; 423 Mpi2DriverMappingPage0_t *dpm_pg0; 424 uint16_t max_devices; 425 uint16_t max_enclosures; 426 uint16_t max_expanders; 427 uint8_t max_volumes; 428 uint8_t num_enc_table_entries; 429 uint8_t num_rsvd_entries; 430 uint16_t max_dpm_entries; 431 uint8_t is_dpm_enable; 432 uint8_t track_mapping_events; 433 uint32_t pending_map_events; 434 435 /* FW diag Buffer List */ 436 mpr_fw_diagnostic_buffer_t 437 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT]; 438 439 /* Event Recording IOCTL support */ 440 uint32_t events_to_record[4]; 441 mpr_event_entry_t recorded_events[MPR_EVENT_QUEUE_SIZE]; 442 uint8_t event_index; 443 uint32_t event_number; 444 445 /* EEDP and TLR support */ 446 uint8_t eedp_enabled; 447 uint8_t control_TLR; 448 449 /* Shutdown Event Handler */ 450 eventhandler_tag shutdown_eh; 451 452 /* To track topo events during reset */ 453 #define MPR_DIAG_RESET_TIMEOUT 300000 454 uint8_t wait_for_port_enable; 455 uint8_t port_enable_complete; 456 uint8_t msleep_fake_chan; 457 458 /* StartStopUnit command handling at shutdown */ 459 uint32_t SSU_refcount; 460 uint8_t SSU_started; 461 462 /* Configuration tunables */ 463 u_int disable_msix; 464 u_int disable_msi; 465 u_int max_msix; 466 u_int max_reqframes; 467 u_int max_prireqframes; 468 u_int max_replyframes; 469 u_int max_evtframes; 470 char exclude_ids[80]; 471 472 struct timeval lastfail; 473 }; 474 475 struct mpr_config_params { 476 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr; 477 u_int action; 478 u_int page_address; /* Attributes, not a phys address */ 479 u_int status; 480 void *buffer; 481 u_int length; 482 int timeout; 483 void (*callback)(struct mpr_softc *, struct mpr_config_params *); 484 void *cbdata; 485 }; 486 487 struct scsi_read_capacity_eedp 488 { 489 uint8_t addr[8]; 490 uint8_t length[4]; 491 uint8_t protect; 492 }; 493 494 static __inline uint32_t 495 mpr_regread(struct mpr_softc *sc, uint32_t offset) 496 { 497 return (bus_space_read_4(sc->mpr_btag, sc->mpr_bhandle, offset)); 498 } 499 500 static __inline void 501 mpr_regwrite(struct mpr_softc *sc, uint32_t offset, uint32_t val) 502 { 503 bus_space_write_4(sc->mpr_btag, sc->mpr_bhandle, offset, val); 504 } 505 506 /* free_queue must have Little Endian address 507 * TODO- cm_reply_data is unwanted. We can remove it. 508 * */ 509 static __inline void 510 mpr_free_reply(struct mpr_softc *sc, uint32_t busaddr) 511 { 512 if (++sc->replyfreeindex >= sc->fqdepth) 513 sc->replyfreeindex = 0; 514 sc->free_queue[sc->replyfreeindex] = htole32(busaddr); 515 mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 516 } 517 518 static __inline struct mpr_chain * 519 mpr_alloc_chain(struct mpr_softc *sc) 520 { 521 struct mpr_chain *chain; 522 523 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) { 524 TAILQ_REMOVE(&sc->chain_list, chain, chain_link); 525 sc->chain_free--; 526 if (sc->chain_free < sc->chain_free_lowwater) 527 sc->chain_free_lowwater = sc->chain_free; 528 } else 529 sc->chain_alloc_fail++; 530 return (chain); 531 } 532 533 static __inline void 534 mpr_free_chain(struct mpr_softc *sc, struct mpr_chain *chain) 535 { 536 #if 0 537 bzero(chain->chain, 128); 538 #endif 539 sc->chain_free++; 540 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link); 541 } 542 543 static __inline struct mpr_prp_page * 544 mpr_alloc_prp_page(struct mpr_softc *sc) 545 { 546 struct mpr_prp_page *prp_page; 547 548 if ((prp_page = TAILQ_FIRST(&sc->prp_page_list)) != NULL) { 549 TAILQ_REMOVE(&sc->prp_page_list, prp_page, prp_page_link); 550 sc->prp_pages_free--; 551 if (sc->prp_pages_free < sc->prp_pages_free_lowwater) 552 sc->prp_pages_free_lowwater = sc->prp_pages_free; 553 } else 554 sc->prp_page_alloc_fail++; 555 return (prp_page); 556 } 557 558 static __inline void 559 mpr_free_prp_page(struct mpr_softc *sc, struct mpr_prp_page *prp_page) 560 { 561 sc->prp_pages_free++; 562 TAILQ_INSERT_TAIL(&sc->prp_page_list, prp_page, prp_page_link); 563 } 564 565 static __inline void 566 mpr_free_command(struct mpr_softc *sc, struct mpr_command *cm) 567 { 568 struct mpr_chain *chain, *chain_temp; 569 struct mpr_prp_page *prp_page, *prp_page_temp; 570 571 if (cm->cm_reply != NULL) 572 mpr_free_reply(sc, cm->cm_reply_data); 573 cm->cm_reply = NULL; 574 cm->cm_flags = 0; 575 cm->cm_complete = NULL; 576 cm->cm_complete_data = NULL; 577 cm->cm_ccb = NULL; 578 cm->cm_targ = NULL; 579 cm->cm_max_segs = 0; 580 cm->cm_lun = 0; 581 cm->cm_state = MPR_CM_STATE_FREE; 582 cm->cm_data = NULL; 583 cm->cm_length = 0; 584 cm->cm_out_len = 0; 585 cm->cm_sglsize = 0; 586 cm->cm_sge = NULL; 587 588 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 589 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 590 mpr_free_chain(sc, chain); 591 } 592 TAILQ_FOREACH_SAFE(prp_page, &cm->cm_prp_page_list, prp_page_link, 593 prp_page_temp) { 594 TAILQ_REMOVE(&cm->cm_prp_page_list, prp_page, prp_page_link); 595 mpr_free_prp_page(sc, prp_page); 596 } 597 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link); 598 } 599 600 static __inline struct mpr_command * 601 mpr_alloc_command(struct mpr_softc *sc) 602 { 603 struct mpr_command *cm; 604 605 cm = TAILQ_FIRST(&sc->req_list); 606 if (cm == NULL) 607 return (NULL); 608 609 TAILQ_REMOVE(&sc->req_list, cm, cm_link); 610 KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy " 611 "command\n")); 612 cm->cm_state = MPR_CM_STATE_BUSY; 613 return (cm); 614 } 615 616 static __inline void 617 mpr_free_high_priority_command(struct mpr_softc *sc, struct mpr_command *cm) 618 { 619 struct mpr_chain *chain, *chain_temp; 620 621 if (cm->cm_reply != NULL) 622 mpr_free_reply(sc, cm->cm_reply_data); 623 cm->cm_reply = NULL; 624 cm->cm_flags = 0; 625 cm->cm_complete = NULL; 626 cm->cm_complete_data = NULL; 627 cm->cm_ccb = NULL; 628 cm->cm_targ = NULL; 629 cm->cm_lun = 0; 630 cm->cm_state = MPR_CM_STATE_FREE; 631 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { 632 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); 633 mpr_free_chain(sc, chain); 634 } 635 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link); 636 } 637 638 static __inline struct mpr_command * 639 mpr_alloc_high_priority_command(struct mpr_softc *sc) 640 { 641 struct mpr_command *cm; 642 643 cm = TAILQ_FIRST(&sc->high_priority_req_list); 644 if (cm == NULL) 645 return (NULL); 646 647 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link); 648 KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy " 649 "command\n")); 650 cm->cm_state = MPR_CM_STATE_BUSY; 651 return (cm); 652 } 653 654 static __inline void 655 mpr_lock(struct mpr_softc *sc) 656 { 657 mtx_lock(&sc->mpr_mtx); 658 } 659 660 static __inline void 661 mpr_unlock(struct mpr_softc *sc) 662 { 663 mtx_unlock(&sc->mpr_mtx); 664 } 665 666 #define MPR_INFO (1 << 0) /* Basic info */ 667 #define MPR_FAULT (1 << 1) /* Hardware faults */ 668 #define MPR_EVENT (1 << 2) /* Event data from the controller */ 669 #define MPR_LOG (1 << 3) /* Log data from the controller */ 670 #define MPR_RECOVERY (1 << 4) /* Command error recovery tracing */ 671 #define MPR_ERROR (1 << 5) /* Parameter errors, programming bugs */ 672 #define MPR_INIT (1 << 6) /* Things related to system init */ 673 #define MPR_XINFO (1 << 7) /* More detailed/noisy info */ 674 #define MPR_USER (1 << 8) /* Trace user-generated commands */ 675 #define MPR_MAPPING (1 << 9) /* Trace device mappings */ 676 #define MPR_TRACE (1 << 10) /* Function-by-function trace */ 677 678 #define MPR_SSU_DISABLE_SSD_DISABLE_HDD 0 679 #define MPR_SSU_ENABLE_SSD_DISABLE_HDD 1 680 #define MPR_SSU_DISABLE_SSD_ENABLE_HDD 2 681 #define MPR_SSU_ENABLE_SSD_ENABLE_HDD 3 682 683 #define mpr_printf(sc, args...) \ 684 device_printf((sc)->mpr_dev, ##args) 685 686 #define mpr_print_field(sc, msg, args...) \ 687 printf("\t" msg, ##args) 688 689 #define mpr_vprintf(sc, args...) \ 690 do { \ 691 if (bootverbose) \ 692 mpr_printf(sc, ##args); \ 693 } while (0) 694 695 #define mpr_dprint(sc, level, msg, args...) \ 696 do { \ 697 if ((sc)->mpr_debug & (level)) \ 698 device_printf((sc)->mpr_dev, msg, ##args); \ 699 } while (0) 700 701 #define MPR_PRINTFIELD_START(sc, tag...) \ 702 mpr_printf((sc), ##tag); \ 703 mpr_print_field((sc), ":\n") 704 #define MPR_PRINTFIELD_END(sc, tag) \ 705 mpr_printf((sc), tag "\n") 706 #define MPR_PRINTFIELD(sc, facts, attr, fmt) \ 707 mpr_print_field((sc), #attr ": " #fmt "\n", (facts)->attr) 708 709 static __inline void 710 mpr_from_u64(uint64_t data, U64 *mpr) 711 { 712 (mpr)->High = htole32((uint32_t)((data) >> 32)); 713 (mpr)->Low = htole32((uint32_t)((data) & 0xffffffff)); 714 } 715 716 static __inline uint64_t 717 mpr_to_u64(U64 *data) 718 { 719 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low)); 720 } 721 722 static __inline void 723 mpr_mask_intr(struct mpr_softc *sc) 724 { 725 uint32_t mask; 726 727 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 728 mask |= MPI2_HIM_REPLY_INT_MASK; 729 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 730 } 731 732 static __inline void 733 mpr_unmask_intr(struct mpr_softc *sc) 734 { 735 uint32_t mask; 736 737 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); 738 mask &= ~MPI2_HIM_REPLY_INT_MASK; 739 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); 740 } 741 742 int mpr_pci_setup_interrupts(struct mpr_softc *sc); 743 void mpr_pci_free_interrupts(struct mpr_softc *sc); 744 int mpr_pci_restore(struct mpr_softc *sc); 745 746 void mpr_get_tunables(struct mpr_softc *sc); 747 int mpr_attach(struct mpr_softc *sc); 748 int mpr_free(struct mpr_softc *sc); 749 void mpr_intr(void *); 750 void mpr_intr_msi(void *); 751 void mpr_intr_locked(void *); 752 int mpr_register_events(struct mpr_softc *, uint8_t *, mpr_evt_callback_t *, 753 void *, struct mpr_event_handle **); 754 int mpr_restart(struct mpr_softc *); 755 int mpr_update_events(struct mpr_softc *, struct mpr_event_handle *, uint8_t *); 756 int mpr_deregister_events(struct mpr_softc *, struct mpr_event_handle *); 757 void mpr_build_nvme_prp(struct mpr_softc *sc, struct mpr_command *cm, 758 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, void *data, 759 uint32_t data_in_sz, uint32_t data_out_sz); 760 int mpr_push_sge(struct mpr_command *, MPI2_SGE_SIMPLE64 *, size_t, int); 761 int mpr_push_ieee_sge(struct mpr_command *, void *, int); 762 int mpr_add_dmaseg(struct mpr_command *, vm_paddr_t, size_t, u_int, int); 763 int mpr_attach_sas(struct mpr_softc *sc); 764 int mpr_detach_sas(struct mpr_softc *sc); 765 int mpr_read_config_page(struct mpr_softc *, struct mpr_config_params *); 766 int mpr_write_config_page(struct mpr_softc *, struct mpr_config_params *); 767 void mpr_memaddr_cb(void *, bus_dma_segment_t *, int , int ); 768 void mpr_memaddr_wait_cb(void *, bus_dma_segment_t *, int , int ); 769 void mpr_init_sge(struct mpr_command *cm, void *req, void *sge); 770 int mpr_attach_user(struct mpr_softc *); 771 void mpr_detach_user(struct mpr_softc *); 772 void mprsas_record_event(struct mpr_softc *sc, 773 MPI2_EVENT_NOTIFICATION_REPLY *event_reply); 774 775 int mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm); 776 int mpr_wait_command(struct mpr_softc *sc, struct mpr_command **cm, int timeout, 777 int sleep_flag); 778 int mpr_request_polled(struct mpr_softc *sc, struct mpr_command **cm); 779 780 int mpr_config_get_bios_pg3(struct mpr_softc *sc, Mpi2ConfigReply_t 781 *mpi_reply, Mpi2BiosPage3_t *config_page); 782 int mpr_config_get_raid_volume_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t 783 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address); 784 int mpr_config_get_ioc_pg8(struct mpr_softc *sc, Mpi2ConfigReply_t *, 785 Mpi2IOCPage8_t *); 786 int mpr_config_get_iounit_pg8(struct mpr_softc *sc, 787 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage8_t *config_page); 788 int mpr_config_get_sas_device_pg0(struct mpr_softc *, Mpi2ConfigReply_t *, 789 Mpi2SasDevicePage0_t *, u32 , u16 ); 790 int mpr_config_get_pcie_device_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t 791 *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u16 handle); 792 int mpr_config_get_pcie_device_pg2(struct mpr_softc *sc, Mpi2ConfigReply_t 793 *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u16 handle); 794 int mpr_config_get_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *, 795 Mpi2DriverMappingPage0_t *, u16 ); 796 int mpr_config_get_raid_volume_pg1(struct mpr_softc *sc, 797 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, 798 u16 handle); 799 int mpr_config_get_volume_wwid(struct mpr_softc *sc, u16 volume_handle, 800 u64 *wwid); 801 int mpr_config_get_raid_pd_pg0(struct mpr_softc *sc, 802 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, 803 u32 page_address); 804 void mprsas_ir_shutdown(struct mpr_softc *sc); 805 806 int mpr_reinit(struct mpr_softc *sc); 807 void mprsas_handle_reinit(struct mpr_softc *sc); 808 809 void mpr_base_static_config_pages(struct mpr_softc *sc); 810 811 int mpr_mapping_initialize(struct mpr_softc *); 812 void mpr_mapping_topology_change_event(struct mpr_softc *, 813 Mpi2EventDataSasTopologyChangeList_t *); 814 void mpr_mapping_pcie_topology_change_event(struct mpr_softc *sc, 815 Mpi26EventDataPCIeTopologyChangeList_t *event_data); 816 void mpr_mapping_free_memory(struct mpr_softc *sc); 817 int mpr_config_set_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *, 818 Mpi2DriverMappingPage0_t *, u16 ); 819 void mpr_mapping_exit(struct mpr_softc *); 820 void mpr_mapping_check_devices(void *); 821 int mpr_mapping_allocate_memory(struct mpr_softc *sc); 822 unsigned int mpr_mapping_get_tid(struct mpr_softc *, uint64_t , u16); 823 unsigned int mpr_mapping_get_tid_from_handle(struct mpr_softc *sc, 824 u16 handle); 825 unsigned int mpr_mapping_get_raid_tid(struct mpr_softc *sc, u64 wwid, 826 u16 volHandle); 827 unsigned int mpr_mapping_get_raid_tid_from_handle(struct mpr_softc *sc, 828 u16 volHandle); 829 void mpr_mapping_enclosure_dev_status_change_event(struct mpr_softc *, 830 Mpi2EventDataSasEnclDevStatusChange_t *event_data); 831 void mpr_mapping_ir_config_change_event(struct mpr_softc *sc, 832 Mpi2EventDataIrConfigChangeList_t *event_data); 833 834 void mprsas_evt_handler(struct mpr_softc *sc, uintptr_t data, 835 MPI2_EVENT_NOTIFICATION_REPLY *event); 836 void mprsas_prepare_remove(struct mprsas_softc *sassc, uint16_t handle); 837 void mprsas_prepare_volume_remove(struct mprsas_softc *sassc, uint16_t handle); 838 int mprsas_startup(struct mpr_softc *sc); 839 struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *, int, 840 uint16_t); 841 void mprsas_realloc_targets(struct mpr_softc *sc, int maxtargets); 842 struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc); 843 void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm); 844 void mprsas_release_simq_reinit(struct mprsas_softc *sassc); 845 int mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm, 846 uint8_t type); 847 848 SYSCTL_DECL(_hw_mpr); 849 850 /* Compatibility shims for different OS versions */ 851 #if __FreeBSD_version >= 800001 852 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \ 853 kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) 854 #define mpr_kproc_exit(arg) kproc_exit(arg) 855 #else 856 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \ 857 kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) 858 #define mpr_kproc_exit(arg) kthread_exit(arg) 859 #endif 860 861 #if defined(CAM_PRIORITY_XPT) 862 #define MPR_PRIORITY_XPT CAM_PRIORITY_XPT 863 #else 864 #define MPR_PRIORITY_XPT 5 865 #endif 866 867 #if __FreeBSD_version < 800107 868 // Prior to FreeBSD-8.0 scp3_flags was not defined. 869 #define spc3_flags reserved 870 871 #define SPC3_SID_PROTECT 0x01 872 #define SPC3_SID_3PC 0x08 873 #define SPC3_SID_TPGS_MASK 0x30 874 #define SPC3_SID_TPGS_IMPLICIT 0x10 875 #define SPC3_SID_TPGS_EXPLICIT 0x20 876 #define SPC3_SID_ACC 0x40 877 #define SPC3_SID_SCCS 0x80 878 879 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE 880 #endif 881 882 /* Definitions for SCSI unmap translation to NVMe DSM command */ 883 884 /* UNMAP block descriptor structure */ 885 struct unmap_blk_desc { 886 uint64_t slba; 887 uint32_t nlb; 888 uint32_t resv; 889 }; 890 891 /* UNMAP command's data */ 892 struct unmap_parm_list { 893 uint16_t unmap_data_len; 894 uint16_t unmap_blk_desc_data_len; 895 uint32_t resv; 896 struct unmap_blk_desc desc[0]; 897 }; 898 899 /* SCSI ADDITIONAL SENSE Codes */ 900 #define FIXED_SENSE_DATA 0x70 901 #define SCSI_ASC_NO_SENSE 0x00 902 #define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03 903 #define SCSI_ASC_LUN_NOT_READY 0x04 904 #define SCSI_ASC_WARNING 0x0B 905 #define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10 906 #define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10 907 #define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10 908 #define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11 909 #define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D 910 #define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20 911 #define SCSI_ASC_ILLEGAL_COMMAND 0x20 912 #define SCSI_ASC_ILLEGAL_BLOCK 0x21 913 #define SCSI_ASC_INVALID_CDB 0x24 914 #define SCSI_ASC_INVALID_LUN 0x25 915 #define SCSI_ASC_INVALID_PARAMETER 0x26 916 #define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31 917 #define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44 918 919 /* SCSI ADDITIONAL SENSE Code Qualifiers */ 920 #define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00 921 #define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01 922 #define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01 923 #define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02 924 #define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03 925 #define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04 926 #define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08 927 #define SCSI_ASCQ_INVALID_LUN_ID 0x09 928 929 #endif 930 931