1 /****************************************************************************** 2 SPDX-License-Identifier: BSD-3-Clause 3 4 Copyright (c) 2001-2017, Intel Corporation 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of the Intel Corporation nor the names of its 18 contributors may be used to endorse or promote products derived from 19 this software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 ******************************************************************************/ 34 /*$FreeBSD$*/ 35 36 37 #ifndef _IXGBE_H_ 38 #define _IXGBE_H_ 39 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/buf_ring.h> 44 #include <sys/mbuf.h> 45 #include <sys/protosw.h> 46 #include <sys/socket.h> 47 #include <sys/malloc.h> 48 #include <sys/kernel.h> 49 #include <sys/module.h> 50 #include <sys/sockio.h> 51 #include <sys/eventhandler.h> 52 53 #include <net/if.h> 54 #include <net/if_var.h> 55 #include <net/if_arp.h> 56 #include <net/bpf.h> 57 #include <net/ethernet.h> 58 #include <net/if_dl.h> 59 #include <net/if_media.h> 60 61 #include <net/if_types.h> 62 #include <net/if_vlan_var.h> 63 #include <net/iflib.h> 64 65 #include <netinet/in_systm.h> 66 #include <netinet/in.h> 67 #include <netinet/if_ether.h> 68 69 #include <sys/bus.h> 70 #include <machine/bus.h> 71 #include <sys/rman.h> 72 #include <machine/resource.h> 73 #include <vm/vm.h> 74 #include <vm/pmap.h> 75 #include <machine/clock.h> 76 #include <dev/pci/pcivar.h> 77 #include <dev/pci/pcireg.h> 78 #include <sys/proc.h> 79 #include <sys/sysctl.h> 80 #include <sys/endian.h> 81 #include <sys/gtaskqueue.h> 82 #include <sys/pcpu.h> 83 #include <sys/smp.h> 84 #include <machine/smp.h> 85 #include <sys/sbuf.h> 86 87 #include "ixgbe_api.h" 88 #include "ixgbe_common.h" 89 #include "ixgbe_phy.h" 90 #include "ixgbe_vf.h" 91 #include "ixgbe_features.h" 92 93 /* Tunables */ 94 95 /* 96 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 97 * number of transmit descriptors allocated by the driver. Increasing this 98 * value allows the driver to queue more transmits. Each descriptor is 16 99 * bytes. Performance tests have show the 2K value to be optimal for top 100 * performance. 101 */ 102 #define DEFAULT_TXD 2048 103 #define PERFORM_TXD 2048 104 #define MAX_TXD 4096 105 #define MIN_TXD 64 106 107 /* 108 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 109 * number of receive descriptors allocated for each RX queue. Increasing this 110 * value allows the driver to buffer more incoming packets. Each descriptor 111 * is 16 bytes. A receive buffer is also allocated for each descriptor. 112 * 113 * Note: with 8 rings and a dual port card, it is possible to bump up 114 * against the system mbuf pool limit, you can tune nmbclusters 115 * to adjust for this. 116 */ 117 #define DEFAULT_RXD 2048 118 #define PERFORM_RXD 2048 119 #define MAX_RXD 4096 120 #define MIN_RXD 64 121 122 /* Alignment for rings */ 123 #define DBA_ALIGN 128 124 125 /* 126 * This is the max watchdog interval, ie. the time that can 127 * pass between any two TX clean operations, such only happening 128 * when the TX hardware is functioning. 129 */ 130 #define IXGBE_WATCHDOG (10 * hz) 131 132 /* 133 * This parameters control when the driver calls the routine to reclaim 134 * transmit descriptors. 135 */ 136 #define IXGBE_TX_CLEANUP_THRESHOLD(_a) ((_a)->num_tx_desc / 8) 137 #define IXGBE_TX_OP_THRESHOLD(_a) ((_a)->num_tx_desc / 32) 138 139 /* These defines are used in MTU calculations */ 140 #define IXGBE_MAX_FRAME_SIZE 9728 141 #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN) 142 #define IXGBE_MTU_HDR_VLAN (ETHER_HDR_LEN + ETHER_CRC_LEN + \ 143 ETHER_VLAN_ENCAP_LEN) 144 #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR) 145 #define IXGBE_MAX_MTU_VLAN (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN) 146 147 /* Flow control constants */ 148 #define IXGBE_FC_PAUSE 0xFFFF 149 #define IXGBE_FC_HI 0x20000 150 #define IXGBE_FC_LO 0x10000 151 152 /* 153 * Used for optimizing small rx mbufs. Effort is made to keep the copy 154 * small and aligned for the CPU L1 cache. 155 * 156 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 157 * 32 byte alignment needed for the fast bcopy results in 8 bytes being 158 * wasted. Getting 64 byte alignment, which _should_ be ideal for 159 * modern Intel CPUs, results in 40 bytes wasted and a significant drop 160 * in observed efficiency of the optimization, 97.9% -> 81.8%. 161 */ 162 #if __FreeBSD_version < 1002000 163 #define MPKTHSIZE (sizeof(struct m_hdr) + sizeof(struct pkthdr)) 164 #endif 165 #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32) 166 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED) 167 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE) 168 169 /* Keep older OS drivers building... */ 170 #if !defined(SYSCTL_ADD_UQUAD) 171 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 172 #endif 173 174 /* Defines for printing debug information */ 175 #define DEBUG_INIT 0 176 #define DEBUG_IOCTL 0 177 #define DEBUG_HW 0 178 179 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 180 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 181 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 182 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 183 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 184 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 185 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 186 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 187 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 188 189 #define MAX_NUM_MULTICAST_ADDRESSES 128 190 #define IXGBE_82598_SCATTER 100 191 #define IXGBE_82599_SCATTER 32 192 #define IXGBE_TSO_SIZE 262140 193 #define IXGBE_RX_HDR 128 194 #define IXGBE_VFTA_SIZE 128 195 #define IXGBE_BR_SIZE 4096 196 #define IXGBE_QUEUE_MIN_FREE 32 197 #define IXGBE_MAX_TX_BUSY 10 198 #define IXGBE_QUEUE_HUNG 0x80000000 199 200 #define IXGBE_EITR_DEFAULT 128 201 202 /* Supported offload bits in mbuf flag */ 203 #if __FreeBSD_version >= 1000000 204 #define CSUM_OFFLOAD (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \ 205 CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \ 206 CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP) 207 #elif __FreeBSD_version >= 800000 208 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 209 #else 210 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 211 #endif 212 213 #define IXGBE_CAPS (IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6 | IFCAP_TSO | \ 214 IFCAP_LRO | IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWTSO | \ 215 IFCAP_VLAN_HWCSUM | IFCAP_JUMBO_MTU | IFCAP_VLAN_MTU | \ 216 IFCAP_VLAN_HWFILTER | IFCAP_WOL) 217 218 /* Backward compatibility items for very old versions */ 219 #ifndef pci_find_cap 220 #define pci_find_cap pci_find_extcap 221 #endif 222 223 #ifndef DEVMETHOD_END 224 #define DEVMETHOD_END { NULL, NULL } 225 #endif 226 227 /* 228 * Interrupt Moderation parameters 229 */ 230 #define IXGBE_LOW_LATENCY 128 231 #define IXGBE_AVE_LATENCY 400 232 #define IXGBE_BULK_LATENCY 1200 233 234 /* Using 1FF (the max value), the interval is ~1.05ms */ 235 #define IXGBE_LINK_ITR_QUANTA 0x1FF 236 #define IXGBE_LINK_ITR ((IXGBE_LINK_ITR_QUANTA << 3) & \ 237 IXGBE_EITR_ITR_INT_MASK) 238 239 240 /************************************************************************ 241 * vendor_info_array 242 * 243 * Contains the list of Subvendor/Subdevice IDs on 244 * which the driver should load. 245 ************************************************************************/ 246 typedef struct _ixgbe_vendor_info_t { 247 unsigned int vendor_id; 248 unsigned int device_id; 249 unsigned int subvendor_id; 250 unsigned int subdevice_id; 251 unsigned int index; 252 } ixgbe_vendor_info_t; 253 254 struct ixgbe_bp_data { 255 u32 low; 256 u32 high; 257 u32 log; 258 }; 259 260 261 /* 262 */ 263 struct ixgbe_dma_alloc { 264 bus_addr_t dma_paddr; 265 caddr_t dma_vaddr; 266 bus_dma_tag_t dma_tag; 267 bus_dmamap_t dma_map; 268 bus_dma_segment_t dma_seg; 269 bus_size_t dma_size; 270 int dma_nseg; 271 }; 272 273 struct ixgbe_mc_addr { 274 u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; 275 u32 vmdq; 276 }; 277 278 /* 279 * The transmit ring, one per queue 280 */ 281 struct tx_ring { 282 struct adapter *adapter; 283 union ixgbe_adv_tx_desc *tx_base; 284 uint64_t tx_paddr; 285 u32 tail; 286 qidx_t *tx_rsq; 287 qidx_t tx_rs_cidx; 288 qidx_t tx_rs_pidx; 289 qidx_t tx_cidx_processed; 290 uint8_t me; 291 292 /* Flow Director */ 293 u16 atr_sample; 294 u16 atr_count; 295 296 u32 bytes; /* used for AIM */ 297 u32 packets; 298 /* Soft Stats */ 299 u64 tso_tx; 300 u64 total_packets; 301 }; 302 303 304 /* 305 * The Receive ring, one per rx queue 306 */ 307 struct rx_ring { 308 struct ix_rx_queue *que; 309 struct adapter *adapter; 310 u32 me; 311 u32 tail; 312 union ixgbe_adv_rx_desc *rx_base; 313 bool hw_rsc; 314 bool vtag_strip; 315 uint64_t rx_paddr; 316 bus_dma_tag_t ptag; 317 318 u32 bytes; /* Used for AIM calc */ 319 u32 packets; 320 321 /* Soft stats */ 322 u64 rx_irq; 323 u64 rx_copies; 324 u64 rx_packets; 325 u64 rx_bytes; 326 u64 rx_discarded; 327 u64 rsc_num; 328 329 /* Flow Director */ 330 u64 flm; 331 }; 332 333 /* 334 * Driver queue struct: this is the interrupt container 335 * for the associated tx and rx ring. 336 */ 337 struct ix_rx_queue { 338 struct adapter *adapter; 339 u32 msix; /* This queue's MSIX vector */ 340 u32 eims; /* This queue's EIMS bit */ 341 u32 eitr_setting; 342 struct resource *res; 343 void *tag; 344 int busy; 345 struct rx_ring rxr; 346 struct if_irq que_irq; 347 u64 irqs; 348 }; 349 350 struct ix_tx_queue { 351 struct adapter *adapter; 352 u32 msix; /* This queue's MSIX vector */ 353 struct tx_ring txr; 354 }; 355 356 #define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */ 357 358 struct ixgbe_vf { 359 u_int pool; 360 u_int rar_index; 361 u_int maximum_frame_size; 362 uint32_t flags; 363 uint8_t ether_addr[ETHER_ADDR_LEN]; 364 uint16_t mc_hash[IXGBE_MAX_VF_MC]; 365 uint16_t num_mc_hashes; 366 uint16_t default_vlan; 367 uint16_t vlan_tag; 368 uint16_t api_ver; 369 }; 370 371 /* Our adapter structure */ 372 struct adapter { 373 struct ixgbe_hw hw; 374 struct ixgbe_osdep osdep; 375 if_ctx_t ctx; 376 if_softc_ctx_t shared; 377 #define num_tx_queues shared->isc_ntxqsets 378 #define num_rx_queues shared->isc_nrxqsets 379 #define max_frame_size shared->isc_max_frame_size 380 #define intr_type shared->isc_intr 381 382 device_t dev; 383 struct ifnet *ifp; 384 385 struct resource *pci_mem; 386 387 /* 388 * Interrupt resources: this set is 389 * either used for legacy, or for Link 390 * when doing MSI-X 391 */ 392 struct if_irq irq; 393 void *tag; 394 struct resource *res; 395 396 struct ifmedia *media; 397 int if_flags; 398 int msix; 399 400 u16 num_vlans; 401 402 /* 403 * Shadow VFTA table, this is needed because 404 * the real vlan filter table gets cleared during 405 * a soft reset and the driver needs to be able 406 * to repopulate it. 407 */ 408 u32 shadow_vfta[IXGBE_VFTA_SIZE]; 409 410 /* Info about the interface */ 411 int advertise; /* link speeds */ 412 bool link_active; 413 u16 num_segs; 414 u32 link_speed; 415 bool link_up; 416 u32 vector; 417 u16 dmac; 418 u32 phy_layer; 419 420 /* Power management-related */ 421 bool wol_support; 422 u32 wufc; 423 424 /* Mbuf cluster size */ 425 u32 rx_mbuf_sz; 426 427 /* Support for pluggable optics */ 428 bool sfp_probe; 429 430 /* Flow Director */ 431 int fdir_reinit; 432 433 u32 task_requests; 434 435 /* 436 * Queues: 437 * This is the irq holder, it has 438 * and RX/TX pair or rings associated 439 * with it. 440 */ 441 struct ix_tx_queue *tx_queues; 442 struct ix_rx_queue *rx_queues; 443 u64 active_queues; 444 445 /* Multicast array memory */ 446 struct ixgbe_mc_addr *mta; 447 448 /* SR-IOV */ 449 int iov_mode; 450 int num_vfs; 451 int pool; 452 struct ixgbe_vf *vfs; 453 454 /* Bypass */ 455 struct ixgbe_bp_data bypass; 456 457 /* Misc stats maintained by the driver */ 458 unsigned long dropped_pkts; 459 unsigned long mbuf_header_failed; 460 unsigned long mbuf_packet_failed; 461 unsigned long watchdog_events; 462 unsigned long link_irq; 463 union { 464 struct ixgbe_hw_stats pf; 465 struct ixgbevf_hw_stats vf; 466 } stats; 467 #if __FreeBSD_version >= 1100036 468 /* counter(9) stats */ 469 u64 ipackets; 470 u64 ierrors; 471 u64 opackets; 472 u64 oerrors; 473 u64 ibytes; 474 u64 obytes; 475 u64 imcasts; 476 u64 omcasts; 477 u64 iqdrops; 478 u64 noproto; 479 #endif 480 /* Feature capable/enabled flags. See ixgbe_features.h */ 481 u32 feat_cap; 482 u32 feat_en; 483 }; 484 485 /* Precision Time Sync (IEEE 1588) defines */ 486 #define ETHERTYPE_IEEE1588 0x88F7 487 #define PICOSECS_PER_TICK 20833 488 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 489 #define IXGBE_ADVTXD_TSTAMP 0x00080000 490 491 /* For backward compatibility */ 492 #if !defined(PCIER_LINK_STA) 493 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA 494 #endif 495 496 /* Stats macros */ 497 #if __FreeBSD_version >= 1100036 498 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count) 499 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count) 500 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count) 501 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count) 502 #define IXGBE_SET_COLLISIONS(sc, count) 503 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count) 504 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count) 505 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count) 506 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count) 507 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count) 508 #else 509 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count) 510 #define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count) 511 #define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count) 512 #define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count) 513 #define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count) 514 #define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count) 515 #define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count) 516 #define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count) 517 #define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count) 518 #define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count) 519 #endif 520 521 /* External PHY register addresses */ 522 #define IXGBE_PHY_CURRENT_TEMP 0xC820 523 #define IXGBE_PHY_OVERTEMP_STATUS 0xC830 524 525 /* Sysctl help messages; displayed with sysctl -d */ 526 #define IXGBE_SYSCTL_DESC_ADV_SPEED \ 527 "\nControl advertised link speed using these flags:\n" \ 528 "\t0x1 - advertise 100M\n" \ 529 "\t0x2 - advertise 1G\n" \ 530 "\t0x4 - advertise 10G\n" \ 531 "\t0x8 - advertise 10M\n\n" \ 532 "\t100M and 10M are only supported on certain adapters.\n" 533 534 #define IXGBE_SYSCTL_DESC_SET_FC \ 535 "\nSet flow control mode using these values:\n" \ 536 "\t0 - off\n" \ 537 "\t1 - rx pause\n" \ 538 "\t2 - tx pause\n" \ 539 "\t3 - tx and rx pause" 540 541 /* Workaround to make 8.0 buildable */ 542 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 543 static __inline int 544 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 545 { 546 #ifdef ALTQ 547 if (ALTQ_IS_ENABLED(&ifp->if_snd)) 548 return (1); 549 #endif 550 return (!buf_ring_empty(br)); 551 } 552 #endif 553 554 /* 555 * This checks for a zero mac addr, something that will be likely 556 * unless the Admin on the Host has created one. 557 */ 558 static inline bool 559 ixv_check_ether_addr(u8 *addr) 560 { 561 bool status = TRUE; 562 563 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 && 564 addr[3] == 0 && addr[4]== 0 && addr[5] == 0)) 565 status = FALSE; 566 567 return (status); 568 } 569 570 /* Shared Prototypes */ 571 572 int ixgbe_allocate_queues(struct adapter *); 573 int ixgbe_setup_transmit_structures(struct adapter *); 574 void ixgbe_free_transmit_structures(struct adapter *); 575 int ixgbe_setup_receive_structures(struct adapter *); 576 void ixgbe_free_receive_structures(struct adapter *); 577 int ixgbe_get_regs(SYSCTL_HANDLER_ARGS); 578 579 #include "ixgbe_bypass.h" 580 #include "ixgbe_fdir.h" 581 #include "ixgbe_rss.h" 582 583 #endif /* _IXGBE_H_ */ 584