1 /*- 2 * Copyright (c) 1997-2006 by Matthew Jacob 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice immediately at the beginning of the file, without modification, 10 * this list of conditions, and the following disclaimer. 11 * 2. The name of the author may not be used to endorse or promote products 12 * derived from this software without specific prior written permission. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 /* 27 * SBus specific probe and attach routines for Qlogic ISP SCSI adapters. 28 * FreeBSD Version. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/linker.h> 37 #include <sys/firmware.h> 38 #include <sys/bus.h> 39 #include <sys/kernel.h> 40 #include <sys/module.h> 41 #include <sys/resource.h> 42 43 #include <dev/ofw/ofw_bus.h> 44 #include <dev/ofw/openfirm.h> 45 46 #include <machine/bus.h> 47 #include <machine/ofw_machdep.h> 48 #include <machine/resource.h> 49 #include <sys/rman.h> 50 #include <sparc64/sbus/sbusvar.h> 51 52 #include <dev/isp/isp_freebsd.h> 53 54 static uint32_t isp_sbus_rd_reg(ispsoftc_t *, int); 55 static void isp_sbus_wr_reg(ispsoftc_t *, int, uint32_t); 56 static int isp_sbus_rd_isr(ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *); 57 static int isp_sbus_mbxdma(ispsoftc_t *); 58 static int isp_sbus_dmasetup(ispsoftc_t *, XS_T *, void *); 59 60 61 static void isp_sbus_reset0(ispsoftc_t *); 62 static void isp_sbus_reset1(ispsoftc_t *); 63 static void isp_sbus_dumpregs(ispsoftc_t *, const char *); 64 65 static struct ispmdvec mdvec = { 66 isp_sbus_rd_isr, 67 isp_sbus_rd_reg, 68 isp_sbus_wr_reg, 69 isp_sbus_mbxdma, 70 isp_sbus_dmasetup, 71 isp_common_dmateardown, 72 isp_sbus_reset0, 73 isp_sbus_reset1, 74 isp_sbus_dumpregs, 75 NULL, 76 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64 77 }; 78 79 static int isp_sbus_probe (device_t); 80 static int isp_sbus_attach (device_t); 81 static int isp_sbus_detach (device_t); 82 83 84 #define ISP_SBD(isp) ((struct isp_sbussoftc *)isp)->sbus_dev 85 struct isp_sbussoftc { 86 ispsoftc_t sbus_isp; 87 device_t sbus_dev; 88 struct resource * regs; 89 void * irq; 90 int iqd; 91 int rgd; 92 void * ih; 93 int16_t sbus_poff[_NREG_BLKS]; 94 sdparam sbus_param; 95 struct isp_spi sbus_spi; 96 struct ispmdvec sbus_mdvec; 97 }; 98 99 100 static device_method_t isp_sbus_methods[] = { 101 /* Device interface */ 102 DEVMETHOD(device_probe, isp_sbus_probe), 103 DEVMETHOD(device_attach, isp_sbus_attach), 104 DEVMETHOD(device_detach, isp_sbus_detach), 105 { 0, 0 } 106 }; 107 108 static driver_t isp_sbus_driver = { 109 "isp", isp_sbus_methods, sizeof (struct isp_sbussoftc) 110 }; 111 static devclass_t isp_devclass; 112 DRIVER_MODULE(isp, sbus, isp_sbus_driver, isp_devclass, 0, 0); 113 MODULE_DEPEND(isp, cam, 1, 1, 1); 114 MODULE_DEPEND(isp, firmware, 1, 1, 1); 115 116 static int 117 isp_sbus_probe(device_t dev) 118 { 119 int found = 0; 120 const char *name = ofw_bus_get_name(dev); 121 if (strcmp(name, "SUNW,isp") == 0 || 122 strcmp(name, "QLGC,isp") == 0 || 123 strcmp(name, "ptisp") == 0 || 124 strcmp(name, "PTI,ptisp") == 0) { 125 found++; 126 } 127 if (!found) 128 return (ENXIO); 129 130 if (isp_announced == 0 && bootverbose) { 131 printf("Qlogic ISP Driver, FreeBSD Version %d.%d, " 132 "Core Version %d.%d\n", 133 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR, 134 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR); 135 isp_announced++; 136 } 137 return (0); 138 } 139 140 static int 141 isp_sbus_attach(device_t dev) 142 { 143 int tval, isp_debug, role, ispburst, default_id; 144 struct isp_sbussoftc *sbs; 145 ispsoftc_t *isp = NULL; 146 int locksetup = 0; 147 int ints_setup = 0; 148 149 sbs = device_get_softc(dev); 150 if (sbs == NULL) { 151 device_printf(dev, "cannot get softc\n"); 152 return (ENOMEM); 153 } 154 155 sbs->sbus_dev = dev; 156 sbs->sbus_mdvec = mdvec; 157 158 role = 0; 159 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 160 "role", &role) == 0 && 161 ((role & ~(ISP_ROLE_INITIATOR|ISP_ROLE_TARGET)) == 0)) { 162 device_printf(dev, "setting role to 0x%x\n", role); 163 } else { 164 role = ISP_DEFAULT_ROLES; 165 } 166 167 sbs->irq = sbs->regs = NULL; 168 sbs->rgd = sbs->iqd = 0; 169 170 sbs->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sbs->rgd, 171 RF_ACTIVE); 172 if (sbs->regs == NULL) { 173 device_printf(dev, "unable to map registers\n"); 174 goto bad; 175 } 176 177 sbs->sbus_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF; 178 sbs->sbus_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = SBUS_MBOX_REGS_OFF; 179 sbs->sbus_poff[SXP_BLOCK >> _BLK_REG_SHFT] = SBUS_SXP_REGS_OFF; 180 sbs->sbus_poff[RISC_BLOCK >> _BLK_REG_SHFT] = SBUS_RISC_REGS_OFF; 181 sbs->sbus_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF; 182 isp = &sbs->sbus_isp; 183 isp->isp_regs = sbs->regs; 184 isp->isp_mdvec = &sbs->sbus_mdvec; 185 isp->isp_bustype = ISP_BT_SBUS; 186 isp->isp_type = ISP_HA_SCSI_UNKNOWN; 187 isp->isp_param = &sbs->sbus_param; 188 isp->isp_osinfo.pc.ptr = &sbs->sbus_spi; 189 isp->isp_revision = 0; /* XXX */ 190 isp->isp_dev = dev; 191 isp->isp_nchan = 1; 192 if (IS_FC(isp)) 193 ISP_FC_PC(isp, 0)->def_role = role; 194 195 /* 196 * Get the clock frequency and convert it from HZ to MHz, 197 * rounding up. This defaults to 25MHz if there isn't a 198 * device specific one in the OFW device tree. 199 */ 200 sbs->sbus_mdvec.dv_clock = (sbus_get_clockfreq(dev) + 500000)/1000000; 201 202 /* 203 * Now figure out what the proper burst sizes, etc., to use. 204 * Unfortunately, there is no ddi_dma_burstsizes here which 205 * walks up the tree finding the limiting burst size node (if 206 * any). We just use what's here for isp. 207 */ 208 ispburst = sbus_get_burstsz(dev); 209 if (ispburst == 0) { 210 ispburst = SBUS_BURST_32 - 1; 211 } 212 sbs->sbus_mdvec.dv_conf1 = 0; 213 if (ispburst & (1 << 5)) { 214 sbs->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_32; 215 } else if (ispburst & (1 << 4)) { 216 sbs->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_16; 217 } else if (ispburst & (1 << 3)) { 218 sbs->sbus_mdvec.dv_conf1 = 219 BIU_SBUS_CONF1_BURST8 | BIU_SBUS_CONF1_FIFO_8; 220 } 221 if (sbs->sbus_mdvec.dv_conf1) { 222 sbs->sbus_mdvec.dv_conf1 |= BIU_BURST_ENABLE; 223 } 224 225 /* 226 * We don't trust NVRAM on SBus cards 227 */ 228 isp->isp_confopts |= ISP_CFG_NONVRAM; 229 230 /* 231 * Mark things if we're a PTI SBus adapter. 232 */ 233 if (strcmp("PTI,ptisp", ofw_bus_get_name(dev)) == 0 || 234 strcmp("ptisp", ofw_bus_get_name(dev)) == 0) { 235 SDPARAM(isp, 0)->isp_ptisp = 1; 236 } 237 238 isp->isp_osinfo.fw = firmware_get("isp_1000"); 239 if (isp->isp_osinfo.fw) { 240 union { 241 const void *cp; 242 uint16_t *sp; 243 } stupid; 244 stupid.cp = isp->isp_osinfo.fw->data; 245 isp->isp_mdvec->dv_ispfw = stupid.sp; 246 } 247 248 tval = 0; 249 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 250 "fwload_disable", &tval) == 0 && tval != 0) { 251 isp->isp_confopts |= ISP_CFG_NORELOAD; 252 } 253 254 default_id = -1; 255 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 256 "iid", &tval) == 0) { 257 default_id = tval; 258 isp->isp_confopts |= ISP_CFG_OWNLOOPID; 259 } 260 if (default_id == -1) { 261 default_id = OF_getscsinitid(dev); 262 } 263 ISP_SPI_PC(isp, 0)->iid = default_id; 264 265 isp_debug = 0; 266 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 267 "debug", &isp_debug); 268 269 /* Make sure the lock is set up. */ 270 mtx_init(&isp->isp_osinfo.lock, "isp", NULL, MTX_DEF); 271 locksetup++; 272 273 sbs->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sbs->iqd, 274 RF_ACTIVE | RF_SHAREABLE); 275 if (sbs->irq == NULL) { 276 device_printf(dev, "could not allocate interrupt\n"); 277 goto bad; 278 } 279 280 if (isp_setup_intr(dev, sbs->irq, ISP_IFLAGS, NULL, isp_platform_intr, 281 isp, &sbs->ih)) { 282 device_printf(dev, "could not setup interrupt\n"); 283 goto bad; 284 } 285 ints_setup++; 286 287 /* 288 * Set up logging levels. 289 */ 290 if (isp_debug) { 291 isp->isp_dblev = isp_debug; 292 } else { 293 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR; 294 } 295 if (bootverbose) { 296 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO; 297 } 298 299 /* 300 * Make sure we're in reset state. 301 */ 302 ISP_LOCK(isp); 303 if (isp_reinit(isp, 1) != 0) { 304 isp_uninit(isp); 305 ISP_UNLOCK(isp); 306 goto bad; 307 } 308 ISP_UNLOCK(isp); 309 if (isp_attach(isp)) { 310 ISP_LOCK(isp); 311 isp_uninit(isp); 312 ISP_UNLOCK(isp); 313 goto bad; 314 } 315 return (0); 316 317 bad: 318 319 if (sbs && ints_setup) { 320 (void) bus_teardown_intr(dev, sbs->irq, sbs->ih); 321 } 322 323 if (sbs && sbs->irq) { 324 bus_release_resource(dev, SYS_RES_IRQ, sbs->iqd, sbs->irq); 325 } 326 327 if (locksetup && isp) { 328 mtx_destroy(&isp->isp_osinfo.lock); 329 } 330 331 if (sbs->regs) { 332 (void) bus_release_resource(dev, SYS_RES_MEMORY, sbs->rgd, 333 sbs->regs); 334 } 335 return (ENXIO); 336 } 337 338 static int 339 isp_sbus_detach(device_t dev) 340 { 341 struct isp_sbussoftc *sbs; 342 ispsoftc_t *isp; 343 int status; 344 345 sbs = device_get_softc(dev); 346 if (sbs == NULL) { 347 return (ENXIO); 348 } 349 isp = (ispsoftc_t *) sbs; 350 status = isp_detach(isp); 351 if (status) 352 return (status); 353 ISP_LOCK(isp); 354 isp_uninit(isp); 355 if (sbs->ih) { 356 (void) bus_teardown_intr(dev, sbs->irq, sbs->ih); 357 } 358 ISP_UNLOCK(isp); 359 mtx_destroy(&isp->isp_osinfo.lock); 360 (void) bus_release_resource(dev, SYS_RES_IRQ, sbs->iqd, sbs->irq); 361 (void) bus_release_resource(dev, SYS_RES_MEMORY, sbs->rgd, sbs->regs); 362 return (0); 363 } 364 365 #define IspVirt2Off(a, x) \ 366 (((struct isp_sbussoftc *)a)->sbus_poff[((x) & _BLK_REG_MASK) >> \ 367 _BLK_REG_SHFT] + ((x) & 0xff)) 368 369 #define BXR2(isp, off) bus_read_2((isp)->isp_regs, (off)) 370 371 static int 372 isp_sbus_rd_isr(ispsoftc_t *isp, uint16_t *isrp, uint16_t *semap, uint16_t *info) 373 { 374 uint16_t isr, sema; 375 376 isr = BXR2(isp, IspVirt2Off(isp, BIU_ISR)); 377 sema = BXR2(isp, IspVirt2Off(isp, BIU_SEMA)); 378 isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema); 379 isr &= INT_PENDING_MASK(isp); 380 sema &= BIU_SEMA_LOCK; 381 if (isr == 0 && sema == 0) { 382 return (0); 383 } 384 *isrp = isr; 385 if ((*semap = sema) != 0) 386 *info = BXR2(isp, IspVirt2Off(isp, OUTMAILBOX0)); 387 return (1); 388 } 389 390 static uint32_t 391 isp_sbus_rd_reg(ispsoftc_t *isp, int regoff) 392 { 393 uint16_t rval; 394 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *) isp; 395 int offset = sbs->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 396 offset += (regoff & 0xff); 397 rval = BXR2(isp, offset); 398 isp_prt(isp, ISP_LOGDEBUG3, 399 "isp_sbus_rd_reg(off %x) = %x", regoff, rval); 400 return (rval); 401 } 402 403 static void 404 isp_sbus_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val) 405 { 406 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *) isp; 407 int offset = sbs->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 408 offset += (regoff & 0xff); 409 isp_prt(isp, ISP_LOGDEBUG3, 410 "isp_sbus_wr_reg(off %x) = %x", regoff, val); 411 bus_write_2(isp->isp_regs, offset, val); 412 MEMORYBARRIER(isp, SYNC_REG, offset, 2, -1); 413 } 414 415 struct imush { 416 bus_addr_t maddr; 417 int error; 418 }; 419 420 static void imc(void *, bus_dma_segment_t *, int, int); 421 422 static void 423 imc(void *arg, bus_dma_segment_t *segs, int nseg, int error) 424 { 425 struct imush *imushp = (struct imush *) arg; 426 427 if (!(imushp->error = error)) 428 imushp->maddr = segs[0].ds_addr; 429 } 430 431 static int 432 isp_sbus_mbxdma(ispsoftc_t *isp) 433 { 434 caddr_t base; 435 uint32_t len; 436 int i, error; 437 struct imush im; 438 439 /* 440 * Already been here? If so, leave... 441 */ 442 if (isp->isp_rquest) { 443 return (0); 444 } 445 446 ISP_UNLOCK(isp); 447 448 len = sizeof (struct isp_pcmd) * isp->isp_maxcmds; 449 isp->isp_osinfo.pcmd_pool = (struct isp_pcmd *) 450 malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); 451 len = sizeof (isp_hdl_t *) * isp->isp_maxcmds; 452 isp->isp_xflist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); 453 for (len = 0; len < isp->isp_maxcmds - 1; len++) { 454 isp->isp_xflist[len].cmd = &isp->isp_xflist[len+1]; 455 } 456 isp->isp_xffree = isp->isp_xflist; 457 len = sizeof (bus_dmamap_t) * isp->isp_maxcmds; 458 459 if (isp_dma_tag_create(BUS_DMA_ROOTARG(ISP_SBD(isp)), 1, 460 BUS_SPACE_MAXADDR_24BIT+1, BUS_SPACE_MAXADDR_32BIT, 461 BUS_SPACE_MAXADDR_32BIT, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT, 462 ISP_NSEG_MAX, BUS_SPACE_MAXADDR_24BIT, 0, &isp->isp_osinfo.dmat)) { 463 isp_prt(isp, ISP_LOGERR, "could not create master dma tag"); 464 goto bad; 465 } 466 467 /* 468 * Allocate and map the request queue. 469 */ 470 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)); 471 if (isp_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, BUS_SPACE_MAXADDR_24BIT+1, 472 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 473 len, 1, len, 0, &isp->isp_osinfo.reqdmat)) { 474 isp_prt(isp, ISP_LOGERR, "cannot create request DMA tag"); 475 goto bad; 476 } 477 if (bus_dmamem_alloc(isp->isp_osinfo.reqdmat, (void **)&base, 478 BUS_DMA_COHERENT, &isp->isp_osinfo.reqmap) != 0) { 479 isp_prt(isp, ISP_LOGERR, "cannot allocate request DMA memory"); 480 bus_dma_tag_destroy(isp->isp_osinfo.reqdmat); 481 goto bad; 482 } 483 im.error = 0; 484 if (bus_dmamap_load(isp->isp_osinfo.reqdmat, isp->isp_osinfo.reqmap, 485 base, len, imc, &im, 0) || im.error) { 486 isp_prt(isp, ISP_LOGERR, "error loading request DMA map %d", im.error); 487 goto bad; 488 } 489 isp_prt(isp, ISP_LOGDEBUG0, "request area @ 0x%jx/0x%jx", 490 (uintmax_t)im.maddr, (uintmax_t)len); 491 isp->isp_rquest = base; 492 isp->isp_rquest_dma = im.maddr; 493 494 /* 495 * Allocate and map the result queue. 496 */ 497 len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp)); 498 if (isp_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, BUS_SPACE_MAXADDR_24BIT+1, 499 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 500 len, 1, len, 0, &isp->isp_osinfo.respdmat)) { 501 isp_prt(isp, ISP_LOGERR, "cannot create response DMA tag"); 502 goto bad; 503 } 504 if (bus_dmamem_alloc(isp->isp_osinfo.respdmat, (void **)&base, 505 BUS_DMA_COHERENT, &isp->isp_osinfo.respmap) != 0) { 506 isp_prt(isp, ISP_LOGERR, "cannot allocate response DMA memory"); 507 bus_dma_tag_destroy(isp->isp_osinfo.respdmat); 508 goto bad; 509 } 510 im.error = 0; 511 if (bus_dmamap_load(isp->isp_osinfo.respdmat, isp->isp_osinfo.respmap, 512 base, len, imc, &im, 0) || im.error) { 513 isp_prt(isp, ISP_LOGERR, "error loading response DMA map %d", im.error); 514 goto bad; 515 } 516 isp_prt(isp, ISP_LOGDEBUG0, "response area @ 0x%jx/0x%jx", 517 (uintmax_t)im.maddr, (uintmax_t)len); 518 isp->isp_result = base; 519 isp->isp_result_dma = im.maddr; 520 521 for (i = 0; i < isp->isp_maxcmds; i++) { 522 struct isp_pcmd *pcmd = &isp->isp_osinfo.pcmd_pool[i]; 523 error = bus_dmamap_create(isp->isp_osinfo.dmat, 0, &pcmd->dmap); 524 if (error) { 525 isp_prt(isp, ISP_LOGERR, 526 "error %d creating per-cmd DMA maps", error); 527 while (--i >= 0) { 528 bus_dmamap_destroy(isp->isp_osinfo.dmat, 529 isp->isp_osinfo.pcmd_pool[i].dmap); 530 } 531 goto bad; 532 } 533 callout_init_mtx(&pcmd->wdog, &isp->isp_osinfo.lock, 0); 534 if (i == isp->isp_maxcmds-1) { 535 pcmd->next = NULL; 536 } else { 537 pcmd->next = &isp->isp_osinfo.pcmd_pool[i+1]; 538 } 539 } 540 isp->isp_osinfo.pcmd_free = &isp->isp_osinfo.pcmd_pool[0]; 541 ISP_LOCK(isp); 542 return (0); 543 544 bad: 545 if (isp->isp_rquest_dma != 0) { 546 bus_dmamap_unload(isp->isp_osinfo.reqdmat, 547 isp->isp_osinfo.reqmap); 548 } 549 if (isp->isp_rquest != NULL) { 550 bus_dmamem_free(isp->isp_osinfo.reqdmat, isp->isp_rquest, 551 isp->isp_osinfo.reqmap); 552 bus_dma_tag_destroy(isp->isp_osinfo.reqdmat); 553 } 554 if (isp->isp_result_dma != 0) { 555 bus_dmamap_unload(isp->isp_osinfo.respdmat, 556 isp->isp_osinfo.respmap); 557 } 558 if (isp->isp_result != NULL) { 559 bus_dmamem_free(isp->isp_osinfo.respdmat, isp->isp_result, 560 isp->isp_osinfo.respmap); 561 bus_dma_tag_destroy(isp->isp_osinfo.respdmat); 562 } 563 free(isp->isp_xflist, M_DEVBUF); 564 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF); 565 isp->isp_rquest = NULL; 566 ISP_LOCK(isp); 567 return (1); 568 } 569 570 typedef struct { 571 ispsoftc_t *isp; 572 void *cmd_token; 573 void *rq; /* original request */ 574 int error; 575 bus_size_t mapsize; 576 } mush_t; 577 578 #define MUSHERR_NOQENTRIES -2 579 580 static void dma2(void *, bus_dma_segment_t *, int, int); 581 582 static void 583 dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 584 { 585 mush_t *mp; 586 ispsoftc_t *isp; 587 struct ccb_scsiio *csio; 588 isp_ddir_t ddir; 589 ispreq_t *rq; 590 591 mp = (mush_t *) arg; 592 if (error) { 593 mp->error = error; 594 return; 595 } 596 csio = mp->cmd_token; 597 isp = mp->isp; 598 rq = mp->rq; 599 if (nseg) { 600 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 601 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREREAD); 602 ddir = ISP_FROM_DEVICE; 603 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 604 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREWRITE); 605 ddir = ISP_TO_DEVICE; 606 } else { 607 ddir = ISP_NOXFR; 608 } 609 } else { 610 dm_segs = NULL; 611 nseg = 0; 612 ddir = ISP_NOXFR; 613 } 614 615 if (isp_send_cmd(isp, rq, dm_segs, nseg, XS_XFRLEN(csio), ddir, NULL) != CMD_QUEUED) { 616 mp->error = MUSHERR_NOQENTRIES; 617 } 618 } 619 620 static int 621 isp_sbus_dmasetup(ispsoftc_t *isp, struct ccb_scsiio *csio, void *ff) 622 { 623 mush_t mush, *mp; 624 void (*eptr)(void *, bus_dma_segment_t *, int, int); 625 int error; 626 627 mp = &mush; 628 mp->isp = isp; 629 mp->cmd_token = csio; 630 mp->rq = ff; 631 mp->error = 0; 632 mp->mapsize = 0; 633 634 eptr = dma2; 635 636 error = bus_dmamap_load_ccb(isp->isp_osinfo.dmat, 637 PISP_PCMD(csio)->dmap, (union ccb *)csio, eptr, mp, 0); 638 if (error == EINPROGRESS) { 639 bus_dmamap_unload(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap); 640 mp->error = EINVAL; 641 isp_prt(isp, ISP_LOGERR, 642 "deferred dma allocation not supported"); 643 } else if (error && mp->error == 0) { 644 #ifdef DIAGNOSTIC 645 isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error); 646 #endif 647 mp->error = error; 648 } 649 if (mp->error) { 650 int retval = CMD_COMPLETE; 651 if (mp->error == MUSHERR_NOQENTRIES) { 652 retval = CMD_EAGAIN; 653 } else if (mp->error == EFBIG) { 654 XS_SETERR(csio, CAM_REQ_TOO_BIG); 655 } else if (mp->error == EINVAL) { 656 XS_SETERR(csio, CAM_REQ_INVALID); 657 } else { 658 XS_SETERR(csio, CAM_UNREC_HBA_ERROR); 659 } 660 return (retval); 661 } 662 return (CMD_QUEUED); 663 } 664 665 static void 666 isp_sbus_reset0(ispsoftc_t *isp) 667 { 668 ISP_DISABLE_INTS(isp); 669 } 670 671 static void 672 isp_sbus_reset1(ispsoftc_t *isp) 673 { 674 ISP_ENABLE_INTS(isp); 675 } 676 677 static void 678 isp_sbus_dumpregs(ispsoftc_t *isp, const char *msg) 679 { 680 if (msg) 681 printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg); 682 else 683 printf("%s:\n", device_get_nameunit(isp->isp_dev)); 684 printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1)); 685 printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR), 686 ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA)); 687 printf("risc_hccr=%x\n", ISP_READ(isp, HCCR)); 688 689 690 ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE); 691 printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n", 692 ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS), 693 ISP_READ(isp, CDMA_FIFO_STS)); 694 printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n", 695 ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS), 696 ISP_READ(isp, DDMA_FIFO_STS)); 697 printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n", 698 ISP_READ(isp, SXP_INTERRUPT), 699 ISP_READ(isp, SXP_GROSS_ERR), 700 ISP_READ(isp, SXP_PINS_CTRL)); 701 ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE); 702 printf(" mbox regs: %x %x %x %x %x\n", 703 ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1), 704 ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3), 705 ISP_READ(isp, OUTMAILBOX4)); 706 } 707