1 /*- 2 * Copyright (c) 1997-2006 by Matthew Jacob 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice immediately at the beginning of the file, without modification, 10 * this list of conditions, and the following disclaimer. 11 * 2. The name of the author may not be used to endorse or promote products 12 * derived from this software without specific prior written permission. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 /* 27 * SBus specific probe and attach routines for Qlogic ISP SCSI adapters. 28 * FreeBSD Version. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/linker.h> 37 #include <sys/firmware.h> 38 #include <sys/bus.h> 39 #include <sys/kernel.h> 40 #include <sys/module.h> 41 #include <sys/resource.h> 42 43 #include <dev/ofw/ofw_bus.h> 44 #include <dev/ofw/openfirm.h> 45 46 #include <machine/bus.h> 47 #include <machine/ofw_machdep.h> 48 #include <machine/resource.h> 49 #include <sys/rman.h> 50 #include <sparc64/sbus/sbusvar.h> 51 52 #include <dev/isp/isp_freebsd.h> 53 54 static uint32_t isp_sbus_rd_reg(ispsoftc_t *, int); 55 static void isp_sbus_wr_reg(ispsoftc_t *, int, uint32_t); 56 static void isp_sbus_run_isr(ispsoftc_t *); 57 static int isp_sbus_mbxdma(ispsoftc_t *); 58 static void isp_sbus_mbxdmafree(ispsoftc_t *); 59 static int isp_sbus_dmasetup(ispsoftc_t *, XS_T *, void *); 60 static void isp_sbus_dumpregs(ispsoftc_t *, const char *); 61 62 static struct ispmdvec mdvec = { 63 isp_sbus_run_isr, 64 isp_sbus_rd_reg, 65 isp_sbus_wr_reg, 66 isp_sbus_mbxdma, 67 isp_sbus_dmasetup, 68 isp_common_dmateardown, 69 NULL, 70 isp_sbus_dumpregs, 71 NULL, 72 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64 73 }; 74 75 static int isp_sbus_probe (device_t); 76 static int isp_sbus_attach (device_t); 77 static int isp_sbus_detach (device_t); 78 79 80 #define ISP_SBD(isp) ((struct isp_sbussoftc *)isp)->sbus_dev 81 struct isp_sbussoftc { 82 ispsoftc_t sbus_isp; 83 device_t sbus_dev; 84 struct resource * regs; 85 void * irq; 86 int iqd; 87 int rgd; 88 void * ih; 89 int16_t sbus_poff[_NREG_BLKS]; 90 sdparam sbus_param; 91 struct isp_spi sbus_spi; 92 struct ispmdvec sbus_mdvec; 93 }; 94 95 96 static device_method_t isp_sbus_methods[] = { 97 /* Device interface */ 98 DEVMETHOD(device_probe, isp_sbus_probe), 99 DEVMETHOD(device_attach, isp_sbus_attach), 100 DEVMETHOD(device_detach, isp_sbus_detach), 101 { 0, 0 } 102 }; 103 104 static driver_t isp_sbus_driver = { 105 "isp", isp_sbus_methods, sizeof (struct isp_sbussoftc) 106 }; 107 static devclass_t isp_devclass; 108 DRIVER_MODULE(isp, sbus, isp_sbus_driver, isp_devclass, 0, 0); 109 MODULE_DEPEND(isp, cam, 1, 1, 1); 110 MODULE_DEPEND(isp, firmware, 1, 1, 1); 111 112 static int 113 isp_sbus_probe(device_t dev) 114 { 115 int found = 0; 116 const char *name = ofw_bus_get_name(dev); 117 if (strcmp(name, "SUNW,isp") == 0 || 118 strcmp(name, "QLGC,isp") == 0 || 119 strcmp(name, "ptisp") == 0 || 120 strcmp(name, "PTI,ptisp") == 0) { 121 found++; 122 } 123 if (!found) 124 return (ENXIO); 125 126 if (isp_announced == 0 && bootverbose) { 127 printf("Qlogic ISP Driver, FreeBSD Version %d.%d, " 128 "Core Version %d.%d\n", 129 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR, 130 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR); 131 isp_announced++; 132 } 133 return (0); 134 } 135 136 static int 137 isp_sbus_attach(device_t dev) 138 { 139 struct isp_sbussoftc *sbs = device_get_softc(dev); 140 ispsoftc_t *isp = &sbs->sbus_isp; 141 int tval, isp_debug, role, ispburst, default_id; 142 int ints_setup = 0; 143 144 sbs->sbus_dev = dev; 145 sbs->sbus_mdvec = mdvec; 146 isp->isp_dev = dev; 147 mtx_init(&isp->isp_osinfo.lock, "isp", NULL, MTX_DEF); 148 149 role = 0; 150 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 151 "role", &role) == 0 && 152 ((role & ~(ISP_ROLE_INITIATOR|ISP_ROLE_TARGET)) == 0)) { 153 device_printf(dev, "setting role to 0x%x\n", role); 154 } else { 155 role = ISP_DEFAULT_ROLES; 156 } 157 158 sbs->irq = sbs->regs = NULL; 159 sbs->rgd = sbs->iqd = 0; 160 161 sbs->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sbs->rgd, 162 RF_ACTIVE); 163 if (sbs->regs == NULL) { 164 device_printf(dev, "unable to map registers\n"); 165 goto bad; 166 } 167 168 sbs->sbus_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF; 169 sbs->sbus_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = SBUS_MBOX_REGS_OFF; 170 sbs->sbus_poff[SXP_BLOCK >> _BLK_REG_SHFT] = SBUS_SXP_REGS_OFF; 171 sbs->sbus_poff[RISC_BLOCK >> _BLK_REG_SHFT] = SBUS_RISC_REGS_OFF; 172 sbs->sbus_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF; 173 isp->isp_regs = sbs->regs; 174 isp->isp_mdvec = &sbs->sbus_mdvec; 175 isp->isp_bustype = ISP_BT_SBUS; 176 isp->isp_type = ISP_HA_SCSI_UNKNOWN; 177 isp->isp_param = &sbs->sbus_param; 178 isp->isp_osinfo.pc.ptr = &sbs->sbus_spi; 179 isp->isp_revision = 0; /* XXX */ 180 isp->isp_nchan = 1; 181 if (IS_FC(isp)) 182 ISP_FC_PC(isp, 0)->def_role = role; 183 184 /* 185 * Get the clock frequency and convert it from HZ to MHz, 186 * rounding up. This defaults to 25MHz if there isn't a 187 * device specific one in the OFW device tree. 188 */ 189 sbs->sbus_mdvec.dv_clock = (sbus_get_clockfreq(dev) + 500000)/1000000; 190 191 /* 192 * Now figure out what the proper burst sizes, etc., to use. 193 * Unfortunately, there is no ddi_dma_burstsizes here which 194 * walks up the tree finding the limiting burst size node (if 195 * any). We just use what's here for isp. 196 */ 197 ispburst = sbus_get_burstsz(dev); 198 if (ispburst == 0) { 199 ispburst = SBUS_BURST_32 - 1; 200 } 201 sbs->sbus_mdvec.dv_conf1 = 0; 202 if (ispburst & (1 << 5)) { 203 sbs->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_32; 204 } else if (ispburst & (1 << 4)) { 205 sbs->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_16; 206 } else if (ispburst & (1 << 3)) { 207 sbs->sbus_mdvec.dv_conf1 = 208 BIU_SBUS_CONF1_BURST8 | BIU_SBUS_CONF1_FIFO_8; 209 } 210 if (sbs->sbus_mdvec.dv_conf1) { 211 sbs->sbus_mdvec.dv_conf1 |= BIU_BURST_ENABLE; 212 } 213 214 /* 215 * We don't trust NVRAM on SBus cards 216 */ 217 isp->isp_confopts |= ISP_CFG_NONVRAM; 218 219 /* 220 * Mark things if we're a PTI SBus adapter. 221 */ 222 if (strcmp("PTI,ptisp", ofw_bus_get_name(dev)) == 0 || 223 strcmp("ptisp", ofw_bus_get_name(dev)) == 0) { 224 SDPARAM(isp, 0)->isp_ptisp = 1; 225 } 226 227 isp->isp_osinfo.fw = firmware_get("isp_1000"); 228 if (isp->isp_osinfo.fw) { 229 union { 230 const void *cp; 231 uint16_t *sp; 232 } stupid; 233 stupid.cp = isp->isp_osinfo.fw->data; 234 isp->isp_mdvec->dv_ispfw = stupid.sp; 235 } 236 237 tval = 0; 238 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 239 "fwload_disable", &tval) == 0 && tval != 0) { 240 isp->isp_confopts |= ISP_CFG_NORELOAD; 241 } 242 243 default_id = -1; 244 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 245 "iid", &tval) == 0) { 246 default_id = tval; 247 isp->isp_confopts |= ISP_CFG_OWNLOOPID; 248 } 249 if (default_id == -1) { 250 default_id = OF_getscsinitid(dev); 251 } 252 ISP_SPI_PC(isp, 0)->iid = default_id; 253 254 isp_debug = 0; 255 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 256 "debug", &isp_debug); 257 258 sbs->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sbs->iqd, 259 RF_ACTIVE | RF_SHAREABLE); 260 if (sbs->irq == NULL) { 261 device_printf(dev, "could not allocate interrupt\n"); 262 goto bad; 263 } 264 265 if (isp_setup_intr(dev, sbs->irq, ISP_IFLAGS, NULL, isp_platform_intr, 266 isp, &sbs->ih)) { 267 device_printf(dev, "could not setup interrupt\n"); 268 goto bad; 269 } 270 ints_setup++; 271 272 /* 273 * Set up logging levels. 274 */ 275 if (isp_debug) { 276 isp->isp_dblev = isp_debug; 277 } else { 278 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR; 279 } 280 if (bootverbose) { 281 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO; 282 } 283 284 /* 285 * Make sure we're in reset state. 286 */ 287 ISP_LOCK(isp); 288 if (isp_reinit(isp, 1) != 0) { 289 ISP_UNLOCK(isp); 290 goto bad; 291 } 292 ISP_UNLOCK(isp); 293 if (isp_attach(isp)) { 294 ISP_LOCK(isp); 295 isp_shutdown(isp); 296 ISP_UNLOCK(isp); 297 goto bad; 298 } 299 return (0); 300 301 bad: 302 303 if (sbs && ints_setup) { 304 (void) bus_teardown_intr(dev, sbs->irq, sbs->ih); 305 } 306 307 if (sbs && sbs->irq) { 308 bus_release_resource(dev, SYS_RES_IRQ, sbs->iqd, sbs->irq); 309 } 310 311 if (sbs->regs) { 312 (void) bus_release_resource(dev, SYS_RES_MEMORY, sbs->rgd, 313 sbs->regs); 314 } 315 mtx_destroy(&isp->isp_osinfo.lock); 316 return (ENXIO); 317 } 318 319 static int 320 isp_sbus_detach(device_t dev) 321 { 322 struct isp_sbussoftc *sbs = device_get_softc(dev); 323 ispsoftc_t *isp = &sbs->sbus_isp; 324 int status; 325 326 status = isp_detach(isp); 327 if (status) 328 return (status); 329 ISP_LOCK(isp); 330 isp_shutdown(isp); 331 ISP_UNLOCK(isp); 332 if (sbs->ih) 333 (void) bus_teardown_intr(dev, sbs->irq, sbs->ih); 334 (void) bus_release_resource(dev, SYS_RES_IRQ, sbs->iqd, sbs->irq); 335 (void) bus_release_resource(dev, SYS_RES_MEMORY, sbs->rgd, sbs->regs); 336 isp_sbus_mbxdmafree(isp); 337 mtx_destroy(&isp->isp_osinfo.lock); 338 return (0); 339 } 340 341 #define IspVirt2Off(a, x) \ 342 (((struct isp_sbussoftc *)a)->sbus_poff[((x) & _BLK_REG_MASK) >> \ 343 _BLK_REG_SHFT] + ((x) & 0xff)) 344 345 #define BXR2(isp, off) bus_read_2((isp)->isp_regs, (off)) 346 347 static void 348 isp_sbus_run_isr(ispsoftc_t *isp) 349 { 350 uint16_t isr, sema, info; 351 352 isr = BXR2(isp, IspVirt2Off(isp, BIU_ISR)); 353 sema = BXR2(isp, IspVirt2Off(isp, BIU_SEMA)); 354 isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema); 355 isr &= INT_PENDING_MASK(isp); 356 sema &= BIU_SEMA_LOCK; 357 if (isr == 0 && sema == 0) 358 return; 359 if (sema != 0) { 360 info = BXR2(isp, IspVirt2Off(isp, OUTMAILBOX0)); 361 if (info & MBOX_COMMAND_COMPLETE) 362 isp_intr_mbox(isp, info); 363 else 364 isp_intr_async(isp, info); 365 if (isp->isp_state == ISP_RUNSTATE) 366 isp_intr_respq(isp); 367 } else 368 isp_intr_respq(isp); 369 ISP_WRITE(isp, HCCR, HCCR_CMD_CLEAR_RISC_INT); 370 if (sema) 371 ISP_WRITE(isp, BIU_SEMA, 0); 372 } 373 374 static uint32_t 375 isp_sbus_rd_reg(ispsoftc_t *isp, int regoff) 376 { 377 uint16_t rval; 378 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *) isp; 379 int offset = sbs->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 380 offset += (regoff & 0xff); 381 rval = BXR2(isp, offset); 382 isp_prt(isp, ISP_LOGDEBUG3, 383 "isp_sbus_rd_reg(off %x) = %x", regoff, rval); 384 return (rval); 385 } 386 387 static void 388 isp_sbus_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val) 389 { 390 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *) isp; 391 int offset = sbs->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 392 offset += (regoff & 0xff); 393 isp_prt(isp, ISP_LOGDEBUG3, 394 "isp_sbus_wr_reg(off %x) = %x", regoff, val); 395 bus_write_2(isp->isp_regs, offset, val); 396 MEMORYBARRIER(isp, SYNC_REG, offset, 2, -1); 397 } 398 399 struct imush { 400 bus_addr_t maddr; 401 int error; 402 }; 403 404 static void imc(void *, bus_dma_segment_t *, int, int); 405 406 static void 407 imc(void *arg, bus_dma_segment_t *segs, int nseg, int error) 408 { 409 struct imush *imushp = (struct imush *) arg; 410 411 if (!(imushp->error = error)) 412 imushp->maddr = segs[0].ds_addr; 413 } 414 415 static int 416 isp_sbus_mbxdma(ispsoftc_t *isp) 417 { 418 caddr_t base; 419 uint32_t len; 420 int i, error; 421 struct imush im; 422 423 /* Already been here? If so, leave... */ 424 if (isp->isp_xflist != NULL) 425 return (0); 426 if (isp->isp_rquest != NULL && isp->isp_maxcmds == 0) 427 return (0); 428 ISP_UNLOCK(isp); 429 if (isp->isp_rquest != NULL) 430 goto gotmaxcmds; 431 432 if (isp_dma_tag_create(BUS_DMA_ROOTARG(ISP_SBD(isp)), 1, 433 BUS_SPACE_MAXADDR_24BIT+1, BUS_SPACE_MAXADDR_32BIT, 434 BUS_SPACE_MAXADDR_32BIT, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT, 435 ISP_NSEG_MAX, BUS_SPACE_MAXADDR_24BIT, 0, &isp->isp_osinfo.dmat)) { 436 isp_prt(isp, ISP_LOGERR, "could not create master dma tag"); 437 goto bad; 438 } 439 440 /* 441 * Allocate and map the request queue. 442 */ 443 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)); 444 if (isp_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, BUS_SPACE_MAXADDR_24BIT+1, 445 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 446 len, 1, len, 0, &isp->isp_osinfo.reqdmat)) { 447 isp_prt(isp, ISP_LOGERR, "cannot create request DMA tag"); 448 goto bad; 449 } 450 if (bus_dmamem_alloc(isp->isp_osinfo.reqdmat, (void **)&base, 451 BUS_DMA_COHERENT, &isp->isp_osinfo.reqmap) != 0) { 452 isp_prt(isp, ISP_LOGERR, "cannot allocate request DMA memory"); 453 bus_dma_tag_destroy(isp->isp_osinfo.reqdmat); 454 goto bad; 455 } 456 isp->isp_rquest = base; 457 im.error = 0; 458 if (bus_dmamap_load(isp->isp_osinfo.reqdmat, isp->isp_osinfo.reqmap, 459 base, len, imc, &im, 0) || im.error) { 460 isp_prt(isp, ISP_LOGERR, "error loading request DMA map %d", im.error); 461 goto bad; 462 } 463 isp_prt(isp, ISP_LOGDEBUG0, "request area @ 0x%jx/0x%jx", 464 (uintmax_t)im.maddr, (uintmax_t)len); 465 isp->isp_rquest_dma = im.maddr; 466 467 /* 468 * Allocate and map the result queue. 469 */ 470 len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp)); 471 if (isp_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, BUS_SPACE_MAXADDR_24BIT+1, 472 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 473 len, 1, len, 0, &isp->isp_osinfo.respdmat)) { 474 isp_prt(isp, ISP_LOGERR, "cannot create response DMA tag"); 475 goto bad; 476 } 477 if (bus_dmamem_alloc(isp->isp_osinfo.respdmat, (void **)&base, 478 BUS_DMA_COHERENT, &isp->isp_osinfo.respmap) != 0) { 479 isp_prt(isp, ISP_LOGERR, "cannot allocate response DMA memory"); 480 bus_dma_tag_destroy(isp->isp_osinfo.respdmat); 481 goto bad; 482 } 483 isp->isp_result = base; 484 im.error = 0; 485 if (bus_dmamap_load(isp->isp_osinfo.respdmat, isp->isp_osinfo.respmap, 486 base, len, imc, &im, 0) || im.error) { 487 isp_prt(isp, ISP_LOGERR, "error loading response DMA map %d", im.error); 488 goto bad; 489 } 490 isp_prt(isp, ISP_LOGDEBUG0, "response area @ 0x%jx/0x%jx", 491 (uintmax_t)im.maddr, (uintmax_t)len); 492 isp->isp_result_dma = im.maddr; 493 494 if (isp->isp_maxcmds == 0) { 495 ISP_LOCK(isp); 496 return (0); 497 } 498 499 gotmaxcmds: 500 len = sizeof (struct isp_pcmd) * isp->isp_maxcmds; 501 isp->isp_osinfo.pcmd_pool = (struct isp_pcmd *) 502 malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); 503 for (i = 0; i < isp->isp_maxcmds; i++) { 504 struct isp_pcmd *pcmd = &isp->isp_osinfo.pcmd_pool[i]; 505 error = bus_dmamap_create(isp->isp_osinfo.dmat, 0, &pcmd->dmap); 506 if (error) { 507 isp_prt(isp, ISP_LOGERR, 508 "error %d creating per-cmd DMA maps", error); 509 while (--i >= 0) { 510 bus_dmamap_destroy(isp->isp_osinfo.dmat, 511 isp->isp_osinfo.pcmd_pool[i].dmap); 512 } 513 goto bad; 514 } 515 callout_init_mtx(&pcmd->wdog, &isp->isp_osinfo.lock, 0); 516 if (i == isp->isp_maxcmds-1) { 517 pcmd->next = NULL; 518 } else { 519 pcmd->next = &isp->isp_osinfo.pcmd_pool[i+1]; 520 } 521 } 522 isp->isp_osinfo.pcmd_free = &isp->isp_osinfo.pcmd_pool[0]; 523 524 len = sizeof (isp_hdl_t *) * isp->isp_maxcmds; 525 isp->isp_xflist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); 526 for (len = 0; len < isp->isp_maxcmds - 1; len++) 527 isp->isp_xflist[len].cmd = &isp->isp_xflist[len+1]; 528 isp->isp_xffree = isp->isp_xflist; 529 530 ISP_LOCK(isp); 531 return (0); 532 533 bad: 534 isp_sbus_mbxdmafree(isp); 535 ISP_LOCK(isp); 536 return (1); 537 } 538 539 static void 540 isp_sbus_mbxdmafree(ispsoftc_t *isp) 541 { 542 int i; 543 544 if (isp->isp_xflist != NULL) { 545 free(isp->isp_xflist, M_DEVBUF); 546 isp->isp_xflist = NULL; 547 } 548 if (isp->isp_osinfo.pcmd_pool != NULL) { 549 for (i = 0; i < isp->isp_maxcmds; i++) { 550 bus_dmamap_destroy(isp->isp_osinfo.dmat, 551 isp->isp_osinfo.pcmd_pool[i].dmap); 552 } 553 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF); 554 isp->isp_osinfo.pcmd_pool = NULL; 555 } 556 if (isp->isp_result_dma != 0) { 557 bus_dmamap_unload(isp->isp_osinfo.respdmat, 558 isp->isp_osinfo.respmap); 559 isp->isp_result_dma = 0; 560 } 561 if (isp->isp_result != NULL) { 562 bus_dmamem_free(isp->isp_osinfo.respdmat, isp->isp_result, 563 isp->isp_osinfo.respmap); 564 bus_dma_tag_destroy(isp->isp_osinfo.respdmat); 565 isp->isp_result = NULL; 566 } 567 if (isp->isp_rquest_dma != 0) { 568 bus_dmamap_unload(isp->isp_osinfo.reqdmat, 569 isp->isp_osinfo.reqmap); 570 isp->isp_rquest_dma = 0; 571 } 572 if (isp->isp_rquest != NULL) { 573 bus_dmamem_free(isp->isp_osinfo.reqdmat, isp->isp_rquest, 574 isp->isp_osinfo.reqmap); 575 bus_dma_tag_destroy(isp->isp_osinfo.reqdmat); 576 isp->isp_rquest = NULL; 577 } 578 } 579 580 typedef struct { 581 ispsoftc_t *isp; 582 void *cmd_token; 583 void *rq; /* original request */ 584 int error; 585 bus_size_t mapsize; 586 } mush_t; 587 588 #define MUSHERR_NOQENTRIES -2 589 590 static void dma2(void *, bus_dma_segment_t *, int, int); 591 592 static void 593 dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 594 { 595 mush_t *mp; 596 ispsoftc_t *isp; 597 struct ccb_scsiio *csio; 598 isp_ddir_t ddir; 599 ispreq_t *rq; 600 601 mp = (mush_t *) arg; 602 if (error) { 603 mp->error = error; 604 return; 605 } 606 csio = mp->cmd_token; 607 isp = mp->isp; 608 rq = mp->rq; 609 if (nseg) { 610 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 611 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREREAD); 612 ddir = ISP_FROM_DEVICE; 613 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 614 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREWRITE); 615 ddir = ISP_TO_DEVICE; 616 } else { 617 ddir = ISP_NOXFR; 618 } 619 } else { 620 dm_segs = NULL; 621 nseg = 0; 622 ddir = ISP_NOXFR; 623 } 624 625 if (isp_send_cmd(isp, rq, dm_segs, nseg, XS_XFRLEN(csio), ddir, NULL) != CMD_QUEUED) { 626 mp->error = MUSHERR_NOQENTRIES; 627 } 628 } 629 630 static int 631 isp_sbus_dmasetup(ispsoftc_t *isp, struct ccb_scsiio *csio, void *ff) 632 { 633 mush_t mush, *mp; 634 void (*eptr)(void *, bus_dma_segment_t *, int, int); 635 int error; 636 637 mp = &mush; 638 mp->isp = isp; 639 mp->cmd_token = csio; 640 mp->rq = ff; 641 mp->error = 0; 642 mp->mapsize = 0; 643 644 eptr = dma2; 645 646 error = bus_dmamap_load_ccb(isp->isp_osinfo.dmat, 647 PISP_PCMD(csio)->dmap, (union ccb *)csio, eptr, mp, 0); 648 if (error == EINPROGRESS) { 649 bus_dmamap_unload(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap); 650 mp->error = EINVAL; 651 isp_prt(isp, ISP_LOGERR, 652 "deferred dma allocation not supported"); 653 } else if (error && mp->error == 0) { 654 #ifdef DIAGNOSTIC 655 isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error); 656 #endif 657 mp->error = error; 658 } 659 if (mp->error) { 660 int retval = CMD_COMPLETE; 661 if (mp->error == MUSHERR_NOQENTRIES) { 662 retval = CMD_EAGAIN; 663 } else if (mp->error == EFBIG) { 664 XS_SETERR(csio, CAM_REQ_TOO_BIG); 665 } else if (mp->error == EINVAL) { 666 XS_SETERR(csio, CAM_REQ_INVALID); 667 } else { 668 XS_SETERR(csio, CAM_UNREC_HBA_ERROR); 669 } 670 return (retval); 671 } 672 return (CMD_QUEUED); 673 } 674 675 static void 676 isp_sbus_dumpregs(ispsoftc_t *isp, const char *msg) 677 { 678 if (msg) 679 printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg); 680 else 681 printf("%s:\n", device_get_nameunit(isp->isp_dev)); 682 printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1)); 683 printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR), 684 ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA)); 685 printf("risc_hccr=%x\n", ISP_READ(isp, HCCR)); 686 687 688 ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE); 689 printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n", 690 ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS), 691 ISP_READ(isp, CDMA_FIFO_STS)); 692 printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n", 693 ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS), 694 ISP_READ(isp, DDMA_FIFO_STS)); 695 printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n", 696 ISP_READ(isp, SXP_INTERRUPT), 697 ISP_READ(isp, SXP_GROSS_ERR), 698 ISP_READ(isp, SXP_PINS_CTRL)); 699 ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE); 700 printf(" mbox regs: %x %x %x %x %x\n", 701 ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1), 702 ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3), 703 ISP_READ(isp, OUTMAILBOX4)); 704 } 705