1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 1997,1998 Maxim Bolotin and Oleg Sharoiko. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 /* 35 * 36 * Device driver for Crystal Semiconductor CS8920 based ethernet 37 * adapters. By Maxim Bolotin and Oleg Sharoiko, 27-April-1997 38 */ 39 40 /* 41 #define CS_DEBUG 42 */ 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/malloc.h> 47 #include <sys/mbuf.h> 48 #include <sys/socket.h> 49 #include <sys/sockio.h> 50 #include <sys/kernel.h> 51 #include <sys/sysctl.h> 52 #include <sys/syslog.h> 53 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #include <machine/bus.h> 57 #include <sys/rman.h> 58 #include <machine/resource.h> 59 60 #include <net/if.h> 61 #include <net/if_var.h> 62 #include <net/if_arp.h> 63 #include <net/if_dl.h> 64 #include <net/if_media.h> 65 #include <net/if_types.h> 66 #include <net/ethernet.h> 67 #include <net/bpf.h> 68 69 #include <dev/cs/if_csvar.h> 70 #include <dev/cs/if_csreg.h> 71 72 #ifdef CS_USE_64K_DMA 73 #define CS_DMA_BUFFER_SIZE 65536 74 #else 75 #define CS_DMA_BUFFER_SIZE 16384 76 #endif 77 78 static void cs_init(void *); 79 static void cs_init_locked(struct cs_softc *); 80 static int cs_ioctl(struct ifnet *, u_long, caddr_t); 81 static void cs_start(struct ifnet *); 82 static void cs_start_locked(struct ifnet *); 83 static void cs_stop(struct cs_softc *); 84 static void cs_reset(struct cs_softc *); 85 static void cs_watchdog(void *); 86 87 static int cs_mediachange(struct ifnet *); 88 static void cs_mediastatus(struct ifnet *, struct ifmediareq *); 89 static int cs_mediaset(struct cs_softc *, int); 90 91 static void cs_write_mbufs(struct cs_softc*, struct mbuf*); 92 static void cs_xmit_buf(struct cs_softc*); 93 static int cs_get_packet(struct cs_softc*); 94 static void cs_setmode(struct cs_softc*); 95 96 static int get_eeprom_data(struct cs_softc *sc, int, int, uint16_t *); 97 static int get_eeprom_cksum(int, int, uint16_t *); 98 static int wait_eeprom_ready( struct cs_softc *); 99 static void control_dc_dc( struct cs_softc *, int ); 100 static int enable_tp(struct cs_softc *); 101 static int enable_aui(struct cs_softc *); 102 static int enable_bnc(struct cs_softc *); 103 static int cs_duplex_auto(struct cs_softc *); 104 105 devclass_t cs_devclass; 106 driver_intr_t csintr; 107 108 /* sysctl vars */ 109 static SYSCTL_NODE(_hw, OID_AUTO, cs, CTLFLAG_RD, 0, "cs device parameters"); 110 111 int cs_ignore_cksum_failure = 0; 112 SYSCTL_INT(_hw_cs, OID_AUTO, ignore_checksum_failure, CTLFLAG_RWTUN, 113 &cs_ignore_cksum_failure, 0, 114 "ignore checksum errors in cs card EEPROM"); 115 116 static int cs_recv_delay = 570; 117 SYSCTL_INT(_hw_cs, OID_AUTO, recv_delay, CTLFLAG_RWTUN, &cs_recv_delay, 570, ""); 118 119 static int cs8900_eeint2irq[16] = { 120 10, 11, 12, 5, 255, 255, 255, 255, 121 255, 255, 255, 255, 255, 255, 255, 255 122 }; 123 124 static int cs8900_irq2eeint[16] = { 125 255, 255, 255, 255, 255, 3, 255, 255, 126 255, 0, 1, 2, 255, 255, 255, 255 127 }; 128 129 static int 130 get_eeprom_data(struct cs_softc *sc, int off, int len, uint16_t *buffer) 131 { 132 int i; 133 134 #ifdef CS_DEBUG 135 device_printf(sc->dev, "EEPROM data from %x for %x:\n", off, len); 136 #endif 137 for (i=0; i < len; i++) { 138 if (wait_eeprom_ready(sc) < 0) 139 return (-1); 140 /* Send command to EEPROM to read */ 141 cs_writereg(sc, PP_EECMD, (off + i) | EEPROM_READ_CMD); 142 if (wait_eeprom_ready(sc) < 0) 143 return (-1); 144 buffer[i] = cs_readreg(sc, PP_EEData); 145 146 #ifdef CS_DEBUG 147 printf("%04x ",buffer[i]); 148 #endif 149 } 150 151 #ifdef CS_DEBUG 152 printf("\n"); 153 #endif 154 return (0); 155 } 156 157 static int 158 get_eeprom_cksum(int off, int len, uint16_t *buffer) 159 { 160 int i; 161 uint16_t cksum=0; 162 163 for (i = 0; i < len; i++) 164 cksum += buffer[i]; 165 cksum &= 0xffff; 166 if (cksum == 0 || cs_ignore_cksum_failure) 167 return (0); 168 return (-1); 169 } 170 171 static int 172 wait_eeprom_ready(struct cs_softc *sc) 173 { 174 int i; 175 176 /* 177 * From the CS8900A datasheet, section 3.5.2: 178 * "Before issuing any command to the EEPROM, the host must wait 179 * for the SIBUSY bit (Register 16, SelfST, bit 8) to clear. After 180 * each command has been issued, the host must wait again for SIBUSY 181 * to clear." 182 * 183 * Before we issue the command, we should be !busy, so that will 184 * be fast. The datasheet suggests that clock out from the part 185 * per word will be on the order of 25us, which is consistent with 186 * the 1MHz serial clock and 16bits... We should never hit 100, 187 * let alone 15,000 here. The original code did an unconditional 188 * 30ms DELAY here. Bad Kharma. cs_readreg takes ~2us. 189 */ 190 for (i = 0; i < 15000; i++) /* 30ms max */ 191 if (!(cs_readreg(sc, PP_SelfST) & SI_BUSY)) 192 return (0); 193 return (1); 194 } 195 196 static void 197 control_dc_dc(struct cs_softc *sc, int on_not_off) 198 { 199 unsigned int self_control = HCB1_ENBL; 200 201 if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0) ^ on_not_off) 202 self_control |= HCB1; 203 else 204 self_control &= ~HCB1; 205 cs_writereg(sc, PP_SelfCTL, self_control); 206 DELAY(500000); /* Bad! */ 207 } 208 209 210 static int 211 cs_duplex_auto(struct cs_softc *sc) 212 { 213 int i, error=0; 214 215 cs_writereg(sc, PP_AutoNegCTL, 216 RE_NEG_NOW | ALLOW_FDX | AUTO_NEG_ENABLE); 217 for (i=0; cs_readreg(sc, PP_AutoNegST) & AUTO_NEG_BUSY; i++) { 218 if (i > 4000) { 219 device_printf(sc->dev, 220 "full/half duplex auto negotiation timeout\n"); 221 error = ETIMEDOUT; 222 break; 223 } 224 DELAY(1000); 225 } 226 return (error); 227 } 228 229 static int 230 enable_tp(struct cs_softc *sc) 231 { 232 233 cs_writereg(sc, PP_LineCTL, sc->line_ctl & ~AUI_ONLY); 234 control_dc_dc(sc, 0); 235 return (0); 236 } 237 238 static int 239 enable_aui(struct cs_softc *sc) 240 { 241 242 cs_writereg(sc, PP_LineCTL, 243 (sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY); 244 control_dc_dc(sc, 0); 245 return (0); 246 } 247 248 static int 249 enable_bnc(struct cs_softc *sc) 250 { 251 252 cs_writereg(sc, PP_LineCTL, 253 (sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY); 254 control_dc_dc(sc, 1); 255 return (0); 256 } 257 258 int 259 cs_cs89x0_probe(device_t dev) 260 { 261 int i; 262 int error; 263 rman_res_t irq, junk; 264 struct cs_softc *sc = device_get_softc(dev); 265 unsigned rev_type = 0; 266 uint16_t id; 267 char chip_revision; 268 uint16_t eeprom_buff[CHKSUM_LEN]; 269 int chip_type, pp_isaint; 270 271 sc->dev = dev; 272 error = cs_alloc_port(dev, 0, CS_89x0_IO_PORTS); 273 if (error) 274 return (error); 275 276 if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG) { 277 /* Chip not detected. Let's try to reset it */ 278 if (bootverbose) 279 device_printf(dev, "trying to reset the chip.\n"); 280 cs_outw(sc, ADD_PORT, PP_SelfCTL); 281 i = cs_inw(sc, DATA_PORT); 282 cs_outw(sc, ADD_PORT, PP_SelfCTL); 283 cs_outw(sc, DATA_PORT, i | POWER_ON_RESET); 284 if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG) 285 return (ENXIO); 286 } 287 288 for (i = 0; i < 10000; i++) { 289 id = cs_readreg(sc, PP_ChipID); 290 if (id == CHIP_EISA_ID_SIG) 291 break; 292 } 293 if (i == 10000) 294 return (ENXIO); 295 296 rev_type = cs_readreg(sc, PRODUCT_ID_ADD); 297 chip_type = rev_type & ~REVISON_BITS; 298 chip_revision = ((rev_type & REVISON_BITS) >> 8) + 'A'; 299 300 sc->chip_type = chip_type; 301 302 if (chip_type == CS8900) { 303 pp_isaint = PP_CS8900_ISAINT; 304 sc->send_cmd = TX_CS8900_AFTER_ALL; 305 } else { 306 pp_isaint = PP_CS8920_ISAINT; 307 sc->send_cmd = TX_CS8920_AFTER_ALL; 308 } 309 310 /* 311 * Clear some fields so that fail of EEPROM will left them clean 312 */ 313 sc->auto_neg_cnf = 0; 314 sc->adapter_cnf = 0; 315 sc->isa_config = 0; 316 317 /* 318 * If no interrupt specified, use what the board tells us. 319 */ 320 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk); 321 322 /* 323 * Get data from EEPROM 324 */ 325 if((cs_readreg(sc, PP_SelfST) & EEPROM_PRESENT) == 0) { 326 device_printf(dev, "No EEPROM, assuming defaults.\n"); 327 } else if (get_eeprom_data(sc,START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) { 328 device_printf(dev, "EEPROM read failed, assuming defaults.\n"); 329 } else if (get_eeprom_cksum(START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) { 330 device_printf(dev, "EEPROM cheksum bad, assuming defaults.\n"); 331 } else { 332 sc->auto_neg_cnf = eeprom_buff[AUTO_NEG_CNF_OFFSET]; 333 sc->adapter_cnf = eeprom_buff[ADAPTER_CNF_OFFSET]; 334 sc->isa_config = eeprom_buff[ISA_CNF_OFFSET]; 335 for (i=0; i<ETHER_ADDR_LEN/2; i++) { 336 sc->enaddr[i*2] = eeprom_buff[i]; 337 sc->enaddr[i*2+1] = eeprom_buff[i] >> 8; 338 } 339 /* 340 * If no interrupt specified, use what the 341 * board tells us. 342 */ 343 if (error) { 344 irq = sc->isa_config & INT_NO_MASK; 345 error = 0; 346 if (chip_type == CS8900) { 347 irq = cs8900_eeint2irq[irq]; 348 } else { 349 if (irq > CS8920_NO_INTS) 350 irq = 255; 351 } 352 if (irq == 255) { 353 device_printf(dev, "invalid irq in EEPROM.\n"); 354 error = EINVAL; 355 } 356 if (!error) 357 bus_set_resource(dev, SYS_RES_IRQ, 0, 358 irq, 1); 359 } 360 } 361 362 if (!error && !(sc->flags & CS_NO_IRQ)) { 363 if (chip_type == CS8900) { 364 if (irq < 16) 365 irq = cs8900_irq2eeint[irq]; 366 else 367 irq = 255; 368 } else { 369 if (irq > CS8920_NO_INTS) 370 irq = 255; 371 } 372 if (irq == 255) 373 error = EINVAL; 374 } 375 376 if (error) { 377 device_printf(dev, "Unknown or invalid irq\n"); 378 return (error); 379 } 380 381 if (!(sc->flags & CS_NO_IRQ)) 382 cs_writereg(sc, pp_isaint, irq); 383 384 if (bootverbose) 385 device_printf(dev, "CS89%c0%s rev %c media%s%s%s\n", 386 chip_type == CS8900 ? '0' : '2', 387 chip_type == CS8920M ? "M" : "", 388 chip_revision, 389 (sc->adapter_cnf & A_CNF_10B_T) ? " TP" : "", 390 (sc->adapter_cnf & A_CNF_AUI) ? " AUI" : "", 391 (sc->adapter_cnf & A_CNF_10B_2) ? " BNC" : ""); 392 393 if ((sc->adapter_cnf & A_CNF_EXTND_10B_2) && 394 (sc->adapter_cnf & A_CNF_LOW_RX_SQUELCH)) 395 sc->line_ctl = LOW_RX_SQUELCH; 396 else 397 sc->line_ctl = 0; 398 399 return (0); 400 } 401 402 /* 403 * Allocate a port resource with the given resource id. 404 */ 405 int 406 cs_alloc_port(device_t dev, int rid, int size) 407 { 408 struct cs_softc *sc = device_get_softc(dev); 409 struct resource *res; 410 411 res = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT, &rid, 412 size, RF_ACTIVE); 413 if (res == NULL) 414 return (ENOENT); 415 sc->port_rid = rid; 416 sc->port_res = res; 417 return (0); 418 } 419 420 /* 421 * Allocate an irq resource with the given resource id. 422 */ 423 int 424 cs_alloc_irq(device_t dev, int rid) 425 { 426 struct cs_softc *sc = device_get_softc(dev); 427 struct resource *res; 428 429 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); 430 if (res == NULL) 431 return (ENOENT); 432 sc->irq_rid = rid; 433 sc->irq_res = res; 434 return (0); 435 } 436 437 /* 438 * Release all resources 439 */ 440 void 441 cs_release_resources(device_t dev) 442 { 443 struct cs_softc *sc = device_get_softc(dev); 444 445 if (sc->port_res) { 446 bus_release_resource(dev, SYS_RES_IOPORT, 447 sc->port_rid, sc->port_res); 448 sc->port_res = 0; 449 } 450 if (sc->irq_res) { 451 bus_release_resource(dev, SYS_RES_IRQ, 452 sc->irq_rid, sc->irq_res); 453 sc->irq_res = 0; 454 } 455 } 456 457 /* 458 * Install the interface into kernel networking data structures 459 */ 460 int 461 cs_attach(device_t dev) 462 { 463 int error, media=0; 464 struct cs_softc *sc = device_get_softc(dev); 465 struct ifnet *ifp; 466 467 sc->dev = dev; 468 469 ifp = sc->ifp = if_alloc(IFT_ETHER); 470 if (ifp == NULL) { 471 device_printf(dev, "can not if_alloc()\n"); 472 cs_release_resources(dev); 473 return (ENOMEM); 474 } 475 476 mtx_init(&sc->lock, device_get_nameunit(dev), MTX_NETWORK_LOCK, 477 MTX_DEF); 478 callout_init_mtx(&sc->timer, &sc->lock, 0); 479 480 CS_LOCK(sc); 481 cs_stop(sc); 482 CS_UNLOCK(sc); 483 484 ifp->if_softc=sc; 485 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 486 ifp->if_start=cs_start; 487 ifp->if_ioctl=cs_ioctl; 488 ifp->if_init=cs_init; 489 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 490 491 ifp->if_flags=(IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); 492 493 /* 494 * this code still in progress (DMA support) 495 * 496 497 sc->recv_ring=malloc(CS_DMA_BUFFER_SIZE<<1, M_DEVBUF, M_NOWAIT); 498 if (sc->recv_ring == NULL) { 499 log(LOG_ERR, 500 "%s: Couldn't allocate memory for NIC\n", ifp->if_xname); 501 return(0); 502 } 503 if ((sc->recv_ring-(sc->recv_ring & 0x1FFFF)) 504 < (128*1024-CS_DMA_BUFFER_SIZE)) 505 sc->recv_ring+=16*1024; 506 507 */ 508 509 sc->buffer=malloc(ETHER_MAX_LEN-ETHER_CRC_LEN,M_DEVBUF,M_NOWAIT); 510 if (sc->buffer == NULL) { 511 device_printf(sc->dev, "Couldn't allocate memory for NIC\n"); 512 if_free(ifp); 513 mtx_destroy(&sc->lock); 514 cs_release_resources(dev); 515 return(ENOMEM); 516 } 517 518 /* 519 * Initialize the media structures. 520 */ 521 ifmedia_init(&sc->media, 0, cs_mediachange, cs_mediastatus); 522 523 if (sc->adapter_cnf & A_CNF_10B_T) { 524 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_T, 0, NULL); 525 if (sc->chip_type != CS8900) { 526 ifmedia_add(&sc->media, 527 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 528 ifmedia_add(&sc->media, 529 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 530 } 531 } 532 533 if (sc->adapter_cnf & A_CNF_10B_2) 534 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_2, 0, NULL); 535 536 if (sc->adapter_cnf & A_CNF_AUI) 537 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_5, 0, NULL); 538 539 if (sc->adapter_cnf & A_CNF_MEDIA) 540 ifmedia_add(&sc->media, IFM_ETHER|IFM_AUTO, 0, NULL); 541 542 /* Set default media from EEPROM */ 543 switch (sc->adapter_cnf & A_CNF_MEDIA_TYPE) { 544 case A_CNF_MEDIA_AUTO: media = IFM_ETHER|IFM_AUTO; break; 545 case A_CNF_MEDIA_10B_T: media = IFM_ETHER|IFM_10_T; break; 546 case A_CNF_MEDIA_10B_2: media = IFM_ETHER|IFM_10_2; break; 547 case A_CNF_MEDIA_AUI: media = IFM_ETHER|IFM_10_5; break; 548 default: 549 device_printf(sc->dev, "no media, assuming 10baseT\n"); 550 sc->adapter_cnf |= A_CNF_10B_T; 551 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_T, 0, NULL); 552 if (sc->chip_type != CS8900) { 553 ifmedia_add(&sc->media, 554 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 555 ifmedia_add(&sc->media, 556 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 557 } 558 media = IFM_ETHER | IFM_10_T; 559 break; 560 } 561 ifmedia_set(&sc->media, media); 562 cs_mediaset(sc, media); 563 564 ether_ifattach(ifp, sc->enaddr); 565 566 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, 567 NULL, csintr, sc, &sc->irq_handle); 568 if (error) { 569 ether_ifdetach(ifp); 570 free(sc->buffer, M_DEVBUF); 571 if_free(ifp); 572 mtx_destroy(&sc->lock); 573 cs_release_resources(dev); 574 return (error); 575 } 576 577 gone_by_fcp101_dev(dev); 578 579 return (0); 580 } 581 582 int 583 cs_detach(device_t dev) 584 { 585 struct cs_softc *sc; 586 struct ifnet *ifp; 587 588 sc = device_get_softc(dev); 589 ifp = sc->ifp; 590 591 CS_LOCK(sc); 592 cs_stop(sc); 593 CS_UNLOCK(sc); 594 callout_drain(&sc->timer); 595 ether_ifdetach(ifp); 596 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle); 597 cs_release_resources(dev); 598 free(sc->buffer, M_DEVBUF); 599 if_free(ifp); 600 mtx_destroy(&sc->lock); 601 return (0); 602 } 603 604 /* 605 * Initialize the board 606 */ 607 static void 608 cs_init(void *xsc) 609 { 610 struct cs_softc *sc=(struct cs_softc *)xsc; 611 612 CS_LOCK(sc); 613 cs_init_locked(sc); 614 CS_UNLOCK(sc); 615 } 616 617 static void 618 cs_init_locked(struct cs_softc *sc) 619 { 620 struct ifnet *ifp = sc->ifp; 621 int i, rx_cfg; 622 623 /* 624 * reset watchdog timer 625 */ 626 sc->tx_timeout = 0; 627 sc->buf_len = 0; 628 629 /* 630 * Hardware initialization of cs 631 */ 632 633 /* Enable receiver and transmitter */ 634 cs_writereg(sc, PP_LineCTL, 635 cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON | SERIAL_TX_ON); 636 637 /* Configure the receiver mode */ 638 cs_setmode(sc); 639 640 /* 641 * This defines what type of frames will cause interrupts 642 * Bad frames should generate interrupts so that the driver 643 * could track statistics of discarded packets 644 */ 645 rx_cfg = RX_OK_ENBL | RX_CRC_ERROR_ENBL | RX_RUNT_ENBL | 646 RX_EXTRA_DATA_ENBL; 647 if (sc->isa_config & STREAM_TRANSFER) 648 rx_cfg |= RX_STREAM_ENBL; 649 cs_writereg(sc, PP_RxCFG, rx_cfg); 650 cs_writereg(sc, PP_TxCFG, TX_LOST_CRS_ENBL | 651 TX_SQE_ERROR_ENBL | TX_OK_ENBL | TX_LATE_COL_ENBL | 652 TX_JBR_ENBL | TX_ANY_COL_ENBL | TX_16_COL_ENBL); 653 cs_writereg(sc, PP_BufCFG, READY_FOR_TX_ENBL | 654 RX_MISS_COUNT_OVRFLOW_ENBL | TX_COL_COUNT_OVRFLOW_ENBL | 655 TX_UNDERRUN_ENBL /*| RX_DMA_ENBL*/); 656 657 /* Write MAC address into IA filter */ 658 for (i=0; i<ETHER_ADDR_LEN/2; i++) 659 cs_writereg(sc, PP_IA + i * 2, 660 sc->enaddr[i * 2] | 661 (sc->enaddr[i * 2 + 1] << 8) ); 662 663 /* 664 * Now enable everything 665 */ 666 /* 667 #ifdef CS_USE_64K_DMA 668 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ | RX_DMA_SIZE_64K); 669 #else 670 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ); 671 #endif 672 */ 673 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ); 674 675 /* 676 * Set running and clear output active flags 677 */ 678 sc->ifp->if_drv_flags |= IFF_DRV_RUNNING; 679 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 680 callout_reset(&sc->timer, hz, cs_watchdog, sc); 681 682 /* 683 * Start sending process 684 */ 685 cs_start_locked(ifp); 686 } 687 688 /* 689 * Get the packet from the board and send it to the upper layer. 690 */ 691 static int 692 cs_get_packet(struct cs_softc *sc) 693 { 694 struct ifnet *ifp = sc->ifp; 695 int status, length; 696 struct mbuf *m; 697 698 #ifdef CS_DEBUG 699 int i; 700 #endif 701 702 status = cs_inw(sc, RX_FRAME_PORT); 703 length = cs_inw(sc, RX_FRAME_PORT); 704 705 #ifdef CS_DEBUG 706 device_printf(sc->dev, "rcvd: stat %x, len %d\n", 707 status, length); 708 #endif 709 710 if (!(status & RX_OK)) { 711 #ifdef CS_DEBUG 712 device_printf(sc->dev, "bad pkt stat %x\n", status); 713 #endif 714 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 715 return (-1); 716 } 717 718 MGETHDR(m, M_NOWAIT, MT_DATA); 719 if (m==NULL) 720 return (-1); 721 722 if (length > MHLEN) { 723 if (!(MCLGET(m, M_NOWAIT))) { 724 m_freem(m); 725 return (-1); 726 } 727 } 728 729 /* Initialize packet's header info */ 730 m->m_pkthdr.rcvif = ifp; 731 m->m_pkthdr.len = length; 732 m->m_len = length; 733 734 /* Get the data */ 735 bus_read_multi_2(sc->port_res, RX_FRAME_PORT, mtod(m, uint16_t *), 736 (length + 1) >> 1); 737 738 #ifdef CS_DEBUG 739 for (i=0;i<length;i++) 740 printf(" %02x",(unsigned char)*((char *)(m->m_data+i))); 741 printf( "\n" ); 742 #endif 743 744 if (status & (RX_IA | RX_BROADCAST) || 745 (ifp->if_flags & IFF_MULTICAST && status & RX_HASHED)) { 746 /* Feed the packet to the upper layer */ 747 (*ifp->if_input)(ifp, m); 748 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); 749 if (length == ETHER_MAX_LEN-ETHER_CRC_LEN) 750 DELAY(cs_recv_delay); 751 } else { 752 m_freem(m); 753 } 754 755 return (0); 756 } 757 758 /* 759 * Handle interrupts 760 */ 761 void 762 csintr(void *arg) 763 { 764 struct cs_softc *sc = (struct cs_softc*) arg; 765 struct ifnet *ifp = sc->ifp; 766 int status; 767 768 #ifdef CS_DEBUG 769 device_printf(sc->dev, "Interrupt.\n"); 770 #endif 771 772 CS_LOCK(sc); 773 while ((status=cs_inw(sc, ISQ_PORT))) { 774 775 #ifdef CS_DEBUG 776 device_printf(sc->dev, "from ISQ: %04x\n", status); 777 #endif 778 779 switch (status & ISQ_EVENT_MASK) { 780 case ISQ_RECEIVER_EVENT: 781 cs_get_packet(sc); 782 break; 783 784 case ISQ_TRANSMITTER_EVENT: 785 if (status & TX_OK) 786 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 787 else 788 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 789 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 790 sc->tx_timeout = 0; 791 break; 792 793 case ISQ_BUFFER_EVENT: 794 if (status & READY_FOR_TX) { 795 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 796 sc->tx_timeout = 0; 797 } 798 799 if (status & TX_UNDERRUN) { 800 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 801 sc->tx_timeout = 0; 802 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 803 } 804 break; 805 806 case ISQ_RX_MISS_EVENT: 807 if_inc_counter(ifp, IFCOUNTER_IERRORS, status >> 6); 808 break; 809 810 case ISQ_TX_COL_EVENT: 811 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, status >> 6); 812 break; 813 } 814 } 815 816 if (!(ifp->if_drv_flags & IFF_DRV_OACTIVE)) { 817 cs_start_locked(ifp); 818 } 819 CS_UNLOCK(sc); 820 } 821 822 /* 823 * Save the data in buffer 824 */ 825 826 static void 827 cs_write_mbufs( struct cs_softc *sc, struct mbuf *m ) 828 { 829 int len; 830 struct mbuf *mp; 831 unsigned char *data, *buf; 832 833 for (mp=m, buf=sc->buffer, sc->buf_len=0; mp != NULL; mp=mp->m_next) { 834 len = mp->m_len; 835 836 /* 837 * Ignore empty parts 838 */ 839 if (!len) 840 continue; 841 842 /* 843 * Find actual data address 844 */ 845 data = mtod(mp, caddr_t); 846 847 bcopy((caddr_t) data, (caddr_t) buf, len); 848 buf += len; 849 sc->buf_len += len; 850 } 851 } 852 853 854 static void 855 cs_xmit_buf( struct cs_softc *sc ) 856 { 857 bus_write_multi_2(sc->port_res, TX_FRAME_PORT, (uint16_t *)sc->buffer, 858 (sc->buf_len + 1) >> 1); 859 sc->buf_len = 0; 860 } 861 862 static void 863 cs_start(struct ifnet *ifp) 864 { 865 struct cs_softc *sc = ifp->if_softc; 866 867 CS_LOCK(sc); 868 cs_start_locked(ifp); 869 CS_UNLOCK(sc); 870 } 871 872 static void 873 cs_start_locked(struct ifnet *ifp) 874 { 875 int length; 876 struct mbuf *m, *mp; 877 struct cs_softc *sc = ifp->if_softc; 878 879 for (;;) { 880 if (sc->buf_len) 881 length = sc->buf_len; 882 else { 883 IF_DEQUEUE( &ifp->if_snd, m ); 884 885 if (m==NULL) { 886 return; 887 } 888 889 for (length=0, mp=m; mp != NULL; mp=mp->m_next) 890 length += mp->m_len; 891 892 /* Skip zero-length packets */ 893 if (length == 0) { 894 m_freem(m); 895 continue; 896 } 897 898 cs_write_mbufs(sc, m); 899 900 BPF_MTAP(ifp, m); 901 902 m_freem(m); 903 } 904 905 /* 906 * Issue a SEND command 907 */ 908 cs_outw(sc, TX_CMD_PORT, sc->send_cmd); 909 cs_outw(sc, TX_LEN_PORT, length ); 910 911 /* 912 * If there's no free space in the buffer then leave 913 * this packet for the next time: indicate output active 914 * and return. 915 */ 916 if (!(cs_readreg(sc, PP_BusST) & READY_FOR_TX_NOW)) { 917 sc->tx_timeout = sc->buf_len; 918 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 919 return; 920 } 921 922 cs_xmit_buf(sc); 923 924 /* 925 * Set the watchdog timer in case we never hear 926 * from board again. (I don't know about correct 927 * value for this timeout) 928 */ 929 sc->tx_timeout = length; 930 931 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 932 return; 933 } 934 } 935 936 /* 937 * Stop everything on the interface 938 */ 939 static void 940 cs_stop(struct cs_softc *sc) 941 { 942 943 CS_ASSERT_LOCKED(sc); 944 cs_writereg(sc, PP_RxCFG, 0); 945 cs_writereg(sc, PP_TxCFG, 0); 946 cs_writereg(sc, PP_BufCFG, 0); 947 cs_writereg(sc, PP_BusCTL, 0); 948 949 sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 950 sc->tx_timeout = 0; 951 callout_stop(&sc->timer); 952 } 953 954 /* 955 * Reset the interface 956 */ 957 static void 958 cs_reset(struct cs_softc *sc) 959 { 960 961 CS_ASSERT_LOCKED(sc); 962 cs_stop(sc); 963 cs_init_locked(sc); 964 } 965 966 static uint16_t 967 cs_hash_index(struct sockaddr_dl *addr) 968 { 969 uint32_t crc; 970 uint16_t idx; 971 caddr_t lla; 972 973 lla = LLADDR(addr); 974 crc = ether_crc32_le(lla, ETHER_ADDR_LEN); 975 idx = crc >> 26; 976 977 return (idx); 978 } 979 980 static void 981 cs_setmode(struct cs_softc *sc) 982 { 983 int rx_ctl; 984 uint16_t af[4]; 985 uint16_t port, mask, index; 986 struct ifnet *ifp = sc->ifp; 987 struct ifmultiaddr *ifma; 988 989 /* Stop the receiver while changing filters */ 990 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) & ~SERIAL_RX_ON); 991 992 if (ifp->if_flags & IFF_PROMISC) { 993 /* Turn on promiscuous mode. */ 994 rx_ctl = RX_OK_ACCEPT | RX_PROM_ACCEPT; 995 } else if (ifp->if_flags & IFF_MULTICAST) { 996 /* Allow receiving frames with multicast addresses */ 997 rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT | 998 RX_OK_ACCEPT | RX_MULTCAST_ACCEPT; 999 1000 /* Start with an empty filter */ 1001 af[0] = af[1] = af[2] = af[3] = 0x0000; 1002 1003 if (ifp->if_flags & IFF_ALLMULTI) { 1004 /* Accept all multicast frames */ 1005 af[0] = af[1] = af[2] = af[3] = 0xffff; 1006 } else { 1007 /* 1008 * Set up the filter to only accept multicast 1009 * frames we're interested in. 1010 */ 1011 if_maddr_rlock(ifp); 1012 CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1013 struct sockaddr_dl *dl = 1014 (struct sockaddr_dl *)ifma->ifma_addr; 1015 1016 index = cs_hash_index(dl); 1017 port = (u_int16_t) (index >> 4); 1018 mask = (u_int16_t) (1 << (index & 0xf)); 1019 af[port] |= mask; 1020 } 1021 if_maddr_runlock(ifp); 1022 } 1023 1024 cs_writereg(sc, PP_LAF + 0, af[0]); 1025 cs_writereg(sc, PP_LAF + 2, af[1]); 1026 cs_writereg(sc, PP_LAF + 4, af[2]); 1027 cs_writereg(sc, PP_LAF + 6, af[3]); 1028 } else { 1029 /* 1030 * Receive only good frames addressed for us and 1031 * good broadcasts. 1032 */ 1033 rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT | 1034 RX_OK_ACCEPT; 1035 } 1036 1037 /* Set up the filter */ 1038 cs_writereg(sc, PP_RxCTL, RX_DEF_ACCEPT | rx_ctl); 1039 1040 /* Turn on receiver */ 1041 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON); 1042 } 1043 1044 static int 1045 cs_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1046 { 1047 struct cs_softc *sc=ifp->if_softc; 1048 struct ifreq *ifr = (struct ifreq *)data; 1049 int error=0; 1050 1051 #ifdef CS_DEBUG 1052 if_printf(ifp, "%s command=%lx\n", __func__, command); 1053 #endif 1054 1055 switch (command) { 1056 case SIOCSIFFLAGS: 1057 /* 1058 * Switch interface state between "running" and 1059 * "stopped", reflecting the UP flag. 1060 */ 1061 CS_LOCK(sc); 1062 if (sc->ifp->if_flags & IFF_UP) { 1063 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING)==0) { 1064 cs_init_locked(sc); 1065 } 1066 } else { 1067 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING)!=0) { 1068 cs_stop(sc); 1069 } 1070 } 1071 /* 1072 * Promiscuous and/or multicast flags may have changed, 1073 * so reprogram the multicast filter and/or receive mode. 1074 * 1075 * See note about multicasts in cs_setmode 1076 */ 1077 cs_setmode(sc); 1078 CS_UNLOCK(sc); 1079 break; 1080 1081 case SIOCADDMULTI: 1082 case SIOCDELMULTI: 1083 /* 1084 * Multicast list has changed; set the hardware filter 1085 * accordingly. 1086 * 1087 * See note about multicasts in cs_setmode 1088 */ 1089 CS_LOCK(sc); 1090 cs_setmode(sc); 1091 CS_UNLOCK(sc); 1092 error = 0; 1093 break; 1094 1095 case SIOCSIFMEDIA: 1096 case SIOCGIFMEDIA: 1097 error = ifmedia_ioctl(ifp, ifr, &sc->media, command); 1098 break; 1099 1100 default: 1101 error = ether_ioctl(ifp, command, data); 1102 break; 1103 } 1104 1105 return (error); 1106 } 1107 1108 /* 1109 * Device timeout/watchdog routine. Entered if the device neglects to 1110 * generate an interrupt after a transmit has been started on it. 1111 */ 1112 static void 1113 cs_watchdog(void *arg) 1114 { 1115 struct cs_softc *sc = arg; 1116 struct ifnet *ifp = sc->ifp; 1117 1118 CS_ASSERT_LOCKED(sc); 1119 if (sc->tx_timeout && --sc->tx_timeout == 0) { 1120 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1121 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname); 1122 1123 /* Reset the interface */ 1124 if (ifp->if_flags & IFF_UP) 1125 cs_reset(sc); 1126 else 1127 cs_stop(sc); 1128 } 1129 callout_reset(&sc->timer, hz, cs_watchdog, sc); 1130 } 1131 1132 static int 1133 cs_mediachange(struct ifnet *ifp) 1134 { 1135 struct cs_softc *sc = ifp->if_softc; 1136 struct ifmedia *ifm = &sc->media; 1137 int error; 1138 1139 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1140 return (EINVAL); 1141 1142 CS_LOCK(sc); 1143 error = cs_mediaset(sc, ifm->ifm_media); 1144 CS_UNLOCK(sc); 1145 return (error); 1146 } 1147 1148 static void 1149 cs_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) 1150 { 1151 int line_status; 1152 struct cs_softc *sc = ifp->if_softc; 1153 1154 CS_LOCK(sc); 1155 ifmr->ifm_active = IFM_ETHER; 1156 line_status = cs_readreg(sc, PP_LineST); 1157 if (line_status & TENBASET_ON) { 1158 ifmr->ifm_active |= IFM_10_T; 1159 if (sc->chip_type != CS8900) { 1160 if (cs_readreg(sc, PP_AutoNegST) & FDX_ACTIVE) 1161 ifmr->ifm_active |= IFM_FDX; 1162 if (cs_readreg(sc, PP_AutoNegST) & HDX_ACTIVE) 1163 ifmr->ifm_active |= IFM_HDX; 1164 } 1165 ifmr->ifm_status = IFM_AVALID; 1166 if (line_status & LINK_OK) 1167 ifmr->ifm_status |= IFM_ACTIVE; 1168 } else { 1169 if (line_status & AUI_ON) { 1170 cs_writereg(sc, PP_SelfCTL, cs_readreg(sc, PP_SelfCTL) | 1171 HCB1_ENBL); 1172 if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0)^ 1173 (cs_readreg(sc, PP_SelfCTL) & HCB1)) 1174 ifmr->ifm_active |= IFM_10_2; 1175 else 1176 ifmr->ifm_active |= IFM_10_5; 1177 } 1178 } 1179 CS_UNLOCK(sc); 1180 } 1181 1182 static int 1183 cs_mediaset(struct cs_softc *sc, int media) 1184 { 1185 int error = 0; 1186 1187 /* Stop the receiver & transmitter */ 1188 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) & 1189 ~(SERIAL_RX_ON | SERIAL_TX_ON)); 1190 1191 #ifdef CS_DEBUG 1192 device_printf(sc->dev, "%s media=%x\n", __func__, media); 1193 #endif 1194 1195 switch (IFM_SUBTYPE(media)) { 1196 default: 1197 case IFM_AUTO: 1198 /* 1199 * This chip makes it a little hard to support this, so treat 1200 * it as IFM_10_T, auto duplex. 1201 */ 1202 enable_tp(sc); 1203 cs_duplex_auto(sc); 1204 break; 1205 case IFM_10_T: 1206 enable_tp(sc); 1207 if (media & IFM_FDX) 1208 cs_duplex_full(sc); 1209 else if (media & IFM_HDX) 1210 cs_duplex_half(sc); 1211 else 1212 error = cs_duplex_auto(sc); 1213 break; 1214 case IFM_10_2: 1215 enable_bnc(sc); 1216 break; 1217 case IFM_10_5: 1218 enable_aui(sc); 1219 break; 1220 } 1221 1222 /* 1223 * Turn the transmitter & receiver back on 1224 */ 1225 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) | 1226 SERIAL_RX_ON | SERIAL_TX_ON); 1227 1228 return (error); 1229 } 1230