1 /*- 2 * Copyright (c) 1997,1998 Maxim Bolotin and Oleg Sharoiko. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 /* 33 * 34 * Device driver for Crystal Semiconductor CS8920 based ethernet 35 * adapters. By Maxim Bolotin and Oleg Sharoiko, 27-April-1997 36 */ 37 38 /* 39 #define CS_DEBUG 40 */ 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/malloc.h> 45 #include <sys/mbuf.h> 46 #include <sys/socket.h> 47 #include <sys/sockio.h> 48 #include <sys/kernel.h> 49 #include <sys/sysctl.h> 50 #include <sys/syslog.h> 51 52 #include <sys/module.h> 53 #include <sys/bus.h> 54 #include <machine/bus.h> 55 #include <sys/rman.h> 56 #include <machine/resource.h> 57 58 #include <net/if.h> 59 #include <net/if_var.h> 60 #include <net/if_arp.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_types.h> 64 #include <net/ethernet.h> 65 #include <net/bpf.h> 66 67 #include <dev/cs/if_csvar.h> 68 #include <dev/cs/if_csreg.h> 69 70 #ifdef CS_USE_64K_DMA 71 #define CS_DMA_BUFFER_SIZE 65536 72 #else 73 #define CS_DMA_BUFFER_SIZE 16384 74 #endif 75 76 static void cs_init(void *); 77 static void cs_init_locked(struct cs_softc *); 78 static int cs_ioctl(struct ifnet *, u_long, caddr_t); 79 static void cs_start(struct ifnet *); 80 static void cs_start_locked(struct ifnet *); 81 static void cs_stop(struct cs_softc *); 82 static void cs_reset(struct cs_softc *); 83 static void cs_watchdog(void *); 84 85 static int cs_mediachange(struct ifnet *); 86 static void cs_mediastatus(struct ifnet *, struct ifmediareq *); 87 static int cs_mediaset(struct cs_softc *, int); 88 89 static void cs_write_mbufs(struct cs_softc*, struct mbuf*); 90 static void cs_xmit_buf(struct cs_softc*); 91 static int cs_get_packet(struct cs_softc*); 92 static void cs_setmode(struct cs_softc*); 93 94 static int get_eeprom_data(struct cs_softc *sc, int, int, uint16_t *); 95 static int get_eeprom_cksum(int, int, uint16_t *); 96 static int wait_eeprom_ready( struct cs_softc *); 97 static void control_dc_dc( struct cs_softc *, int ); 98 static int enable_tp(struct cs_softc *); 99 static int enable_aui(struct cs_softc *); 100 static int enable_bnc(struct cs_softc *); 101 static int cs_duplex_auto(struct cs_softc *); 102 103 devclass_t cs_devclass; 104 driver_intr_t csintr; 105 106 /* sysctl vars */ 107 static SYSCTL_NODE(_hw, OID_AUTO, cs, CTLFLAG_RD, 0, "cs device parameters"); 108 109 int cs_ignore_cksum_failure = 0; 110 SYSCTL_INT(_hw_cs, OID_AUTO, ignore_checksum_failure, CTLFLAG_RWTUN, 111 &cs_ignore_cksum_failure, 0, 112 "ignore checksum errors in cs card EEPROM"); 113 114 static int cs_recv_delay = 570; 115 SYSCTL_INT(_hw_cs, OID_AUTO, recv_delay, CTLFLAG_RWTUN, &cs_recv_delay, 570, ""); 116 117 static int cs8900_eeint2irq[16] = { 118 10, 11, 12, 5, 255, 255, 255, 255, 119 255, 255, 255, 255, 255, 255, 255, 255 120 }; 121 122 static int cs8900_irq2eeint[16] = { 123 255, 255, 255, 255, 255, 3, 255, 255, 124 255, 0, 1, 2, 255, 255, 255, 255 125 }; 126 127 static int 128 get_eeprom_data(struct cs_softc *sc, int off, int len, uint16_t *buffer) 129 { 130 int i; 131 132 #ifdef CS_DEBUG 133 device_printf(sc->dev, "EEPROM data from %x for %x:\n", off, len); 134 #endif 135 for (i=0; i < len; i++) { 136 if (wait_eeprom_ready(sc) < 0) 137 return (-1); 138 /* Send command to EEPROM to read */ 139 cs_writereg(sc, PP_EECMD, (off + i) | EEPROM_READ_CMD); 140 if (wait_eeprom_ready(sc) < 0) 141 return (-1); 142 buffer[i] = cs_readreg(sc, PP_EEData); 143 144 #ifdef CS_DEBUG 145 printf("%04x ",buffer[i]); 146 #endif 147 } 148 149 #ifdef CS_DEBUG 150 printf("\n"); 151 #endif 152 return (0); 153 } 154 155 static int 156 get_eeprom_cksum(int off, int len, uint16_t *buffer) 157 { 158 int i; 159 uint16_t cksum=0; 160 161 for (i = 0; i < len; i++) 162 cksum += buffer[i]; 163 cksum &= 0xffff; 164 if (cksum == 0 || cs_ignore_cksum_failure) 165 return (0); 166 return (-1); 167 } 168 169 static int 170 wait_eeprom_ready(struct cs_softc *sc) 171 { 172 int i; 173 174 /* 175 * From the CS8900A datasheet, section 3.5.2: 176 * "Before issuing any command to the EEPROM, the host must wait 177 * for the SIBUSY bit (Register 16, SelfST, bit 8) to clear. After 178 * each command has been issued, the host must wait again for SIBUSY 179 * to clear." 180 * 181 * Before we issue the command, we should be !busy, so that will 182 * be fast. The datasheet suggests that clock out from the part 183 * per word will be on the order of 25us, which is consistant with 184 * the 1MHz serial clock and 16bits... We should never hit 100, 185 * let alone 15,000 here. The original code did an unconditional 186 * 30ms DELAY here. Bad Kharma. cs_readreg takes ~2us. 187 */ 188 for (i = 0; i < 15000; i++) /* 30ms max */ 189 if (!(cs_readreg(sc, PP_SelfST) & SI_BUSY)) 190 return (0); 191 return (1); 192 } 193 194 static void 195 control_dc_dc(struct cs_softc *sc, int on_not_off) 196 { 197 unsigned int self_control = HCB1_ENBL; 198 199 if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0) ^ on_not_off) 200 self_control |= HCB1; 201 else 202 self_control &= ~HCB1; 203 cs_writereg(sc, PP_SelfCTL, self_control); 204 DELAY(500000); /* Bad! */ 205 } 206 207 208 static int 209 cs_duplex_auto(struct cs_softc *sc) 210 { 211 int i, error=0; 212 213 cs_writereg(sc, PP_AutoNegCTL, 214 RE_NEG_NOW | ALLOW_FDX | AUTO_NEG_ENABLE); 215 for (i=0; cs_readreg(sc, PP_AutoNegST) & AUTO_NEG_BUSY; i++) { 216 if (i > 4000) { 217 device_printf(sc->dev, 218 "full/half duplex auto negotiation timeout\n"); 219 error = ETIMEDOUT; 220 break; 221 } 222 DELAY(1000); 223 } 224 return (error); 225 } 226 227 static int 228 enable_tp(struct cs_softc *sc) 229 { 230 231 cs_writereg(sc, PP_LineCTL, sc->line_ctl & ~AUI_ONLY); 232 control_dc_dc(sc, 0); 233 return (0); 234 } 235 236 static int 237 enable_aui(struct cs_softc *sc) 238 { 239 240 cs_writereg(sc, PP_LineCTL, 241 (sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY); 242 control_dc_dc(sc, 0); 243 return (0); 244 } 245 246 static int 247 enable_bnc(struct cs_softc *sc) 248 { 249 250 cs_writereg(sc, PP_LineCTL, 251 (sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY); 252 control_dc_dc(sc, 1); 253 return (0); 254 } 255 256 int 257 cs_cs89x0_probe(device_t dev) 258 { 259 int i; 260 int error; 261 u_long irq, junk; 262 struct cs_softc *sc = device_get_softc(dev); 263 unsigned rev_type = 0; 264 uint16_t id; 265 char chip_revision; 266 uint16_t eeprom_buff[CHKSUM_LEN]; 267 int chip_type, pp_isaint, pp_isadma; 268 269 sc->dev = dev; 270 error = cs_alloc_port(dev, 0, CS_89x0_IO_PORTS); 271 if (error) 272 return (error); 273 274 if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG) { 275 /* Chip not detected. Let's try to reset it */ 276 if (bootverbose) 277 device_printf(dev, "trying to reset the chip.\n"); 278 cs_outw(sc, ADD_PORT, PP_SelfCTL); 279 i = cs_inw(sc, DATA_PORT); 280 cs_outw(sc, ADD_PORT, PP_SelfCTL); 281 cs_outw(sc, DATA_PORT, i | POWER_ON_RESET); 282 if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG) 283 return (ENXIO); 284 } 285 286 for (i = 0; i < 10000; i++) { 287 id = cs_readreg(sc, PP_ChipID); 288 if (id == CHIP_EISA_ID_SIG) 289 break; 290 } 291 if (i == 10000) 292 return (ENXIO); 293 294 rev_type = cs_readreg(sc, PRODUCT_ID_ADD); 295 chip_type = rev_type & ~REVISON_BITS; 296 chip_revision = ((rev_type & REVISON_BITS) >> 8) + 'A'; 297 298 sc->chip_type = chip_type; 299 300 if (chip_type == CS8900) { 301 pp_isaint = PP_CS8900_ISAINT; 302 pp_isadma = PP_CS8900_ISADMA; 303 sc->send_cmd = TX_CS8900_AFTER_ALL; 304 } else { 305 pp_isaint = PP_CS8920_ISAINT; 306 pp_isadma = PP_CS8920_ISADMA; 307 sc->send_cmd = TX_CS8920_AFTER_ALL; 308 } 309 310 /* 311 * Clear some fields so that fail of EEPROM will left them clean 312 */ 313 sc->auto_neg_cnf = 0; 314 sc->adapter_cnf = 0; 315 sc->isa_config = 0; 316 317 /* 318 * If no interrupt specified, use what the board tells us. 319 */ 320 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk); 321 322 /* 323 * Get data from EEPROM 324 */ 325 if((cs_readreg(sc, PP_SelfST) & EEPROM_PRESENT) == 0) { 326 device_printf(dev, "No EEPROM, assuming defaults.\n"); 327 } else if (get_eeprom_data(sc,START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) { 328 device_printf(dev, "EEPROM read failed, assuming defaults.\n"); 329 } else if (get_eeprom_cksum(START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) { 330 device_printf(dev, "EEPROM cheksum bad, assuming defaults.\n"); 331 } else { 332 sc->auto_neg_cnf = eeprom_buff[AUTO_NEG_CNF_OFFSET]; 333 sc->adapter_cnf = eeprom_buff[ADAPTER_CNF_OFFSET]; 334 sc->isa_config = eeprom_buff[ISA_CNF_OFFSET]; 335 for (i=0; i<ETHER_ADDR_LEN/2; i++) { 336 sc->enaddr[i*2] = eeprom_buff[i]; 337 sc->enaddr[i*2+1] = eeprom_buff[i] >> 8; 338 } 339 /* 340 * If no interrupt specified, use what the 341 * board tells us. 342 */ 343 if (error) { 344 irq = sc->isa_config & INT_NO_MASK; 345 error = 0; 346 if (chip_type == CS8900) { 347 irq = cs8900_eeint2irq[irq]; 348 } else { 349 if (irq > CS8920_NO_INTS) 350 irq = 255; 351 } 352 if (irq == 255) { 353 device_printf(dev, "invalid irq in EEPROM.\n"); 354 error = EINVAL; 355 } 356 if (!error) 357 bus_set_resource(dev, SYS_RES_IRQ, 0, 358 irq, 1); 359 } 360 } 361 362 if (!error && !(sc->flags & CS_NO_IRQ)) { 363 if (chip_type == CS8900) { 364 if (irq < 16) 365 irq = cs8900_irq2eeint[irq]; 366 else 367 irq = 255; 368 } else { 369 if (irq > CS8920_NO_INTS) 370 irq = 255; 371 } 372 if (irq == 255) 373 error = EINVAL; 374 } 375 376 if (error) { 377 device_printf(dev, "Unknown or invalid irq\n"); 378 return (error); 379 } 380 381 if (!(sc->flags & CS_NO_IRQ)) 382 cs_writereg(sc, pp_isaint, irq); 383 384 /* 385 * Temporary disabled 386 * 387 if (drq>0) 388 cs_writereg(sc, pp_isadma, drq); 389 else { 390 device_printf(dev, "incorrect drq\n",); 391 return (0); 392 } 393 */ 394 395 if (bootverbose) 396 device_printf(dev, "CS89%c0%s rev %c media%s%s%s\n", 397 chip_type == CS8900 ? '0' : '2', 398 chip_type == CS8920M ? "M" : "", 399 chip_revision, 400 (sc->adapter_cnf & A_CNF_10B_T) ? " TP" : "", 401 (sc->adapter_cnf & A_CNF_AUI) ? " AUI" : "", 402 (sc->adapter_cnf & A_CNF_10B_2) ? " BNC" : ""); 403 404 if ((sc->adapter_cnf & A_CNF_EXTND_10B_2) && 405 (sc->adapter_cnf & A_CNF_LOW_RX_SQUELCH)) 406 sc->line_ctl = LOW_RX_SQUELCH; 407 else 408 sc->line_ctl = 0; 409 410 return (0); 411 } 412 413 /* 414 * Allocate a port resource with the given resource id. 415 */ 416 int 417 cs_alloc_port(device_t dev, int rid, int size) 418 { 419 struct cs_softc *sc = device_get_softc(dev); 420 struct resource *res; 421 422 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 423 0ul, ~0ul, size, RF_ACTIVE); 424 if (res == NULL) 425 return (ENOENT); 426 sc->port_rid = rid; 427 sc->port_res = res; 428 return (0); 429 } 430 431 /* 432 * Allocate an irq resource with the given resource id. 433 */ 434 int 435 cs_alloc_irq(device_t dev, int rid) 436 { 437 struct cs_softc *sc = device_get_softc(dev); 438 struct resource *res; 439 440 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); 441 if (res == NULL) 442 return (ENOENT); 443 sc->irq_rid = rid; 444 sc->irq_res = res; 445 return (0); 446 } 447 448 /* 449 * Release all resources 450 */ 451 void 452 cs_release_resources(device_t dev) 453 { 454 struct cs_softc *sc = device_get_softc(dev); 455 456 if (sc->port_res) { 457 bus_release_resource(dev, SYS_RES_IOPORT, 458 sc->port_rid, sc->port_res); 459 sc->port_res = 0; 460 } 461 if (sc->irq_res) { 462 bus_release_resource(dev, SYS_RES_IRQ, 463 sc->irq_rid, sc->irq_res); 464 sc->irq_res = 0; 465 } 466 } 467 468 /* 469 * Install the interface into kernel networking data structures 470 */ 471 int 472 cs_attach(device_t dev) 473 { 474 int error, media=0; 475 struct cs_softc *sc = device_get_softc(dev); 476 struct ifnet *ifp; 477 478 sc->dev = dev; 479 480 ifp = sc->ifp = if_alloc(IFT_ETHER); 481 if (ifp == NULL) { 482 device_printf(dev, "can not if_alloc()\n"); 483 cs_release_resources(dev); 484 return (ENOMEM); 485 } 486 487 mtx_init(&sc->lock, device_get_nameunit(dev), MTX_NETWORK_LOCK, 488 MTX_DEF); 489 callout_init_mtx(&sc->timer, &sc->lock, 0); 490 491 CS_LOCK(sc); 492 cs_stop(sc); 493 CS_UNLOCK(sc); 494 495 ifp->if_softc=sc; 496 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 497 ifp->if_start=cs_start; 498 ifp->if_ioctl=cs_ioctl; 499 ifp->if_init=cs_init; 500 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 501 502 ifp->if_flags=(IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); 503 504 /* 505 * this code still in progress (DMA support) 506 * 507 508 sc->recv_ring=malloc(CS_DMA_BUFFER_SIZE<<1, M_DEVBUF, M_NOWAIT); 509 if (sc->recv_ring == NULL) { 510 log(LOG_ERR, 511 "%s: Couldn't allocate memory for NIC\n", ifp->if_xname); 512 return(0); 513 } 514 if ((sc->recv_ring-(sc->recv_ring & 0x1FFFF)) 515 < (128*1024-CS_DMA_BUFFER_SIZE)) 516 sc->recv_ring+=16*1024; 517 518 */ 519 520 sc->buffer=malloc(ETHER_MAX_LEN-ETHER_CRC_LEN,M_DEVBUF,M_NOWAIT); 521 if (sc->buffer == NULL) { 522 device_printf(sc->dev, "Couldn't allocate memory for NIC\n"); 523 if_free(ifp); 524 mtx_destroy(&sc->lock); 525 cs_release_resources(dev); 526 return(ENOMEM); 527 } 528 529 /* 530 * Initialize the media structures. 531 */ 532 ifmedia_init(&sc->media, 0, cs_mediachange, cs_mediastatus); 533 534 if (sc->adapter_cnf & A_CNF_10B_T) { 535 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_T, 0, NULL); 536 if (sc->chip_type != CS8900) { 537 ifmedia_add(&sc->media, 538 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 539 ifmedia_add(&sc->media, 540 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 541 } 542 } 543 544 if (sc->adapter_cnf & A_CNF_10B_2) 545 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_2, 0, NULL); 546 547 if (sc->adapter_cnf & A_CNF_AUI) 548 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_5, 0, NULL); 549 550 if (sc->adapter_cnf & A_CNF_MEDIA) 551 ifmedia_add(&sc->media, IFM_ETHER|IFM_AUTO, 0, NULL); 552 553 /* Set default media from EEPROM */ 554 switch (sc->adapter_cnf & A_CNF_MEDIA_TYPE) { 555 case A_CNF_MEDIA_AUTO: media = IFM_ETHER|IFM_AUTO; break; 556 case A_CNF_MEDIA_10B_T: media = IFM_ETHER|IFM_10_T; break; 557 case A_CNF_MEDIA_10B_2: media = IFM_ETHER|IFM_10_2; break; 558 case A_CNF_MEDIA_AUI: media = IFM_ETHER|IFM_10_5; break; 559 default: 560 device_printf(sc->dev, "no media, assuming 10baseT\n"); 561 sc->adapter_cnf |= A_CNF_10B_T; 562 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_T, 0, NULL); 563 if (sc->chip_type != CS8900) { 564 ifmedia_add(&sc->media, 565 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 566 ifmedia_add(&sc->media, 567 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 568 } 569 media = IFM_ETHER | IFM_10_T; 570 break; 571 } 572 ifmedia_set(&sc->media, media); 573 cs_mediaset(sc, media); 574 575 ether_ifattach(ifp, sc->enaddr); 576 577 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, 578 NULL, csintr, sc, &sc->irq_handle); 579 if (error) { 580 ether_ifdetach(ifp); 581 free(sc->buffer, M_DEVBUF); 582 if_free(ifp); 583 mtx_destroy(&sc->lock); 584 cs_release_resources(dev); 585 return (error); 586 } 587 588 return (0); 589 } 590 591 int 592 cs_detach(device_t dev) 593 { 594 struct cs_softc *sc; 595 struct ifnet *ifp; 596 597 sc = device_get_softc(dev); 598 ifp = sc->ifp; 599 600 CS_LOCK(sc); 601 cs_stop(sc); 602 CS_UNLOCK(sc); 603 callout_drain(&sc->timer); 604 ether_ifdetach(ifp); 605 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle); 606 cs_release_resources(dev); 607 free(sc->buffer, M_DEVBUF); 608 if_free(ifp); 609 mtx_destroy(&sc->lock); 610 return (0); 611 } 612 613 /* 614 * Initialize the board 615 */ 616 static void 617 cs_init(void *xsc) 618 { 619 struct cs_softc *sc=(struct cs_softc *)xsc; 620 621 CS_LOCK(sc); 622 cs_init_locked(sc); 623 CS_UNLOCK(sc); 624 } 625 626 static void 627 cs_init_locked(struct cs_softc *sc) 628 { 629 struct ifnet *ifp = sc->ifp; 630 int i, rx_cfg; 631 632 /* 633 * reset watchdog timer 634 */ 635 sc->tx_timeout = 0; 636 sc->buf_len = 0; 637 638 /* 639 * Hardware initialization of cs 640 */ 641 642 /* Enable receiver and transmitter */ 643 cs_writereg(sc, PP_LineCTL, 644 cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON | SERIAL_TX_ON); 645 646 /* Configure the receiver mode */ 647 cs_setmode(sc); 648 649 /* 650 * This defines what type of frames will cause interrupts 651 * Bad frames should generate interrupts so that the driver 652 * could track statistics of discarded packets 653 */ 654 rx_cfg = RX_OK_ENBL | RX_CRC_ERROR_ENBL | RX_RUNT_ENBL | 655 RX_EXTRA_DATA_ENBL; 656 if (sc->isa_config & STREAM_TRANSFER) 657 rx_cfg |= RX_STREAM_ENBL; 658 cs_writereg(sc, PP_RxCFG, rx_cfg); 659 cs_writereg(sc, PP_TxCFG, TX_LOST_CRS_ENBL | 660 TX_SQE_ERROR_ENBL | TX_OK_ENBL | TX_LATE_COL_ENBL | 661 TX_JBR_ENBL | TX_ANY_COL_ENBL | TX_16_COL_ENBL); 662 cs_writereg(sc, PP_BufCFG, READY_FOR_TX_ENBL | 663 RX_MISS_COUNT_OVRFLOW_ENBL | TX_COL_COUNT_OVRFLOW_ENBL | 664 TX_UNDERRUN_ENBL /*| RX_DMA_ENBL*/); 665 666 /* Write MAC address into IA filter */ 667 for (i=0; i<ETHER_ADDR_LEN/2; i++) 668 cs_writereg(sc, PP_IA + i * 2, 669 sc->enaddr[i * 2] | 670 (sc->enaddr[i * 2 + 1] << 8) ); 671 672 /* 673 * Now enable everything 674 */ 675 /* 676 #ifdef CS_USE_64K_DMA 677 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ | RX_DMA_SIZE_64K); 678 #else 679 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ); 680 #endif 681 */ 682 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ); 683 684 /* 685 * Set running and clear output active flags 686 */ 687 sc->ifp->if_drv_flags |= IFF_DRV_RUNNING; 688 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 689 callout_reset(&sc->timer, hz, cs_watchdog, sc); 690 691 /* 692 * Start sending process 693 */ 694 cs_start_locked(ifp); 695 } 696 697 /* 698 * Get the packet from the board and send it to the upper layer. 699 */ 700 static int 701 cs_get_packet(struct cs_softc *sc) 702 { 703 struct ifnet *ifp = sc->ifp; 704 int status, length; 705 struct ether_header *eh; 706 struct mbuf *m; 707 708 #ifdef CS_DEBUG 709 int i; 710 #endif 711 712 status = cs_inw(sc, RX_FRAME_PORT); 713 length = cs_inw(sc, RX_FRAME_PORT); 714 715 #ifdef CS_DEBUG 716 device_printf(sc->dev, "rcvd: stat %x, len %d\n", 717 status, length); 718 #endif 719 720 if (!(status & RX_OK)) { 721 #ifdef CS_DEBUG 722 device_printf(sc->dev, "bad pkt stat %x\n", status); 723 #endif 724 ifp->if_ierrors++; 725 return (-1); 726 } 727 728 MGETHDR(m, M_NOWAIT, MT_DATA); 729 if (m==NULL) 730 return (-1); 731 732 if (length > MHLEN) { 733 MCLGET(m, M_NOWAIT); 734 if (!(m->m_flags & M_EXT)) { 735 m_freem(m); 736 return (-1); 737 } 738 } 739 740 /* Initialize packet's header info */ 741 m->m_pkthdr.rcvif = ifp; 742 m->m_pkthdr.len = length; 743 m->m_len = length; 744 745 /* Get the data */ 746 bus_read_multi_2(sc->port_res, RX_FRAME_PORT, mtod(m, uint16_t *), 747 (length + 1) >> 1); 748 749 eh = mtod(m, struct ether_header *); 750 751 #ifdef CS_DEBUG 752 for (i=0;i<length;i++) 753 printf(" %02x",(unsigned char)*((char *)(m->m_data+i))); 754 printf( "\n" ); 755 #endif 756 757 if (status & (RX_IA | RX_BROADCAST) || 758 (ifp->if_flags & IFF_MULTICAST && status & RX_HASHED)) { 759 /* Feed the packet to the upper layer */ 760 (*ifp->if_input)(ifp, m); 761 ifp->if_ipackets++; 762 if (length == ETHER_MAX_LEN-ETHER_CRC_LEN) 763 DELAY(cs_recv_delay); 764 } else { 765 m_freem(m); 766 } 767 768 return (0); 769 } 770 771 /* 772 * Handle interrupts 773 */ 774 void 775 csintr(void *arg) 776 { 777 struct cs_softc *sc = (struct cs_softc*) arg; 778 struct ifnet *ifp = sc->ifp; 779 int status; 780 781 #ifdef CS_DEBUG 782 device_printf(sc->dev, "Interrupt.\n"); 783 #endif 784 785 CS_LOCK(sc); 786 while ((status=cs_inw(sc, ISQ_PORT))) { 787 788 #ifdef CS_DEBUG 789 device_printf(sc->dev, "from ISQ: %04x\n", status); 790 #endif 791 792 switch (status & ISQ_EVENT_MASK) { 793 case ISQ_RECEIVER_EVENT: 794 cs_get_packet(sc); 795 break; 796 797 case ISQ_TRANSMITTER_EVENT: 798 if (status & TX_OK) 799 ifp->if_opackets++; 800 else 801 ifp->if_oerrors++; 802 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 803 sc->tx_timeout = 0; 804 break; 805 806 case ISQ_BUFFER_EVENT: 807 if (status & READY_FOR_TX) { 808 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 809 sc->tx_timeout = 0; 810 } 811 812 if (status & TX_UNDERRUN) { 813 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 814 sc->tx_timeout = 0; 815 ifp->if_oerrors++; 816 } 817 break; 818 819 case ISQ_RX_MISS_EVENT: 820 ifp->if_ierrors+=(status>>6); 821 break; 822 823 case ISQ_TX_COL_EVENT: 824 ifp->if_collisions+=(status>>6); 825 break; 826 } 827 } 828 829 if (!(ifp->if_drv_flags & IFF_DRV_OACTIVE)) { 830 cs_start_locked(ifp); 831 } 832 CS_UNLOCK(sc); 833 } 834 835 /* 836 * Save the data in buffer 837 */ 838 839 static void 840 cs_write_mbufs( struct cs_softc *sc, struct mbuf *m ) 841 { 842 int len; 843 struct mbuf *mp; 844 unsigned char *data, *buf; 845 846 for (mp=m, buf=sc->buffer, sc->buf_len=0; mp != NULL; mp=mp->m_next) { 847 len = mp->m_len; 848 849 /* 850 * Ignore empty parts 851 */ 852 if (!len) 853 continue; 854 855 /* 856 * Find actual data address 857 */ 858 data = mtod(mp, caddr_t); 859 860 bcopy((caddr_t) data, (caddr_t) buf, len); 861 buf += len; 862 sc->buf_len += len; 863 } 864 } 865 866 867 static void 868 cs_xmit_buf( struct cs_softc *sc ) 869 { 870 bus_write_multi_2(sc->port_res, TX_FRAME_PORT, (uint16_t *)sc->buffer, 871 (sc->buf_len + 1) >> 1); 872 sc->buf_len = 0; 873 } 874 875 static void 876 cs_start(struct ifnet *ifp) 877 { 878 struct cs_softc *sc = ifp->if_softc; 879 880 CS_LOCK(sc); 881 cs_start_locked(ifp); 882 CS_UNLOCK(sc); 883 } 884 885 static void 886 cs_start_locked(struct ifnet *ifp) 887 { 888 int length; 889 struct mbuf *m, *mp; 890 struct cs_softc *sc = ifp->if_softc; 891 892 for (;;) { 893 if (sc->buf_len) 894 length = sc->buf_len; 895 else { 896 IF_DEQUEUE( &ifp->if_snd, m ); 897 898 if (m==NULL) { 899 return; 900 } 901 902 for (length=0, mp=m; mp != NULL; mp=mp->m_next) 903 length += mp->m_len; 904 905 /* Skip zero-length packets */ 906 if (length == 0) { 907 m_freem(m); 908 continue; 909 } 910 911 cs_write_mbufs(sc, m); 912 913 BPF_MTAP(ifp, m); 914 915 m_freem(m); 916 } 917 918 /* 919 * Issue a SEND command 920 */ 921 cs_outw(sc, TX_CMD_PORT, sc->send_cmd); 922 cs_outw(sc, TX_LEN_PORT, length ); 923 924 /* 925 * If there's no free space in the buffer then leave 926 * this packet for the next time: indicate output active 927 * and return. 928 */ 929 if (!(cs_readreg(sc, PP_BusST) & READY_FOR_TX_NOW)) { 930 sc->tx_timeout = sc->buf_len; 931 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 932 return; 933 } 934 935 cs_xmit_buf(sc); 936 937 /* 938 * Set the watchdog timer in case we never hear 939 * from board again. (I don't know about correct 940 * value for this timeout) 941 */ 942 sc->tx_timeout = length; 943 944 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 945 return; 946 } 947 } 948 949 /* 950 * Stop everything on the interface 951 */ 952 static void 953 cs_stop(struct cs_softc *sc) 954 { 955 956 CS_ASSERT_LOCKED(sc); 957 cs_writereg(sc, PP_RxCFG, 0); 958 cs_writereg(sc, PP_TxCFG, 0); 959 cs_writereg(sc, PP_BufCFG, 0); 960 cs_writereg(sc, PP_BusCTL, 0); 961 962 sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 963 sc->tx_timeout = 0; 964 callout_stop(&sc->timer); 965 } 966 967 /* 968 * Reset the interface 969 */ 970 static void 971 cs_reset(struct cs_softc *sc) 972 { 973 974 CS_ASSERT_LOCKED(sc); 975 cs_stop(sc); 976 cs_init_locked(sc); 977 } 978 979 static uint16_t 980 cs_hash_index(struct sockaddr_dl *addr) 981 { 982 uint32_t crc; 983 uint16_t idx; 984 caddr_t lla; 985 986 lla = LLADDR(addr); 987 crc = ether_crc32_le(lla, ETHER_ADDR_LEN); 988 idx = crc >> 26; 989 990 return (idx); 991 } 992 993 static void 994 cs_setmode(struct cs_softc *sc) 995 { 996 int rx_ctl; 997 uint16_t af[4]; 998 uint16_t port, mask, index; 999 struct ifnet *ifp = sc->ifp; 1000 struct ifmultiaddr *ifma; 1001 1002 /* Stop the receiver while changing filters */ 1003 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) & ~SERIAL_RX_ON); 1004 1005 if (ifp->if_flags & IFF_PROMISC) { 1006 /* Turn on promiscuous mode. */ 1007 rx_ctl = RX_OK_ACCEPT | RX_PROM_ACCEPT; 1008 } else if (ifp->if_flags & IFF_MULTICAST) { 1009 /* Allow receiving frames with multicast addresses */ 1010 rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT | 1011 RX_OK_ACCEPT | RX_MULTCAST_ACCEPT; 1012 1013 /* Start with an empty filter */ 1014 af[0] = af[1] = af[2] = af[3] = 0x0000; 1015 1016 if (ifp->if_flags & IFF_ALLMULTI) { 1017 /* Accept all multicast frames */ 1018 af[0] = af[1] = af[2] = af[3] = 0xffff; 1019 } else { 1020 /* 1021 * Set up the filter to only accept multicast 1022 * frames we're interested in. 1023 */ 1024 if_maddr_rlock(ifp); 1025 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1026 struct sockaddr_dl *dl = 1027 (struct sockaddr_dl *)ifma->ifma_addr; 1028 1029 index = cs_hash_index(dl); 1030 port = (u_int16_t) (index >> 4); 1031 mask = (u_int16_t) (1 << (index & 0xf)); 1032 af[port] |= mask; 1033 } 1034 if_maddr_runlock(ifp); 1035 } 1036 1037 cs_writereg(sc, PP_LAF + 0, af[0]); 1038 cs_writereg(sc, PP_LAF + 2, af[1]); 1039 cs_writereg(sc, PP_LAF + 4, af[2]); 1040 cs_writereg(sc, PP_LAF + 6, af[3]); 1041 } else { 1042 /* 1043 * Receive only good frames addressed for us and 1044 * good broadcasts. 1045 */ 1046 rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT | 1047 RX_OK_ACCEPT; 1048 } 1049 1050 /* Set up the filter */ 1051 cs_writereg(sc, PP_RxCTL, RX_DEF_ACCEPT | rx_ctl); 1052 1053 /* Turn on receiver */ 1054 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON); 1055 } 1056 1057 static int 1058 cs_ioctl(register struct ifnet *ifp, u_long command, caddr_t data) 1059 { 1060 struct cs_softc *sc=ifp->if_softc; 1061 struct ifreq *ifr = (struct ifreq *)data; 1062 int error=0; 1063 1064 #ifdef CS_DEBUG 1065 if_printf(ifp, "%s command=%lx\n", __func__, command); 1066 #endif 1067 1068 switch (command) { 1069 case SIOCSIFFLAGS: 1070 /* 1071 * Switch interface state between "running" and 1072 * "stopped", reflecting the UP flag. 1073 */ 1074 CS_LOCK(sc); 1075 if (sc->ifp->if_flags & IFF_UP) { 1076 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING)==0) { 1077 cs_init_locked(sc); 1078 } 1079 } else { 1080 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING)!=0) { 1081 cs_stop(sc); 1082 } 1083 } 1084 /* 1085 * Promiscuous and/or multicast flags may have changed, 1086 * so reprogram the multicast filter and/or receive mode. 1087 * 1088 * See note about multicasts in cs_setmode 1089 */ 1090 cs_setmode(sc); 1091 CS_UNLOCK(sc); 1092 break; 1093 1094 case SIOCADDMULTI: 1095 case SIOCDELMULTI: 1096 /* 1097 * Multicast list has changed; set the hardware filter 1098 * accordingly. 1099 * 1100 * See note about multicasts in cs_setmode 1101 */ 1102 CS_LOCK(sc); 1103 cs_setmode(sc); 1104 CS_UNLOCK(sc); 1105 error = 0; 1106 break; 1107 1108 case SIOCSIFMEDIA: 1109 case SIOCGIFMEDIA: 1110 error = ifmedia_ioctl(ifp, ifr, &sc->media, command); 1111 break; 1112 1113 default: 1114 error = ether_ioctl(ifp, command, data); 1115 break; 1116 } 1117 1118 return (error); 1119 } 1120 1121 /* 1122 * Device timeout/watchdog routine. Entered if the device neglects to 1123 * generate an interrupt after a transmit has been started on it. 1124 */ 1125 static void 1126 cs_watchdog(void *arg) 1127 { 1128 struct cs_softc *sc = arg; 1129 struct ifnet *ifp = sc->ifp; 1130 1131 CS_ASSERT_LOCKED(sc); 1132 if (sc->tx_timeout && --sc->tx_timeout == 0) { 1133 ifp->if_oerrors++; 1134 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname); 1135 1136 /* Reset the interface */ 1137 if (ifp->if_flags & IFF_UP) 1138 cs_reset(sc); 1139 else 1140 cs_stop(sc); 1141 } 1142 callout_reset(&sc->timer, hz, cs_watchdog, sc); 1143 } 1144 1145 static int 1146 cs_mediachange(struct ifnet *ifp) 1147 { 1148 struct cs_softc *sc = ifp->if_softc; 1149 struct ifmedia *ifm = &sc->media; 1150 int error; 1151 1152 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1153 return (EINVAL); 1154 1155 CS_LOCK(sc); 1156 error = cs_mediaset(sc, ifm->ifm_media); 1157 CS_UNLOCK(sc); 1158 return (error); 1159 } 1160 1161 static void 1162 cs_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) 1163 { 1164 int line_status; 1165 struct cs_softc *sc = ifp->if_softc; 1166 1167 CS_LOCK(sc); 1168 ifmr->ifm_active = IFM_ETHER; 1169 line_status = cs_readreg(sc, PP_LineST); 1170 if (line_status & TENBASET_ON) { 1171 ifmr->ifm_active |= IFM_10_T; 1172 if (sc->chip_type != CS8900) { 1173 if (cs_readreg(sc, PP_AutoNegST) & FDX_ACTIVE) 1174 ifmr->ifm_active |= IFM_FDX; 1175 if (cs_readreg(sc, PP_AutoNegST) & HDX_ACTIVE) 1176 ifmr->ifm_active |= IFM_HDX; 1177 } 1178 ifmr->ifm_status = IFM_AVALID; 1179 if (line_status & LINK_OK) 1180 ifmr->ifm_status |= IFM_ACTIVE; 1181 } else { 1182 if (line_status & AUI_ON) { 1183 cs_writereg(sc, PP_SelfCTL, cs_readreg(sc, PP_SelfCTL) | 1184 HCB1_ENBL); 1185 if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0)^ 1186 (cs_readreg(sc, PP_SelfCTL) & HCB1)) 1187 ifmr->ifm_active |= IFM_10_2; 1188 else 1189 ifmr->ifm_active |= IFM_10_5; 1190 } 1191 } 1192 CS_UNLOCK(sc); 1193 } 1194 1195 static int 1196 cs_mediaset(struct cs_softc *sc, int media) 1197 { 1198 int error = 0; 1199 1200 /* Stop the receiver & transmitter */ 1201 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) & 1202 ~(SERIAL_RX_ON | SERIAL_TX_ON)); 1203 1204 #ifdef CS_DEBUG 1205 device_printf(sc->dev, "%s media=%x\n", __func__, media); 1206 #endif 1207 1208 switch (IFM_SUBTYPE(media)) { 1209 default: 1210 case IFM_AUTO: 1211 /* 1212 * This chip makes it a little hard to support this, so treat 1213 * it as IFM_10_T, auto duplex. 1214 */ 1215 enable_tp(sc); 1216 cs_duplex_auto(sc); 1217 break; 1218 case IFM_10_T: 1219 enable_tp(sc); 1220 if (media & IFM_FDX) 1221 cs_duplex_full(sc); 1222 else if (media & IFM_HDX) 1223 cs_duplex_half(sc); 1224 else 1225 error = cs_duplex_auto(sc); 1226 break; 1227 case IFM_10_2: 1228 enable_bnc(sc); 1229 break; 1230 case IFM_10_5: 1231 enable_aui(sc); 1232 break; 1233 } 1234 1235 /* 1236 * Turn the transmitter & receiver back on 1237 */ 1238 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) | 1239 SERIAL_RX_ON | SERIAL_TX_ON); 1240 1241 return (error); 1242 } 1243