1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This class wraps target description classes used by the various code 11 // generation TableGen backends. This makes it easier to access the data and 12 // provides a single place that needs to check it for validity. All of these 13 // classes throw exceptions on error conditions. 14 // 15 //===----------------------------------------------------------------------===// 16 17 #include "CodeGenTarget.h" 18 #include "CodeGenIntrinsics.h" 19 #include "Record.h" 20 #include "llvm/ADT/StringExtras.h" 21 #include "llvm/ADT/STLExtras.h" 22 #include "llvm/Support/CommandLine.h" 23 #include <algorithm> 24 using namespace llvm; 25 26 static cl::opt<unsigned> 27 AsmParserNum("asmparsernum", cl::init(0), 28 cl::desc("Make -gen-asm-parser emit assembly parser #N")); 29 30 static cl::opt<unsigned> 31 AsmWriterNum("asmwriternum", cl::init(0), 32 cl::desc("Make -gen-asm-writer emit assembly writer #N")); 33 34 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen 35 /// record corresponds to. 36 MVT::SimpleValueType llvm::getValueType(Record *Rec) { 37 return (MVT::SimpleValueType)Rec->getValueAsInt("Value"); 38 } 39 40 std::string llvm::getName(MVT::SimpleValueType T) { 41 switch (T) { 42 case MVT::Other: return "UNKNOWN"; 43 case MVT::iPTR: return "TLI.getPointerTy()"; 44 case MVT::iPTRAny: return "TLI.getPointerTy()"; 45 default: return getEnumName(T); 46 } 47 } 48 49 std::string llvm::getEnumName(MVT::SimpleValueType T) { 50 switch (T) { 51 case MVT::Other: return "MVT::Other"; 52 case MVT::i1: return "MVT::i1"; 53 case MVT::i8: return "MVT::i8"; 54 case MVT::i16: return "MVT::i16"; 55 case MVT::i32: return "MVT::i32"; 56 case MVT::i64: return "MVT::i64"; 57 case MVT::i128: return "MVT::i128"; 58 case MVT::iAny: return "MVT::iAny"; 59 case MVT::fAny: return "MVT::fAny"; 60 case MVT::vAny: return "MVT::vAny"; 61 case MVT::f32: return "MVT::f32"; 62 case MVT::f64: return "MVT::f64"; 63 case MVT::f80: return "MVT::f80"; 64 case MVT::f128: return "MVT::f128"; 65 case MVT::ppcf128: return "MVT::ppcf128"; 66 case MVT::x86mmx: return "MVT::x86mmx"; 67 case MVT::Glue: return "MVT::Glue"; 68 case MVT::isVoid: return "MVT::isVoid"; 69 case MVT::v2i8: return "MVT::v2i8"; 70 case MVT::v4i8: return "MVT::v4i8"; 71 case MVT::v8i8: return "MVT::v8i8"; 72 case MVT::v16i8: return "MVT::v16i8"; 73 case MVT::v32i8: return "MVT::v32i8"; 74 case MVT::v2i16: return "MVT::v2i16"; 75 case MVT::v4i16: return "MVT::v4i16"; 76 case MVT::v8i16: return "MVT::v8i16"; 77 case MVT::v16i16: return "MVT::v16i16"; 78 case MVT::v2i32: return "MVT::v2i32"; 79 case MVT::v4i32: return "MVT::v4i32"; 80 case MVT::v8i32: return "MVT::v8i32"; 81 case MVT::v1i64: return "MVT::v1i64"; 82 case MVT::v2i64: return "MVT::v2i64"; 83 case MVT::v4i64: return "MVT::v4i64"; 84 case MVT::v8i64: return "MVT::v8i64"; 85 case MVT::v2f32: return "MVT::v2f32"; 86 case MVT::v4f32: return "MVT::v4f32"; 87 case MVT::v8f32: return "MVT::v8f32"; 88 case MVT::v2f64: return "MVT::v2f64"; 89 case MVT::v4f64: return "MVT::v4f64"; 90 case MVT::Metadata: return "MVT::Metadata"; 91 case MVT::iPTR: return "MVT::iPTR"; 92 case MVT::iPTRAny: return "MVT::iPTRAny"; 93 default: assert(0 && "ILLEGAL VALUE TYPE!"); return ""; 94 } 95 } 96 97 /// getQualifiedName - Return the name of the specified record, with a 98 /// namespace qualifier if the record contains one. 99 /// 100 std::string llvm::getQualifiedName(const Record *R) { 101 std::string Namespace = R->getValueAsString("Namespace"); 102 if (Namespace.empty()) return R->getName(); 103 return Namespace + "::" + R->getName(); 104 } 105 106 107 108 109 /// getTarget - Return the current instance of the Target class. 110 /// 111 CodeGenTarget::CodeGenTarget(RecordKeeper &records) : Records(records) { 112 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target"); 113 if (Targets.size() == 0) 114 throw std::string("ERROR: No 'Target' subclasses defined!"); 115 if (Targets.size() != 1) 116 throw std::string("ERROR: Multiple subclasses of Target defined!"); 117 TargetRec = Targets[0]; 118 } 119 120 121 const std::string &CodeGenTarget::getName() const { 122 return TargetRec->getName(); 123 } 124 125 std::string CodeGenTarget::getInstNamespace() const { 126 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) { 127 // Make sure not to pick up "TargetOpcode" by accidentally getting 128 // the namespace off the PHI instruction or something. 129 if ((*i)->Namespace != "TargetOpcode") 130 return (*i)->Namespace; 131 } 132 133 return ""; 134 } 135 136 Record *CodeGenTarget::getInstructionSet() const { 137 return TargetRec->getValueAsDef("InstructionSet"); 138 } 139 140 141 /// getAsmParser - Return the AssemblyParser definition for this target. 142 /// 143 Record *CodeGenTarget::getAsmParser() const { 144 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers"); 145 if (AsmParserNum >= LI.size()) 146 throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!"; 147 return LI[AsmParserNum]; 148 } 149 150 /// getAsmWriter - Return the AssemblyWriter definition for this target. 151 /// 152 Record *CodeGenTarget::getAsmWriter() const { 153 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters"); 154 if (AsmWriterNum >= LI.size()) 155 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!"; 156 return LI[AsmWriterNum]; 157 } 158 159 void CodeGenTarget::ReadRegisters() const { 160 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register"); 161 if (Regs.empty()) 162 throw std::string("No 'Register' subclasses defined!"); 163 std::sort(Regs.begin(), Regs.end(), LessRecord()); 164 165 Registers.reserve(Regs.size()); 166 Registers.assign(Regs.begin(), Regs.end()); 167 // Assign the enumeration values. 168 for (unsigned i = 0, e = Registers.size(); i != e; ++i) 169 Registers[i].EnumValue = i + 1; 170 } 171 172 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) { 173 CostPerUse = R->getValueAsInt("CostPerUse"); 174 } 175 176 const std::string &CodeGenRegister::getName() const { 177 return TheDef->getName(); 178 } 179 180 void CodeGenTarget::ReadSubRegIndices() const { 181 SubRegIndices = Records.getAllDerivedDefinitions("SubRegIndex"); 182 std::sort(SubRegIndices.begin(), SubRegIndices.end(), LessRecord()); 183 } 184 185 void CodeGenTarget::ReadRegisterClasses() const { 186 std::vector<Record*> RegClasses = 187 Records.getAllDerivedDefinitions("RegisterClass"); 188 if (RegClasses.empty()) 189 throw std::string("No 'RegisterClass' subclasses defined!"); 190 191 RegisterClasses.reserve(RegClasses.size()); 192 RegisterClasses.assign(RegClasses.begin(), RegClasses.end()); 193 } 194 195 /// getRegisterByName - If there is a register with the specific AsmName, 196 /// return it. 197 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const { 198 const std::vector<CodeGenRegister> &Regs = getRegisters(); 199 for (unsigned i = 0, e = Regs.size(); i != e; ++i) { 200 const CodeGenRegister &Reg = Regs[i]; 201 if (Reg.TheDef->getValueAsString("AsmName") == Name) 202 return &Reg; 203 } 204 205 return 0; 206 } 207 208 std::vector<MVT::SimpleValueType> CodeGenTarget:: 209 getRegisterVTs(Record *R) const { 210 std::vector<MVT::SimpleValueType> Result; 211 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses(); 212 for (unsigned i = 0, e = RCs.size(); i != e; ++i) { 213 const CodeGenRegisterClass &RC = RegisterClasses[i]; 214 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) { 215 if (R == RC.Elements[ei]) { 216 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes(); 217 Result.insert(Result.end(), InVTs.begin(), InVTs.end()); 218 } 219 } 220 } 221 222 // Remove duplicates. 223 array_pod_sort(Result.begin(), Result.end()); 224 Result.erase(std::unique(Result.begin(), Result.end()), Result.end()); 225 return Result; 226 } 227 228 229 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) { 230 // Rename anonymous register classes. 231 if (R->getName().size() > 9 && R->getName()[9] == '.') { 232 static unsigned AnonCounter = 0; 233 R->setName("AnonRegClass_"+utostr(AnonCounter++)); 234 } 235 236 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes"); 237 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) { 238 Record *Type = TypeList[i]; 239 if (!Type->isSubClassOf("ValueType")) 240 throw "RegTypes list member '" + Type->getName() + 241 "' does not derive from the ValueType class!"; 242 VTs.push_back(getValueType(Type)); 243 } 244 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!"); 245 246 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList"); 247 for (unsigned i = 0, e = RegList.size(); i != e; ++i) { 248 Record *Reg = RegList[i]; 249 if (!Reg->isSubClassOf("Register")) 250 throw "Register Class member '" + Reg->getName() + 251 "' does not derive from the Register class!"; 252 Elements.push_back(Reg); 253 } 254 255 // SubRegClasses is a list<dag> containing (RC, subregindex, ...) dags. 256 ListInit *SRC = R->getValueAsListInit("SubRegClasses"); 257 for (ListInit::const_iterator i = SRC->begin(), e = SRC->end(); i != e; ++i) { 258 DagInit *DAG = dynamic_cast<DagInit*>(*i); 259 if (!DAG) throw "SubRegClasses must contain DAGs"; 260 DefInit *DAGOp = dynamic_cast<DefInit*>(DAG->getOperator()); 261 Record *RCRec; 262 if (!DAGOp || !(RCRec = DAGOp->getDef())->isSubClassOf("RegisterClass")) 263 throw "Operator '" + DAG->getOperator()->getAsString() + 264 "' in SubRegClasses is not a RegisterClass"; 265 // Iterate over args, all SubRegIndex instances. 266 for (DagInit::const_arg_iterator ai = DAG->arg_begin(), ae = DAG->arg_end(); 267 ai != ae; ++ai) { 268 DefInit *Idx = dynamic_cast<DefInit*>(*ai); 269 Record *IdxRec; 270 if (!Idx || !(IdxRec = Idx->getDef())->isSubClassOf("SubRegIndex")) 271 throw "Argument '" + (*ai)->getAsString() + 272 "' in SubRegClasses is not a SubRegIndex"; 273 if (!SubRegClasses.insert(std::make_pair(IdxRec, RCRec)).second) 274 throw "SubRegIndex '" + IdxRec->getName() + "' mentioned twice"; 275 } 276 } 277 278 // Allow targets to override the size in bits of the RegisterClass. 279 unsigned Size = R->getValueAsInt("Size"); 280 281 Namespace = R->getValueAsString("Namespace"); 282 SpillSize = Size ? Size : EVT(VTs[0]).getSizeInBits(); 283 SpillAlignment = R->getValueAsInt("Alignment"); 284 CopyCost = R->getValueAsInt("CopyCost"); 285 MethodBodies = R->getValueAsCode("MethodBodies"); 286 MethodProtos = R->getValueAsCode("MethodProtos"); 287 } 288 289 const std::string &CodeGenRegisterClass::getName() const { 290 return TheDef->getName(); 291 } 292 293 void CodeGenTarget::ReadLegalValueTypes() const { 294 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses(); 295 for (unsigned i = 0, e = RCs.size(); i != e; ++i) 296 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri) 297 LegalValueTypes.push_back(RCs[i].VTs[ri]); 298 299 // Remove duplicates. 300 std::sort(LegalValueTypes.begin(), LegalValueTypes.end()); 301 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(), 302 LegalValueTypes.end()), 303 LegalValueTypes.end()); 304 } 305 306 307 void CodeGenTarget::ReadInstructions() const { 308 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 309 if (Insts.size() <= 2) 310 throw std::string("No 'Instruction' subclasses defined!"); 311 312 // Parse the instructions defined in the .td file. 313 for (unsigned i = 0, e = Insts.size(); i != e; ++i) 314 Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]); 315 } 316 317 static const CodeGenInstruction * 318 GetInstByName(const char *Name, 319 const DenseMap<const Record*, CodeGenInstruction*> &Insts, 320 RecordKeeper &Records) { 321 const Record *Rec = Records.getDef(Name); 322 323 DenseMap<const Record*, CodeGenInstruction*>::const_iterator 324 I = Insts.find(Rec); 325 if (Rec == 0 || I == Insts.end()) 326 throw std::string("Could not find '") + Name + "' instruction!"; 327 return I->second; 328 } 329 330 namespace { 331 /// SortInstByName - Sorting predicate to sort instructions by name. 332 /// 333 struct SortInstByName { 334 bool operator()(const CodeGenInstruction *Rec1, 335 const CodeGenInstruction *Rec2) const { 336 return Rec1->TheDef->getName() < Rec2->TheDef->getName(); 337 } 338 }; 339 } 340 341 /// getInstructionsByEnumValue - Return all of the instructions defined by the 342 /// target, ordered by their enum value. 343 void CodeGenTarget::ComputeInstrsByEnum() const { 344 // The ordering here must match the ordering in TargetOpcodes.h. 345 const char *const FixedInstrs[] = { 346 "PHI", 347 "INLINEASM", 348 "PROLOG_LABEL", 349 "EH_LABEL", 350 "GC_LABEL", 351 "KILL", 352 "EXTRACT_SUBREG", 353 "INSERT_SUBREG", 354 "IMPLICIT_DEF", 355 "SUBREG_TO_REG", 356 "COPY_TO_REGCLASS", 357 "DBG_VALUE", 358 "REG_SEQUENCE", 359 "COPY", 360 0 361 }; 362 const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions(); 363 for (const char *const *p = FixedInstrs; *p; ++p) { 364 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); 365 assert(Instr && "Missing target independent instruction"); 366 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace"); 367 InstrsByEnum.push_back(Instr); 368 } 369 unsigned EndOfPredefines = InstrsByEnum.size(); 370 371 for (DenseMap<const Record*, CodeGenInstruction*>::const_iterator 372 I = Insts.begin(), E = Insts.end(); I != E; ++I) { 373 const CodeGenInstruction *CGI = I->second; 374 if (CGI->Namespace != "TargetOpcode") 375 InstrsByEnum.push_back(CGI); 376 } 377 378 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr"); 379 380 // All of the instructions are now in random order based on the map iteration. 381 // Sort them by name. 382 std::sort(InstrsByEnum.begin()+EndOfPredefines, InstrsByEnum.end(), 383 SortInstByName()); 384 } 385 386 387 /// isLittleEndianEncoding - Return whether this target encodes its instruction 388 /// in little-endian format, i.e. bits laid out in the order [0..n] 389 /// 390 bool CodeGenTarget::isLittleEndianEncoding() const { 391 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding"); 392 } 393 394 //===----------------------------------------------------------------------===// 395 // ComplexPattern implementation 396 // 397 ComplexPattern::ComplexPattern(Record *R) { 398 Ty = ::getValueType(R->getValueAsDef("Ty")); 399 NumOperands = R->getValueAsInt("NumOperands"); 400 SelectFunc = R->getValueAsString("SelectFunc"); 401 RootNodes = R->getValueAsListOfDefs("RootNodes"); 402 403 // Parse the properties. 404 Properties = 0; 405 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties"); 406 for (unsigned i = 0, e = PropList.size(); i != e; ++i) 407 if (PropList[i]->getName() == "SDNPHasChain") { 408 Properties |= 1 << SDNPHasChain; 409 } else if (PropList[i]->getName() == "SDNPOptInGlue") { 410 Properties |= 1 << SDNPOptInGlue; 411 } else if (PropList[i]->getName() == "SDNPMayStore") { 412 Properties |= 1 << SDNPMayStore; 413 } else if (PropList[i]->getName() == "SDNPMayLoad") { 414 Properties |= 1 << SDNPMayLoad; 415 } else if (PropList[i]->getName() == "SDNPSideEffect") { 416 Properties |= 1 << SDNPSideEffect; 417 } else if (PropList[i]->getName() == "SDNPMemOperand") { 418 Properties |= 1 << SDNPMemOperand; 419 } else if (PropList[i]->getName() == "SDNPVariadic") { 420 Properties |= 1 << SDNPVariadic; 421 } else if (PropList[i]->getName() == "SDNPWantRoot") { 422 Properties |= 1 << SDNPWantRoot; 423 } else if (PropList[i]->getName() == "SDNPWantParent") { 424 Properties |= 1 << SDNPWantParent; 425 } else { 426 errs() << "Unsupported SD Node property '" << PropList[i]->getName() 427 << "' on ComplexPattern '" << R->getName() << "'!\n"; 428 exit(1); 429 } 430 } 431 432 //===----------------------------------------------------------------------===// 433 // CodeGenIntrinsic Implementation 434 //===----------------------------------------------------------------------===// 435 436 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC, 437 bool TargetOnly) { 438 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic"); 439 440 std::vector<CodeGenIntrinsic> Result; 441 442 for (unsigned i = 0, e = I.size(); i != e; ++i) { 443 bool isTarget = I[i]->getValueAsBit("isTarget"); 444 if (isTarget == TargetOnly) 445 Result.push_back(CodeGenIntrinsic(I[i])); 446 } 447 return Result; 448 } 449 450 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { 451 TheDef = R; 452 std::string DefName = R->getName(); 453 ModRef = ReadWriteMem; 454 isOverloaded = false; 455 isCommutative = false; 456 457 if (DefName.size() <= 4 || 458 std::string(DefName.begin(), DefName.begin() + 4) != "int_") 459 throw "Intrinsic '" + DefName + "' does not start with 'int_'!"; 460 461 EnumName = std::string(DefName.begin()+4, DefName.end()); 462 463 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field. 464 GCCBuiltinName = R->getValueAsString("GCCBuiltinName"); 465 466 TargetPrefix = R->getValueAsString("TargetPrefix"); 467 Name = R->getValueAsString("LLVMName"); 468 469 if (Name == "") { 470 // If an explicit name isn't specified, derive one from the DefName. 471 Name = "llvm."; 472 473 for (unsigned i = 0, e = EnumName.size(); i != e; ++i) 474 Name += (EnumName[i] == '_') ? '.' : EnumName[i]; 475 } else { 476 // Verify it starts with "llvm.". 477 if (Name.size() <= 5 || 478 std::string(Name.begin(), Name.begin() + 5) != "llvm.") 479 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!"; 480 } 481 482 // If TargetPrefix is specified, make sure that Name starts with 483 // "llvm.<targetprefix>.". 484 if (!TargetPrefix.empty()) { 485 if (Name.size() < 6+TargetPrefix.size() || 486 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size()) 487 != (TargetPrefix + ".")) 488 throw "Intrinsic '" + DefName + "' does not start with 'llvm." + 489 TargetPrefix + ".'!"; 490 } 491 492 // Parse the list of return types. 493 std::vector<MVT::SimpleValueType> OverloadedVTs; 494 ListInit *TypeList = R->getValueAsListInit("RetTypes"); 495 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 496 Record *TyEl = TypeList->getElementAsRecord(i); 497 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 498 MVT::SimpleValueType VT; 499 if (TyEl->isSubClassOf("LLVMMatchType")) { 500 unsigned MatchTy = TyEl->getValueAsInt("Number"); 501 assert(MatchTy < OverloadedVTs.size() && 502 "Invalid matching number!"); 503 VT = OverloadedVTs[MatchTy]; 504 // It only makes sense to use the extended and truncated vector element 505 // variants with iAny types; otherwise, if the intrinsic is not 506 // overloaded, all the types can be specified directly. 507 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 508 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 509 VT == MVT::iAny || VT == MVT::vAny) && 510 "Expected iAny or vAny type"); 511 } else { 512 VT = getValueType(TyEl->getValueAsDef("VT")); 513 } 514 if (EVT(VT).isOverloaded()) { 515 OverloadedVTs.push_back(VT); 516 isOverloaded = true; 517 } 518 519 // Reject invalid types. 520 if (VT == MVT::isVoid) 521 throw "Intrinsic '" + DefName + " has void in result type list!"; 522 523 IS.RetVTs.push_back(VT); 524 IS.RetTypeDefs.push_back(TyEl); 525 } 526 527 // Parse the list of parameter types. 528 TypeList = R->getValueAsListInit("ParamTypes"); 529 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 530 Record *TyEl = TypeList->getElementAsRecord(i); 531 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 532 MVT::SimpleValueType VT; 533 if (TyEl->isSubClassOf("LLVMMatchType")) { 534 unsigned MatchTy = TyEl->getValueAsInt("Number"); 535 assert(MatchTy < OverloadedVTs.size() && 536 "Invalid matching number!"); 537 VT = OverloadedVTs[MatchTy]; 538 // It only makes sense to use the extended and truncated vector element 539 // variants with iAny types; otherwise, if the intrinsic is not 540 // overloaded, all the types can be specified directly. 541 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 542 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 543 VT == MVT::iAny || VT == MVT::vAny) && 544 "Expected iAny or vAny type"); 545 } else 546 VT = getValueType(TyEl->getValueAsDef("VT")); 547 548 if (EVT(VT).isOverloaded()) { 549 OverloadedVTs.push_back(VT); 550 isOverloaded = true; 551 } 552 553 // Reject invalid types. 554 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/) 555 throw "Intrinsic '" + DefName + " has void in result type list!"; 556 557 IS.ParamVTs.push_back(VT); 558 IS.ParamTypeDefs.push_back(TyEl); 559 } 560 561 // Parse the intrinsic properties. 562 ListInit *PropList = R->getValueAsListInit("Properties"); 563 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) { 564 Record *Property = PropList->getElementAsRecord(i); 565 assert(Property->isSubClassOf("IntrinsicProperty") && 566 "Expected a property!"); 567 568 if (Property->getName() == "IntrNoMem") 569 ModRef = NoMem; 570 else if (Property->getName() == "IntrReadArgMem") 571 ModRef = ReadArgMem; 572 else if (Property->getName() == "IntrReadMem") 573 ModRef = ReadMem; 574 else if (Property->getName() == "IntrReadWriteArgMem") 575 ModRef = ReadWriteArgMem; 576 else if (Property->getName() == "Commutative") 577 isCommutative = true; 578 else if (Property->isSubClassOf("NoCapture")) { 579 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 580 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture)); 581 } else 582 assert(0 && "Unknown property!"); 583 } 584 } 585