1435933ddSDimitry Andric //===-- RegisterContextPOSIX_powerpc.cpp -------------------------*- C++
2435933ddSDimitry Andric //-*-===//
37aa51b79SEd Maste //
47aa51b79SEd Maste //                     The LLVM Compiler Infrastructure
57aa51b79SEd Maste //
67aa51b79SEd Maste // This file is distributed under the University of Illinois Open Source
77aa51b79SEd Maste // License. See LICENSE.TXT for details.
87aa51b79SEd Maste //
97aa51b79SEd Maste //===----------------------------------------------------------------------===//
107aa51b79SEd Maste 
117aa51b79SEd Maste #include <cstring>
127aa51b79SEd Maste #include <errno.h>
137aa51b79SEd Maste #include <stdint.h>
147aa51b79SEd Maste 
154ba319b5SDimitry Andric #include "lldb/Target/Process.h"
167aa51b79SEd Maste #include "lldb/Target/Target.h"
177aa51b79SEd Maste #include "lldb/Target/Thread.h"
18f678e45dSDimitry Andric #include "lldb/Utility/DataBufferHeap.h"
19f678e45dSDimitry Andric #include "lldb/Utility/DataExtractor.h"
20f678e45dSDimitry Andric #include "lldb/Utility/Endian.h"
21*b5893f02SDimitry Andric #include "lldb/Utility/RegisterValue.h"
22*b5893f02SDimitry Andric #include "lldb/Utility/Scalar.h"
237aa51b79SEd Maste #include "llvm/Support/Compiler.h"
247aa51b79SEd Maste 
25435933ddSDimitry Andric #include "RegisterContextPOSIX_powerpc.h"
267aa51b79SEd Maste 
277aa51b79SEd Maste using namespace lldb_private;
287aa51b79SEd Maste using namespace lldb;
297aa51b79SEd Maste 
30435933ddSDimitry Andric static const uint32_t g_gpr_regnums[] = {
31435933ddSDimitry Andric     gpr_r0_powerpc,  gpr_r1_powerpc,  gpr_r2_powerpc,  gpr_r3_powerpc,
32435933ddSDimitry Andric     gpr_r4_powerpc,  gpr_r5_powerpc,  gpr_r6_powerpc,  gpr_r7_powerpc,
33435933ddSDimitry Andric     gpr_r8_powerpc,  gpr_r9_powerpc,  gpr_r10_powerpc, gpr_r11_powerpc,
34435933ddSDimitry Andric     gpr_r12_powerpc, gpr_r13_powerpc, gpr_r14_powerpc, gpr_r15_powerpc,
35435933ddSDimitry Andric     gpr_r16_powerpc, gpr_r17_powerpc, gpr_r18_powerpc, gpr_r19_powerpc,
36435933ddSDimitry Andric     gpr_r20_powerpc, gpr_r21_powerpc, gpr_r22_powerpc, gpr_r23_powerpc,
37435933ddSDimitry Andric     gpr_r24_powerpc, gpr_r25_powerpc, gpr_r26_powerpc, gpr_r27_powerpc,
38435933ddSDimitry Andric     gpr_r28_powerpc, gpr_r29_powerpc, gpr_r30_powerpc, gpr_r31_powerpc,
39435933ddSDimitry Andric     gpr_lr_powerpc,  gpr_cr_powerpc,  gpr_xer_powerpc, gpr_ctr_powerpc,
407aa51b79SEd Maste     gpr_pc_powerpc,
417aa51b79SEd Maste };
427aa51b79SEd Maste 
43435933ddSDimitry Andric static const uint32_t g_fpr_regnums[] = {
44435933ddSDimitry Andric     fpr_f0_powerpc,    fpr_f1_powerpc,  fpr_f2_powerpc,  fpr_f3_powerpc,
45435933ddSDimitry Andric     fpr_f4_powerpc,    fpr_f5_powerpc,  fpr_f6_powerpc,  fpr_f7_powerpc,
46435933ddSDimitry Andric     fpr_f8_powerpc,    fpr_f9_powerpc,  fpr_f10_powerpc, fpr_f11_powerpc,
47435933ddSDimitry Andric     fpr_f12_powerpc,   fpr_f13_powerpc, fpr_f14_powerpc, fpr_f15_powerpc,
48435933ddSDimitry Andric     fpr_f16_powerpc,   fpr_f17_powerpc, fpr_f18_powerpc, fpr_f19_powerpc,
49435933ddSDimitry Andric     fpr_f20_powerpc,   fpr_f21_powerpc, fpr_f22_powerpc, fpr_f23_powerpc,
50435933ddSDimitry Andric     fpr_f24_powerpc,   fpr_f25_powerpc, fpr_f26_powerpc, fpr_f27_powerpc,
51435933ddSDimitry Andric     fpr_f28_powerpc,   fpr_f29_powerpc, fpr_f30_powerpc, fpr_f31_powerpc,
527aa51b79SEd Maste     fpr_fpscr_powerpc,
537aa51b79SEd Maste };
547aa51b79SEd Maste 
55435933ddSDimitry Andric static const uint32_t g_vmx_regnums[] = {
56435933ddSDimitry Andric     vmx_v0_powerpc,     vmx_v1_powerpc,   vmx_v2_powerpc,  vmx_v3_powerpc,
57435933ddSDimitry Andric     vmx_v4_powerpc,     vmx_v5_powerpc,   vmx_v6_powerpc,  vmx_v7_powerpc,
58435933ddSDimitry Andric     vmx_v8_powerpc,     vmx_v9_powerpc,   vmx_v10_powerpc, vmx_v11_powerpc,
59435933ddSDimitry Andric     vmx_v12_powerpc,    vmx_v13_powerpc,  vmx_v14_powerpc, vmx_v15_powerpc,
60435933ddSDimitry Andric     vmx_v16_powerpc,    vmx_v17_powerpc,  vmx_v18_powerpc, vmx_v19_powerpc,
61435933ddSDimitry Andric     vmx_v20_powerpc,    vmx_v21_powerpc,  vmx_v22_powerpc, vmx_v23_powerpc,
62435933ddSDimitry Andric     vmx_v24_powerpc,    vmx_v25_powerpc,  vmx_v26_powerpc, vmx_v27_powerpc,
63435933ddSDimitry Andric     vmx_v28_powerpc,    vmx_v29_powerpc,  vmx_v30_powerpc, vmx_v31_powerpc,
64435933ddSDimitry Andric     vmx_vrsave_powerpc, vmx_vscr_powerpc,
651c3bbb01SEd Maste };
661c3bbb01SEd Maste 
677aa51b79SEd Maste // Number of register sets provided by this context.
68435933ddSDimitry Andric enum { k_num_register_sets = 3 };
69435933ddSDimitry Andric 
70435933ddSDimitry Andric static const RegisterSet g_reg_sets_powerpc[k_num_register_sets] = {
71435933ddSDimitry Andric     {"General Purpose Registers", "gpr", k_num_gpr_registers_powerpc,
72435933ddSDimitry Andric      g_gpr_regnums},
73435933ddSDimitry Andric     {"Floating Point Registers", "fpr", k_num_fpr_registers_powerpc,
74435933ddSDimitry Andric      g_fpr_regnums},
75435933ddSDimitry Andric     {"Altivec/VMX Registers", "vmx", k_num_vmx_registers_powerpc,
76435933ddSDimitry Andric      g_vmx_regnums},
777aa51b79SEd Maste };
787aa51b79SEd Maste 
79435933ddSDimitry Andric static_assert(k_first_gpr_powerpc == 0,
80435933ddSDimitry Andric               "GPRs must index starting at 0, or fix IsGPR()");
IsGPR(unsigned reg)81435933ddSDimitry Andric bool RegisterContextPOSIX_powerpc::IsGPR(unsigned reg) {
821c3bbb01SEd Maste   return (reg <= k_last_gpr_powerpc); // GPR's come first.
837aa51b79SEd Maste }
847aa51b79SEd Maste 
IsFPR(unsigned reg)85435933ddSDimitry Andric bool RegisterContextPOSIX_powerpc::IsFPR(unsigned reg) {
867aa51b79SEd Maste   return (reg >= k_first_fpr) && (reg <= k_last_fpr);
877aa51b79SEd Maste }
887aa51b79SEd Maste 
IsVMX(unsigned reg)89435933ddSDimitry Andric bool RegisterContextPOSIX_powerpc::IsVMX(unsigned reg) {
901c3bbb01SEd Maste   return (reg >= k_first_vmx) && (reg <= k_last_vmx);
911c3bbb01SEd Maste }
921c3bbb01SEd Maste 
RegisterContextPOSIX_powerpc(Thread & thread,uint32_t concrete_frame_idx,RegisterInfoInterface * register_info)93435933ddSDimitry Andric RegisterContextPOSIX_powerpc::RegisterContextPOSIX_powerpc(
94435933ddSDimitry Andric     Thread &thread, uint32_t concrete_frame_idx,
957aa51b79SEd Maste     RegisterInfoInterface *register_info)
96435933ddSDimitry Andric     : RegisterContext(thread, concrete_frame_idx) {
977aa51b79SEd Maste   m_register_info_ap.reset(register_info);
987aa51b79SEd Maste }
997aa51b79SEd Maste 
~RegisterContextPOSIX_powerpc()100435933ddSDimitry Andric RegisterContextPOSIX_powerpc::~RegisterContextPOSIX_powerpc() {}
1017aa51b79SEd Maste 
Invalidate()102435933ddSDimitry Andric void RegisterContextPOSIX_powerpc::Invalidate() {}
1037aa51b79SEd Maste 
InvalidateAllRegisters()104435933ddSDimitry Andric void RegisterContextPOSIX_powerpc::InvalidateAllRegisters() {}
1057aa51b79SEd Maste 
GetRegisterOffset(unsigned reg)106435933ddSDimitry Andric unsigned RegisterContextPOSIX_powerpc::GetRegisterOffset(unsigned reg) {
1077aa51b79SEd Maste   assert(reg < k_num_registers_powerpc && "Invalid register number.");
1087aa51b79SEd Maste   return GetRegisterInfo()[reg].byte_offset;
1097aa51b79SEd Maste }
1107aa51b79SEd Maste 
GetRegisterSize(unsigned reg)111435933ddSDimitry Andric unsigned RegisterContextPOSIX_powerpc::GetRegisterSize(unsigned reg) {
1127aa51b79SEd Maste   assert(reg < k_num_registers_powerpc && "Invalid register number.");
1137aa51b79SEd Maste   return GetRegisterInfo()[reg].byte_size;
1147aa51b79SEd Maste }
1157aa51b79SEd Maste 
GetRegisterCount()116435933ddSDimitry Andric size_t RegisterContextPOSIX_powerpc::GetRegisterCount() {
1177aa51b79SEd Maste   size_t num_registers = k_num_registers_powerpc;
1187aa51b79SEd Maste   return num_registers;
1197aa51b79SEd Maste }
1207aa51b79SEd Maste 
GetGPRSize()121435933ddSDimitry Andric size_t RegisterContextPOSIX_powerpc::GetGPRSize() {
1227aa51b79SEd Maste   return m_register_info_ap->GetGPRSize();
1237aa51b79SEd Maste }
1247aa51b79SEd Maste 
GetRegisterInfo()125435933ddSDimitry Andric const RegisterInfo *RegisterContextPOSIX_powerpc::GetRegisterInfo() {
126435933ddSDimitry Andric   // Commonly, this method is overridden and g_register_infos is copied and
1274ba319b5SDimitry Andric   // specialized. So, use GetRegisterInfo() rather than g_register_infos in
1284ba319b5SDimitry Andric   // this scope.
1297aa51b79SEd Maste   return m_register_info_ap->GetRegisterInfo();
1307aa51b79SEd Maste }
1317aa51b79SEd Maste 
1327aa51b79SEd Maste const RegisterInfo *
GetRegisterInfoAtIndex(size_t reg)133435933ddSDimitry Andric RegisterContextPOSIX_powerpc::GetRegisterInfoAtIndex(size_t reg) {
1347aa51b79SEd Maste   if (reg < k_num_registers_powerpc)
1357aa51b79SEd Maste     return &GetRegisterInfo()[reg];
1367aa51b79SEd Maste   else
1377aa51b79SEd Maste     return NULL;
1387aa51b79SEd Maste }
1397aa51b79SEd Maste 
GetRegisterSetCount()140435933ddSDimitry Andric size_t RegisterContextPOSIX_powerpc::GetRegisterSetCount() {
1417aa51b79SEd Maste   size_t sets = 0;
142435933ddSDimitry Andric   for (size_t set = 0; set < k_num_register_sets; ++set) {
1437aa51b79SEd Maste     if (IsRegisterSetAvailable(set))
1447aa51b79SEd Maste       ++sets;
1457aa51b79SEd Maste   }
1467aa51b79SEd Maste 
1477aa51b79SEd Maste   return sets;
1487aa51b79SEd Maste }
1497aa51b79SEd Maste 
GetRegisterSet(size_t set)150435933ddSDimitry Andric const RegisterSet *RegisterContextPOSIX_powerpc::GetRegisterSet(size_t set) {
1517aa51b79SEd Maste   if (IsRegisterSetAvailable(set))
1527aa51b79SEd Maste     return &g_reg_sets_powerpc[set];
1537aa51b79SEd Maste   else
1547aa51b79SEd Maste     return NULL;
1557aa51b79SEd Maste }
1567aa51b79SEd Maste 
GetRegisterName(unsigned reg)157435933ddSDimitry Andric const char *RegisterContextPOSIX_powerpc::GetRegisterName(unsigned reg) {
1587aa51b79SEd Maste   assert(reg < k_num_registers_powerpc && "Invalid register offset.");
1597aa51b79SEd Maste   return GetRegisterInfo()[reg].name;
1607aa51b79SEd Maste }
1617aa51b79SEd Maste 
GetByteOrder()162435933ddSDimitry Andric lldb::ByteOrder RegisterContextPOSIX_powerpc::GetByteOrder() {
163435933ddSDimitry Andric   // Get the target process whose privileged thread was used for the register
164435933ddSDimitry Andric   // read.
1657aa51b79SEd Maste   lldb::ByteOrder byte_order = eByteOrderInvalid;
1667aa51b79SEd Maste   Process *process = CalculateProcess().get();
1677aa51b79SEd Maste 
1687aa51b79SEd Maste   if (process)
1697aa51b79SEd Maste     byte_order = process->GetByteOrder();
1707aa51b79SEd Maste   return byte_order;
1717aa51b79SEd Maste }
1727aa51b79SEd Maste 
IsRegisterSetAvailable(size_t set_index)173435933ddSDimitry Andric bool RegisterContextPOSIX_powerpc::IsRegisterSetAvailable(size_t set_index) {
1747aa51b79SEd Maste   size_t num_sets = k_num_register_sets;
1757aa51b79SEd Maste 
1767aa51b79SEd Maste   return (set_index < num_sets);
1777aa51b79SEd Maste }
1787aa51b79SEd Maste 
1794ba319b5SDimitry Andric // Used when parsing DWARF and EH frame information and any other object file
1804ba319b5SDimitry Andric // sections that contain register numbers in them.
ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,uint32_t num)181435933ddSDimitry Andric uint32_t RegisterContextPOSIX_powerpc::ConvertRegisterKindToRegisterNumber(
182435933ddSDimitry Andric     lldb::RegisterKind kind, uint32_t num) {
1837aa51b79SEd Maste   const uint32_t num_regs = GetRegisterCount();
1847aa51b79SEd Maste 
1857aa51b79SEd Maste   assert(kind < kNumRegisterKinds);
186435933ddSDimitry Andric   for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
1877aa51b79SEd Maste     const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
1887aa51b79SEd Maste 
1897aa51b79SEd Maste     if (reg_info->kinds[kind] == num)
1907aa51b79SEd Maste       return reg_idx;
1917aa51b79SEd Maste   }
1927aa51b79SEd Maste 
1937aa51b79SEd Maste   return LLDB_INVALID_REGNUM;
1947aa51b79SEd Maste }
195