1 //===-- RegisterContextPOSIX_arm64.h ----------------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #ifndef liblldb_RegisterContextPOSIX_arm64_H_ 11 #define liblldb_RegisterContextPOSIX_arm64_H_ 12 13 #include "lldb/Core/Log.h" 14 #include "RegisterContextPOSIX.h" 15 16 class ProcessMonitor; 17 18 //--------------------------------------------------------------------------- 19 // Internal codes for all ARM64 registers. 20 //--------------------------------------------------------------------------- 21 enum 22 { 23 k_first_gpr_arm64, 24 gpr_x0_arm64 = k_first_gpr_arm64, 25 gpr_x1_arm64, 26 gpr_x2_arm64, 27 gpr_x3_arm64, 28 gpr_x4_arm64, 29 gpr_x5_arm64, 30 gpr_x6_arm64, 31 gpr_x7_arm64, 32 gpr_x8_arm64, 33 gpr_x9_arm64, 34 gpr_x10_arm64, 35 gpr_x11_arm64, 36 gpr_x12_arm64, 37 gpr_x13_arm64, 38 gpr_x14_arm64, 39 gpr_x15_arm64, 40 gpr_x16_arm64, 41 gpr_x17_arm64, 42 gpr_x18_arm64, 43 gpr_x19_arm64, 44 gpr_x20_arm64, 45 gpr_x21_arm64, 46 gpr_x22_arm64, 47 gpr_x23_arm64, 48 gpr_x24_arm64, 49 gpr_x25_arm64, 50 gpr_x26_arm64, 51 gpr_x27_arm64, 52 gpr_x28_arm64, 53 gpr_fp_arm64, 54 gpr_lr_arm64, 55 gpr_sp_arm64, 56 gpr_pc_arm64, 57 gpr_cpsr_arm64, 58 59 k_last_gpr_arm64 = gpr_cpsr_arm64, 60 61 k_first_fpr_arm64, 62 fpu_v0_arm64 = k_first_fpr_arm64, 63 fpu_v1_arm64, 64 fpu_v2_arm64, 65 fpu_v3_arm64, 66 fpu_v4_arm64, 67 fpu_v5_arm64, 68 fpu_v6_arm64, 69 fpu_v7_arm64, 70 fpu_v8_arm64, 71 fpu_v9_arm64, 72 fpu_v10_arm64, 73 fpu_v11_arm64, 74 fpu_v12_arm64, 75 fpu_v13_arm64, 76 fpu_v14_arm64, 77 fpu_v15_arm64, 78 fpu_v16_arm64, 79 fpu_v17_arm64, 80 fpu_v18_arm64, 81 fpu_v19_arm64, 82 fpu_v20_arm64, 83 fpu_v21_arm64, 84 fpu_v22_arm64, 85 fpu_v23_arm64, 86 fpu_v24_arm64, 87 fpu_v25_arm64, 88 fpu_v26_arm64, 89 fpu_v27_arm64, 90 fpu_v28_arm64, 91 fpu_v29_arm64, 92 fpu_v30_arm64, 93 fpu_v31_arm64, 94 fpu_fpsr_arm64, 95 fpu_fpcr_arm64, 96 k_last_fpr_arm64 = fpu_fpcr_arm64, 97 98 exc_far_arm64, 99 exc_esr_arm64, 100 exc_exception_arm64, 101 102 dbg_bvr0_arm64, 103 dbg_bvr1_arm64, 104 dbg_bvr2_arm64, 105 dbg_bvr3_arm64, 106 dbg_bvr4_arm64, 107 dbg_bvr5_arm64, 108 dbg_bvr6_arm64, 109 dbg_bvr7_arm64, 110 dbg_bvr8_arm64, 111 dbg_bvr9_arm64, 112 dbg_bvr10_arm64, 113 dbg_bvr11_arm64, 114 dbg_bvr12_arm64, 115 dbg_bvr13_arm64, 116 dbg_bvr14_arm64, 117 dbg_bvr15_arm64, 118 dbg_bcr0_arm64, 119 dbg_bcr1_arm64, 120 dbg_bcr2_arm64, 121 dbg_bcr3_arm64, 122 dbg_bcr4_arm64, 123 dbg_bcr5_arm64, 124 dbg_bcr6_arm64, 125 dbg_bcr7_arm64, 126 dbg_bcr8_arm64, 127 dbg_bcr9_arm64, 128 dbg_bcr10_arm64, 129 dbg_bcr11_arm64, 130 dbg_bcr12_arm64, 131 dbg_bcr13_arm64, 132 dbg_bcr14_arm64, 133 dbg_bcr15_arm64, 134 dbg_wvr0_arm64, 135 dbg_wvr1_arm64, 136 dbg_wvr2_arm64, 137 dbg_wvr3_arm64, 138 dbg_wvr4_arm64, 139 dbg_wvr5_arm64, 140 dbg_wvr6_arm64, 141 dbg_wvr7_arm64, 142 dbg_wvr8_arm64, 143 dbg_wvr9_arm64, 144 dbg_wvr10_arm64, 145 dbg_wvr11_arm64, 146 dbg_wvr12_arm64, 147 dbg_wvr13_arm64, 148 dbg_wvr14_arm64, 149 dbg_wvr15_arm64, 150 dbg_wcr0_arm64, 151 dbg_wcr1_arm64, 152 dbg_wcr2_arm64, 153 dbg_wcr3_arm64, 154 dbg_wcr4_arm64, 155 dbg_wcr5_arm64, 156 dbg_wcr6_arm64, 157 dbg_wcr7_arm64, 158 dbg_wcr8_arm64, 159 dbg_wcr9_arm64, 160 dbg_wcr10_arm64, 161 dbg_wcr11_arm64, 162 dbg_wcr12_arm64, 163 dbg_wcr13_arm64, 164 dbg_wcr14_arm64, 165 dbg_wcr15_arm64, 166 167 k_num_registers_arm64, 168 k_num_gpr_registers_arm64 = k_last_gpr_arm64 - k_first_gpr_arm64 + 1, 169 k_num_fpr_registers_arm64 = k_last_fpr_arm64 - k_first_fpr_arm64 + 1 170 }; 171 172 class RegisterContextPOSIX_arm64 173 : public lldb_private::RegisterContext 174 { 175 public: 176 RegisterContextPOSIX_arm64 (lldb_private::Thread &thread, 177 uint32_t concrete_frame_idx, 178 lldb_private::RegisterInfoInterface *register_info); 179 180 ~RegisterContextPOSIX_arm64(); 181 182 void 183 Invalidate(); 184 185 void 186 InvalidateAllRegisters(); 187 188 size_t 189 GetRegisterCount(); 190 191 virtual size_t 192 GetGPRSize(); 193 194 virtual unsigned 195 GetRegisterSize(unsigned reg); 196 197 virtual unsigned 198 GetRegisterOffset(unsigned reg); 199 200 const lldb_private::RegisterInfo * 201 GetRegisterInfoAtIndex(size_t reg); 202 203 size_t 204 GetRegisterSetCount(); 205 206 const lldb_private::RegisterSet * 207 GetRegisterSet(size_t set); 208 209 const char * 210 GetRegisterName(unsigned reg); 211 212 uint32_t 213 ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num); 214 215 protected: 216 struct RegInfo 217 { 218 uint32_t num_registers; 219 uint32_t num_gpr_registers; 220 uint32_t num_fpr_registers; 221 222 uint32_t last_gpr; 223 uint32_t first_fpr; 224 uint32_t last_fpr; 225 226 uint32_t first_fpr_v; 227 uint32_t last_fpr_v; 228 229 uint32_t gpr_flags; 230 }; 231 232 // based on RegisterContextDarwin_arm64.h 233 struct VReg 234 { 235 uint8_t bytes[16]; 236 }; 237 238 // based on RegisterContextDarwin_arm64.h 239 struct FPU 240 { 241 VReg v[32]; 242 uint32_t fpsr; 243 uint32_t fpcr; 244 }; 245 246 uint64_t m_gpr_arm64[k_num_gpr_registers_arm64]; // 64-bit general purpose registers. 247 RegInfo m_reg_info; 248 struct RegisterContextPOSIX_arm64::FPU m_fpr; // floating-point registers including extended register sets. 249 std::unique_ptr<lldb_private::RegisterInfoInterface> m_register_info_ap; // Register Info Interface (FreeBSD or Linux) 250 251 // Determines if an extended register set is supported on the processor running the inferior process. 252 virtual bool 253 IsRegisterSetAvailable(size_t set_index); 254 255 virtual const lldb_private::RegisterInfo * 256 GetRegisterInfo(); 257 258 bool 259 IsGPR(unsigned reg); 260 261 bool 262 IsFPR(unsigned reg); 263 264 lldb::ByteOrder GetByteOrder(); 265 266 virtual bool ReadGPR() = 0; 267 virtual bool ReadFPR() = 0; 268 virtual bool WriteGPR() = 0; 269 virtual bool WriteFPR() = 0; 270 }; 271 272 #endif // #ifndef liblldb_RegisterContextPOSIX_arm64_H_ 273