1ac7ddfbfSEd Maste //===-- RegisterContextMach_arm.cpp -----------------------------*- C++ -*-===//
2ac7ddfbfSEd Maste //
3ac7ddfbfSEd Maste // The LLVM Compiler Infrastructure
4ac7ddfbfSEd Maste //
5ac7ddfbfSEd Maste // This file is distributed under the University of Illinois Open Source
6ac7ddfbfSEd Maste // License. See LICENSE.TXT for details.
7ac7ddfbfSEd Maste //
8ac7ddfbfSEd Maste //===----------------------------------------------------------------------===//
9ac7ddfbfSEd Maste
10ac7ddfbfSEd Maste #if defined(__APPLE__)
11ac7ddfbfSEd Maste
12ac7ddfbfSEd Maste #include "RegisterContextMach_arm.h"
13ac7ddfbfSEd Maste
14ac7ddfbfSEd Maste #include <mach/mach_types.h>
15ac7ddfbfSEd Maste #include <mach/thread_act.h>
16ac7ddfbfSEd Maste
17ac7ddfbfSEd Maste
18ac7ddfbfSEd Maste using namespace lldb;
19ac7ddfbfSEd Maste using namespace lldb_private;
20ac7ddfbfSEd Maste
RegisterContextMach_arm(Thread & thread,uint32_t concrete_frame_idx)21435933ddSDimitry Andric RegisterContextMach_arm::RegisterContextMach_arm(Thread &thread,
22435933ddSDimitry Andric uint32_t concrete_frame_idx)
23435933ddSDimitry Andric : RegisterContextDarwin_arm(thread, concrete_frame_idx) {}
24ac7ddfbfSEd Maste
~RegisterContextMach_arm()25435933ddSDimitry Andric RegisterContextMach_arm::~RegisterContextMach_arm() {}
26ac7ddfbfSEd Maste
DoReadGPR(lldb::tid_t tid,int flavor,GPR & gpr)27435933ddSDimitry Andric int RegisterContextMach_arm::DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) {
28ac7ddfbfSEd Maste mach_msg_type_number_t count = GPRWordCount;
29ac7ddfbfSEd Maste return ::thread_get_state(tid, flavor, (thread_state_t)&gpr, &count);
30ac7ddfbfSEd Maste }
31ac7ddfbfSEd Maste
DoReadFPU(lldb::tid_t tid,int flavor,FPU & fpu)32435933ddSDimitry Andric int RegisterContextMach_arm::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) {
33ac7ddfbfSEd Maste mach_msg_type_number_t count = FPUWordCount;
34ac7ddfbfSEd Maste return ::thread_get_state(tid, flavor, (thread_state_t)&fpu, &count);
35ac7ddfbfSEd Maste }
36ac7ddfbfSEd Maste
DoReadEXC(lldb::tid_t tid,int flavor,EXC & exc)37435933ddSDimitry Andric int RegisterContextMach_arm::DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) {
38ac7ddfbfSEd Maste mach_msg_type_number_t count = EXCWordCount;
39ac7ddfbfSEd Maste return ::thread_get_state(tid, flavor, (thread_state_t)&exc, &count);
40ac7ddfbfSEd Maste }
41ac7ddfbfSEd Maste
DoReadDBG(lldb::tid_t tid,int flavor,DBG & dbg)42435933ddSDimitry Andric int RegisterContextMach_arm::DoReadDBG(lldb::tid_t tid, int flavor, DBG &dbg) {
43ac7ddfbfSEd Maste mach_msg_type_number_t count = DBGWordCount;
44ac7ddfbfSEd Maste return ::thread_get_state(tid, flavor, (thread_state_t)&dbg, &count);
45ac7ddfbfSEd Maste }
46ac7ddfbfSEd Maste
DoWriteGPR(lldb::tid_t tid,int flavor,const GPR & gpr)47435933ddSDimitry Andric int RegisterContextMach_arm::DoWriteGPR(lldb::tid_t tid, int flavor,
48435933ddSDimitry Andric const GPR &gpr) {
49acac075bSDimitry Andric return ::thread_set_state(
50acac075bSDimitry Andric tid, flavor, reinterpret_cast<thread_state_t>(const_cast<GPR *>(&gpr)),
51acac075bSDimitry Andric GPRWordCount);
52ac7ddfbfSEd Maste }
53ac7ddfbfSEd Maste
DoWriteFPU(lldb::tid_t tid,int flavor,const FPU & fpu)54435933ddSDimitry Andric int RegisterContextMach_arm::DoWriteFPU(lldb::tid_t tid, int flavor,
55435933ddSDimitry Andric const FPU &fpu) {
56acac075bSDimitry Andric return ::thread_set_state(
57acac075bSDimitry Andric tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)),
58acac075bSDimitry Andric FPUWordCount);
59ac7ddfbfSEd Maste }
60ac7ddfbfSEd Maste
DoWriteEXC(lldb::tid_t tid,int flavor,const EXC & exc)61435933ddSDimitry Andric int RegisterContextMach_arm::DoWriteEXC(lldb::tid_t tid, int flavor,
62435933ddSDimitry Andric const EXC &exc) {
63acac075bSDimitry Andric return ::thread_set_state(
64acac075bSDimitry Andric tid, flavor, reinterpret_cast<thread_state_t>(const_cast<EXC *>(&exc)),
65acac075bSDimitry Andric EXCWordCount);
66ac7ddfbfSEd Maste }
67ac7ddfbfSEd Maste
DoWriteDBG(lldb::tid_t tid,int flavor,const DBG & dbg)68435933ddSDimitry Andric int RegisterContextMach_arm::DoWriteDBG(lldb::tid_t tid, int flavor,
69435933ddSDimitry Andric const DBG &dbg) {
70acac075bSDimitry Andric return ::thread_set_state(
71acac075bSDimitry Andric tid, flavor, reinterpret_cast<thread_state_t>(const_cast<DBG *>(&dbg)),
72acac075bSDimitry Andric DBGWordCount);
73ac7ddfbfSEd Maste }
74ac7ddfbfSEd Maste
75ac7ddfbfSEd Maste #endif
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