1 //===-- RegisterContextLinux_mips64.cpp ------------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===---------------------------------------------------------------------===// 9 10 #if defined(__mips__) 11 12 #include <stddef.h> 13 #include <vector> 14 15 // For eh_frame and DWARF Register numbers 16 #include "RegisterContextLinux_mips64.h" 17 18 // For GP and FP buffers 19 #include "RegisterContext_mips.h" 20 21 // Internal codes for all mips32 and mips64 registers 22 #include "lldb-mips-linux-register-enums.h" 23 24 using namespace lldb; 25 using namespace lldb_private; 26 27 //--------------------------------------------------------------------------- 28 // Include RegisterInfos_mips64 to declare our g_register_infos_mips64 29 // structure. 30 //--------------------------------------------------------------------------- 31 #define DECLARE_REGISTER_INFOS_MIPS64_STRUCT 32 #define LINUX_MIPS64 33 #include "RegisterInfos_mips64.h" 34 #undef LINUX_MIPS64 35 #undef DECLARE_REGISTER_INFOS_MIPS64_STRUCT 36 37 //--------------------------------------------------------------------------- 38 // Include RegisterInfos_mips to declare our g_register_infos_mips structure. 39 //--------------------------------------------------------------------------- 40 #define DECLARE_REGISTER_INFOS_MIPS_STRUCT 41 #include "RegisterInfos_mips.h" 42 #undef DECLARE_REGISTER_INFOS_MIPS_STRUCT 43 44 static const RegisterInfo *GetRegisterInfoPtr(const ArchSpec &target_arch) { 45 switch (target_arch.GetMachine()) { 46 case llvm::Triple::mips64: 47 case llvm::Triple::mips64el: 48 return g_register_infos_mips64; 49 case llvm::Triple::mips: 50 case llvm::Triple::mipsel: 51 return g_register_infos_mips; 52 default: 53 assert(false && "Unhandled target architecture."); 54 return nullptr; 55 } 56 } 57 58 static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch) { 59 switch (target_arch.GetMachine()) { 60 case llvm::Triple::mips64: 61 case llvm::Triple::mips64el: 62 return static_cast<uint32_t>(sizeof(g_register_infos_mips64) / 63 sizeof(g_register_infos_mips64[0])); 64 case llvm::Triple::mips: 65 case llvm::Triple::mipsel: 66 return static_cast<uint32_t>(sizeof(g_register_infos_mips) / 67 sizeof(g_register_infos_mips[0])); 68 default: 69 assert(false && "Unhandled target architecture."); 70 return 0; 71 } 72 } 73 74 uint32_t GetUserRegisterInfoCount(const ArchSpec &target_arch, 75 bool msa_present) { 76 switch (target_arch.GetMachine()) { 77 case llvm::Triple::mips: 78 case llvm::Triple::mipsel: 79 if (msa_present) 80 return static_cast<uint32_t>(k_num_user_registers_mips); 81 return static_cast<uint32_t>(k_num_user_registers_mips - 82 k_num_msa_registers_mips); 83 case llvm::Triple::mips64el: 84 case llvm::Triple::mips64: 85 if (msa_present) 86 return static_cast<uint32_t>(k_num_user_registers_mips64); 87 return static_cast<uint32_t>(k_num_user_registers_mips64 - 88 k_num_msa_registers_mips64); 89 default: 90 assert(false && "Unhandled target architecture."); 91 return 0; 92 } 93 } 94 95 RegisterContextLinux_mips64::RegisterContextLinux_mips64( 96 const ArchSpec &target_arch, bool msa_present) 97 : lldb_private::RegisterInfoInterface(target_arch), 98 m_register_info_p(GetRegisterInfoPtr(target_arch)), 99 m_register_info_count(GetRegisterInfoCount(target_arch)), 100 m_user_register_count( 101 GetUserRegisterInfoCount(target_arch, msa_present)) {} 102 103 size_t RegisterContextLinux_mips64::GetGPRSize() const { 104 return sizeof(GPR_linux_mips); 105 } 106 107 const RegisterInfo *RegisterContextLinux_mips64::GetRegisterInfo() const { 108 return m_register_info_p; 109 } 110 111 uint32_t RegisterContextLinux_mips64::GetRegisterCount() const { 112 return m_register_info_count; 113 } 114 115 uint32_t RegisterContextLinux_mips64::GetUserRegisterCount() const { 116 return m_user_register_count; 117 } 118 119 #endif 120