1 //===-- RegisterContextLinux_mips64.cpp ------------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===---------------------------------------------------------------------===// 9 10 #if defined (__mips__) 11 12 #include <vector> 13 #include <stddef.h> 14 15 // For eh_frame and DWARF Register numbers 16 #include "RegisterContextLinux_mips64.h" 17 18 // For GP and FP buffers 19 #include "RegisterContext_mips.h" 20 21 // Internal codes for all mips32 and mips64 registers 22 #include "lldb-mips-linux-register-enums.h" 23 24 using namespace lldb; 25 using namespace lldb_private; 26 27 //--------------------------------------------------------------------------- 28 // Include RegisterInfos_mips64 to declare our g_register_infos_mips64 structure. 29 //--------------------------------------------------------------------------- 30 #define DECLARE_REGISTER_INFOS_MIPS64_STRUCT 31 #define LINUX_MIPS64 32 #include "RegisterInfos_mips64.h" 33 #undef LINUX_MIPS64 34 #undef DECLARE_REGISTER_INFOS_MIPS64_STRUCT 35 36 //--------------------------------------------------------------------------- 37 // Include RegisterInfos_mips to declare our g_register_infos_mips structure. 38 //--------------------------------------------------------------------------- 39 #define DECLARE_REGISTER_INFOS_MIPS_STRUCT 40 #include "RegisterInfos_mips.h" 41 #undef DECLARE_REGISTER_INFOS_MIPS_STRUCT 42 43 static const RegisterInfo * 44 GetRegisterInfoPtr (const ArchSpec &target_arch) 45 { 46 switch (target_arch.GetMachine()) 47 { 48 case llvm::Triple::mips64: 49 case llvm::Triple::mips64el: 50 return g_register_infos_mips64; 51 case llvm::Triple::mips: 52 case llvm::Triple::mipsel: 53 return g_register_infos_mips; 54 default: 55 assert(false && "Unhandled target architecture."); 56 return nullptr; 57 } 58 } 59 60 static uint32_t 61 GetRegisterInfoCount (const ArchSpec &target_arch) 62 { 63 switch (target_arch.GetMachine()) 64 { 65 case llvm::Triple::mips64: 66 case llvm::Triple::mips64el: 67 return static_cast<uint32_t> (sizeof (g_register_infos_mips64) / sizeof (g_register_infos_mips64 [0])); 68 case llvm::Triple::mips: 69 case llvm::Triple::mipsel: 70 return static_cast<uint32_t> (sizeof (g_register_infos_mips) / sizeof (g_register_infos_mips [0])); 71 default: 72 assert(false && "Unhandled target architecture."); 73 return 0; 74 } 75 } 76 77 uint32_t 78 GetUserRegisterInfoCount (const ArchSpec &target_arch, bool msa_present) 79 { 80 switch (target_arch.GetMachine()) 81 { 82 case llvm::Triple::mips: 83 case llvm::Triple::mipsel: 84 if (msa_present) 85 return static_cast<uint32_t> (k_num_user_registers_mips); 86 return static_cast<uint32_t> (k_num_user_registers_mips - k_num_msa_registers_mips); 87 case llvm::Triple::mips64el: 88 case llvm::Triple::mips64: 89 if (msa_present) 90 return static_cast<uint32_t> (k_num_user_registers_mips64); 91 return static_cast<uint32_t> (k_num_user_registers_mips64 - k_num_msa_registers_mips64); 92 default: 93 assert(false && "Unhandled target architecture."); 94 return 0; 95 } 96 } 97 98 RegisterContextLinux_mips64::RegisterContextLinux_mips64(const ArchSpec &target_arch, bool msa_present) : 99 lldb_private::RegisterInfoInterface(target_arch), 100 m_register_info_p (GetRegisterInfoPtr (target_arch)), 101 m_register_info_count (GetRegisterInfoCount (target_arch)), 102 m_user_register_count (GetUserRegisterInfoCount (target_arch, msa_present)) 103 { 104 } 105 106 size_t 107 RegisterContextLinux_mips64::GetGPRSize() const 108 { 109 return sizeof(GPR_linux_mips); 110 } 111 112 const RegisterInfo * 113 RegisterContextLinux_mips64::GetRegisterInfo() const 114 { 115 return m_register_info_p; 116 } 117 118 uint32_t 119 RegisterContextLinux_mips64::GetRegisterCount () const 120 { 121 return m_register_info_count; 122 } 123 124 uint32_t 125 RegisterContextLinux_mips64::GetUserRegisterCount () const 126 { 127 return m_user_register_count; 128 } 129 130 #endif 131