1 //===-- RegisterContextLinux_mips.cpp ------------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===---------------------------------------------------------------------===// 9 10 #include <stddef.h> 11 #include <vector> 12 13 // For eh_frame and DWARF Register numbers 14 #include "RegisterContextLinux_mips.h" 15 16 // Internal codes for mips registers 17 #include "lldb-mips-linux-register-enums.h" 18 19 // For GP and FP buffers 20 #include "RegisterContext_mips.h" 21 22 using namespace lldb_private; 23 using namespace lldb; 24 25 //--------------------------------------------------------------------------- 26 // Include RegisterInfos_mips to declare our g_register_infos_mips structure. 27 //--------------------------------------------------------------------------- 28 #define DECLARE_REGISTER_INFOS_MIPS_STRUCT 29 #include "RegisterInfos_mips.h" 30 #undef DECLARE_REGISTER_INFOS_MIPS_STRUCT 31 32 // mips general purpose registers. 33 const uint32_t g_gp_regnums_mips[] = { 34 gpr_zero_mips, gpr_r1_mips, gpr_r2_mips, gpr_r3_mips, 35 gpr_r4_mips, gpr_r5_mips, gpr_r6_mips, gpr_r7_mips, 36 gpr_r8_mips, gpr_r9_mips, gpr_r10_mips, gpr_r11_mips, 37 gpr_r12_mips, gpr_r13_mips, gpr_r14_mips, gpr_r15_mips, 38 gpr_r16_mips, gpr_r17_mips, gpr_r18_mips, gpr_r19_mips, 39 gpr_r20_mips, gpr_r21_mips, gpr_r22_mips, gpr_r23_mips, 40 gpr_r24_mips, gpr_r25_mips, gpr_r26_mips, gpr_r27_mips, 41 gpr_gp_mips, gpr_sp_mips, gpr_r30_mips, gpr_ra_mips, 42 gpr_sr_mips, gpr_mullo_mips, gpr_mulhi_mips, gpr_badvaddr_mips, 43 gpr_cause_mips, gpr_pc_mips, gpr_config5_mips, 44 LLDB_INVALID_REGNUM // register sets need to end with this flag 45 }; 46 47 static_assert((sizeof(g_gp_regnums_mips) / sizeof(g_gp_regnums_mips[0])) - 1 == 48 k_num_gpr_registers_mips, 49 "g_gp_regnums_mips has wrong number of register infos"); 50 // mips floating point registers. 51 const uint32_t g_fp_regnums_mips[] = { 52 fpr_f0_mips, fpr_f1_mips, fpr_f2_mips, fpr_f3_mips, 53 fpr_f4_mips, fpr_f5_mips, fpr_f6_mips, fpr_f7_mips, 54 fpr_f8_mips, fpr_f9_mips, fpr_f10_mips, fpr_f11_mips, 55 fpr_f12_mips, fpr_f13_mips, fpr_f14_mips, fpr_f15_mips, 56 fpr_f16_mips, fpr_f17_mips, fpr_f18_mips, fpr_f19_mips, 57 fpr_f20_mips, fpr_f21_mips, fpr_f22_mips, fpr_f23_mips, 58 fpr_f24_mips, fpr_f25_mips, fpr_f26_mips, fpr_f27_mips, 59 fpr_f28_mips, fpr_f29_mips, fpr_f30_mips, fpr_f31_mips, 60 fpr_fcsr_mips, fpr_fir_mips, fpr_config5_mips, 61 LLDB_INVALID_REGNUM // register sets need to end with this flag 62 }; 63 64 static_assert((sizeof(g_fp_regnums_mips) / sizeof(g_fp_regnums_mips[0])) - 1 == 65 k_num_fpr_registers_mips, 66 "g_fp_regnums_mips has wrong number of register infos"); 67 68 // mips MSA registers. 69 const uint32_t g_msa_regnums_mips[] = { 70 msa_w0_mips, msa_w1_mips, msa_w2_mips, msa_w3_mips, 71 msa_w4_mips, msa_w5_mips, msa_w6_mips, msa_w7_mips, 72 msa_w8_mips, msa_w9_mips, msa_w10_mips, msa_w11_mips, 73 msa_w12_mips, msa_w13_mips, msa_w14_mips, msa_w15_mips, 74 msa_w16_mips, msa_w17_mips, msa_w18_mips, msa_w19_mips, 75 msa_w20_mips, msa_w21_mips, msa_w22_mips, msa_w23_mips, 76 msa_w24_mips, msa_w25_mips, msa_w26_mips, msa_w27_mips, 77 msa_w28_mips, msa_w29_mips, msa_w30_mips, msa_w31_mips, 78 msa_fcsr_mips, msa_fir_mips, msa_mcsr_mips, msa_mir_mips, 79 msa_config5_mips, 80 LLDB_INVALID_REGNUM // register sets need to end with this flag 81 }; 82 83 static_assert((sizeof(g_msa_regnums_mips) / sizeof(g_msa_regnums_mips[0])) - 84 1 == 85 k_num_msa_registers_mips, 86 "g_msa_regnums_mips has wrong number of register infos"); 87 88 // Number of register sets provided by this context. 89 constexpr size_t k_num_register_sets = 3; 90 91 // Register sets for mips. 92 static const RegisterSet g_reg_sets_mips[k_num_register_sets] = { 93 {"General Purpose Registers", "gpr", k_num_gpr_registers_mips, 94 g_gp_regnums_mips}, 95 {"Floating Point Registers", "fpu", k_num_fpr_registers_mips, 96 g_fp_regnums_mips}, 97 {"MSA Registers", "msa", k_num_msa_registers_mips, g_msa_regnums_mips}}; 98 99 uint32_t GetUserRegisterInfoCount(bool msa_present) { 100 if (msa_present) 101 return static_cast<uint32_t>(k_num_user_registers_mips); 102 return static_cast<uint32_t>(k_num_user_registers_mips - 103 k_num_msa_registers_mips); 104 } 105 106 RegisterContextLinux_mips::RegisterContextLinux_mips( 107 const ArchSpec &target_arch, bool msa_present) 108 : RegisterInfoInterface(target_arch), 109 m_user_register_count(GetUserRegisterInfoCount(msa_present)) {} 110 111 size_t RegisterContextLinux_mips::GetGPRSize() const { 112 return sizeof(GPR_linux_mips); 113 } 114 115 const RegisterInfo *RegisterContextLinux_mips::GetRegisterInfo() const { 116 switch (m_target_arch.GetMachine()) { 117 case llvm::Triple::mips: 118 case llvm::Triple::mipsel: 119 return g_register_infos_mips; 120 default: 121 assert(false && "Unhandled target architecture."); 122 return NULL; 123 } 124 } 125 126 const RegisterSet * 127 RegisterContextLinux_mips::GetRegisterSet(size_t set) const { 128 if (set >= k_num_register_sets) 129 return nullptr; 130 switch (m_target_arch.GetMachine()) { 131 case llvm::Triple::mips: 132 case llvm::Triple::mipsel: 133 return &g_reg_sets_mips[set]; 134 default: 135 assert(false && "Unhandled target architecture."); 136 return nullptr; 137 } 138 } 139 140 size_t 141 RegisterContextLinux_mips::GetRegisterSetCount() const { 142 return k_num_register_sets; 143 } 144 145 uint32_t RegisterContextLinux_mips::GetRegisterCount() const { 146 return static_cast<uint32_t>(sizeof(g_register_infos_mips) / 147 sizeof(g_register_infos_mips[0])); 148 } 149 150 uint32_t RegisterContextLinux_mips::GetUserRegisterCount() const { 151 return static_cast<uint32_t>(m_user_register_count); 152 } 153