1 //===-- RegisterContextLinux_mips.cpp ------------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===---------------------------------------------------------------------===// 9 10 #include <vector> 11 #include <stddef.h> 12 13 // For GDB, GCC and DWARF Register numbers 14 #include "RegisterContextLinux_mips.h" 15 16 // Internal codes for mips registers 17 #include "lldb-mips64-register-enums.h" 18 #include "RegisterContext_mips64.h" 19 20 using namespace lldb_private; 21 using namespace lldb; 22 23 // GP registers 24 typedef struct _GPR 25 { 26 uint32_t zero; 27 uint32_t r1; 28 uint32_t r2; 29 uint32_t r3; 30 uint32_t r4; 31 uint32_t r5; 32 uint32_t r6; 33 uint32_t r7; 34 uint32_t r8; 35 uint32_t r9; 36 uint32_t r10; 37 uint32_t r11; 38 uint32_t r12; 39 uint32_t r13; 40 uint32_t r14; 41 uint32_t r15; 42 uint32_t r16; 43 uint32_t r17; 44 uint32_t r18; 45 uint32_t r19; 46 uint32_t r20; 47 uint32_t r21; 48 uint32_t r22; 49 uint32_t r23; 50 uint32_t r24; 51 uint32_t r25; 52 uint32_t r26; 53 uint32_t r27; 54 uint32_t gp; 55 uint32_t sp; 56 uint32_t r30; 57 uint32_t ra; 58 uint32_t mullo; 59 uint32_t mulhi; 60 uint32_t pc; 61 uint32_t badvaddr; 62 uint32_t sr; 63 uint32_t cause; 64 } GPR; 65 66 //--------------------------------------------------------------------------- 67 // Include RegisterInfos_mips to declare our g_register_infos_mips structure. 68 //--------------------------------------------------------------------------- 69 #define DECLARE_REGISTER_INFOS_MIPS_STRUCT 70 #include "RegisterInfos_mips.h" 71 #undef DECLARE_REGISTER_INFOS_MIPS_STRUCT 72 73 RegisterContextLinux_mips::RegisterContextLinux_mips(const ArchSpec &target_arch) : 74 RegisterInfoInterface(target_arch) 75 { 76 } 77 78 size_t 79 RegisterContextLinux_mips::GetGPRSize() const 80 { 81 return sizeof(GPR); 82 } 83 84 const RegisterInfo * 85 RegisterContextLinux_mips::GetRegisterInfo() const 86 { 87 switch (m_target_arch.GetMachine()) 88 { 89 case llvm::Triple::mips: 90 case llvm::Triple::mipsel: 91 return g_register_infos_mips; 92 default: 93 assert(false && "Unhandled target architecture."); 94 return NULL; 95 } 96 } 97 98 uint32_t 99 RegisterContextLinux_mips::GetRegisterCount () const 100 { 101 return static_cast<uint32_t> (sizeof (g_register_infos_mips) / sizeof (g_register_infos_mips [0])); 102 } 103