10127ef0fSEd Maste //===-- RegisterContextLinux_i386.cpp --------------------------*- C++ -*-===//
20127ef0fSEd Maste //
30127ef0fSEd Maste //                     The LLVM Compiler Infrastructure
40127ef0fSEd Maste //
50127ef0fSEd Maste // This file is distributed under the University of Illinois Open Source
60127ef0fSEd Maste // License. See LICENSE.TXT for details.
70127ef0fSEd Maste //
80127ef0fSEd Maste //===---------------------------------------------------------------------===//
90127ef0fSEd Maste 
100127ef0fSEd Maste #include "RegisterContextLinux_i386.h"
11435933ddSDimitry Andric #include "RegisterContextPOSIX_x86.h"
120127ef0fSEd Maste 
130127ef0fSEd Maste using namespace lldb_private;
140127ef0fSEd Maste using namespace lldb;
150127ef0fSEd Maste 
16435933ddSDimitry Andric struct GPR {
170127ef0fSEd Maste   uint32_t ebx;
180127ef0fSEd Maste   uint32_t ecx;
190127ef0fSEd Maste   uint32_t edx;
200127ef0fSEd Maste   uint32_t esi;
210127ef0fSEd Maste   uint32_t edi;
220127ef0fSEd Maste   uint32_t ebp;
230127ef0fSEd Maste   uint32_t eax;
240127ef0fSEd Maste   uint32_t ds;
250127ef0fSEd Maste   uint32_t es;
260127ef0fSEd Maste   uint32_t fs;
270127ef0fSEd Maste   uint32_t gs;
289f2f44ceSEd Maste   uint32_t orig_eax;
290127ef0fSEd Maste   uint32_t eip;
300127ef0fSEd Maste   uint32_t cs;
310127ef0fSEd Maste   uint32_t eflags;
320127ef0fSEd Maste   uint32_t esp;
330127ef0fSEd Maste   uint32_t ss;
340127ef0fSEd Maste };
350127ef0fSEd Maste 
36435933ddSDimitry Andric struct FPR_i386 {
370127ef0fSEd Maste   uint16_t fctrl;     // FPU Control Word (fcw)
380127ef0fSEd Maste   uint16_t fstat;     // FPU Status Word (fsw)
39*0fa43771SDimitry Andric   uint16_t ftag;      // FPU Tag Word (ftw)
400127ef0fSEd Maste   uint16_t fop;       // Last Instruction Opcode (fop)
41435933ddSDimitry Andric   union {
42435933ddSDimitry Andric     struct {
430127ef0fSEd Maste       uint64_t fip; // Instruction Pointer
440127ef0fSEd Maste       uint64_t fdp; // Data Pointer
450127ef0fSEd Maste     } x86_64;
46435933ddSDimitry Andric     struct {
470127ef0fSEd Maste       uint32_t fioff; // FPU IP Offset (fip)
480127ef0fSEd Maste       uint32_t fiseg; // FPU IP Selector (fcs)
490127ef0fSEd Maste       uint32_t fooff; // FPU Operand Pointer Offset (foo)
500127ef0fSEd Maste       uint32_t foseg; // FPU Operand Pointer Selector (fos)
51435933ddSDimitry Andric     } i386_; // Added _ in the end to avoid error with gcc defining i386 in some
52435933ddSDimitry Andric              // cases
530127ef0fSEd Maste   } ptr;
540127ef0fSEd Maste   uint32_t mxcsr;     // MXCSR Register State
550127ef0fSEd Maste   uint32_t mxcsrmask; // MXCSR Mask
560127ef0fSEd Maste   MMSReg stmm[8];     // 8*16 bytes for each FP-reg = 128 bytes
570127ef0fSEd Maste   XMMReg xmm[8];      // 8*16 bytes for each XMM-reg = 128 bytes
580127ef0fSEd Maste   uint32_t padding[56];
590127ef0fSEd Maste };
600127ef0fSEd Maste 
61435933ddSDimitry Andric struct UserArea {
620127ef0fSEd Maste   GPR regs;               // General purpose registers.
630127ef0fSEd Maste   int32_t fpvalid;        // True if FPU is being used.
640127ef0fSEd Maste   FPR_i386 i387;          // FPU registers.
650127ef0fSEd Maste   uint32_t tsize;         // Text segment size.
660127ef0fSEd Maste   uint32_t dsize;         // Data segment size.
670127ef0fSEd Maste   uint32_t ssize;         // Stack segment size.
680127ef0fSEd Maste   uint32_t start_code;    // VM address of text.
690127ef0fSEd Maste   uint32_t start_stack;   // VM address of stack bottom (top in rsp).
700127ef0fSEd Maste   int32_t signal;         // Signal causing core dump.
710127ef0fSEd Maste   int32_t reserved;       // Unused.
720127ef0fSEd Maste   uint32_t ar0;           // Location of GPR's.
730127ef0fSEd Maste   uint32_t fpstate;       // Location of FPR's. Should be a FXSTATE *, but this
740127ef0fSEd Maste                           //  has to be 32-bits even on 64-bit systems.
750127ef0fSEd Maste   uint32_t magic;         // Identifier for core dumps.
760127ef0fSEd Maste   char u_comm[32];        // Command causing core dump.
770127ef0fSEd Maste   uint32_t u_debugreg[8]; // Debug registers (DR0 - DR7).
780127ef0fSEd Maste };
790127ef0fSEd Maste 
800127ef0fSEd Maste #define DR_SIZE sizeof(((UserArea *)NULL)->u_debugreg[0])
810127ef0fSEd Maste #define DR_0_OFFSET 0xFC
82435933ddSDimitry Andric #define DR_OFFSET(reg_index) (DR_0_OFFSET + (reg_index * 4))
830127ef0fSEd Maste #define FPR_SIZE(reg) sizeof(((FPR_i386 *)NULL)->reg)
840127ef0fSEd Maste 
850127ef0fSEd Maste //---------------------------------------------------------------------------
860127ef0fSEd Maste // Include RegisterInfos_i386 to declare our g_register_infos_i386 structure.
870127ef0fSEd Maste //---------------------------------------------------------------------------
880127ef0fSEd Maste #define DECLARE_REGISTER_INFOS_I386_STRUCT
890127ef0fSEd Maste #include "RegisterInfos_i386.h"
900127ef0fSEd Maste #undef DECLARE_REGISTER_INFOS_I386_STRUCT
910127ef0fSEd Maste 
RegisterContextLinux_i386(const ArchSpec & target_arch)92435933ddSDimitry Andric RegisterContextLinux_i386::RegisterContextLinux_i386(
93435933ddSDimitry Andric     const ArchSpec &target_arch)
94435933ddSDimitry Andric     : RegisterInfoInterface(target_arch) {
95435933ddSDimitry Andric   RegisterInfo orig_ax = {"orig_eax",
96435933ddSDimitry Andric                           NULL,
97435933ddSDimitry Andric                           sizeof(((GPR *)NULL)->orig_eax),
98435933ddSDimitry Andric                           (LLVM_EXTENSION offsetof(GPR, orig_eax)),
99435933ddSDimitry Andric                           eEncodingUint,
100435933ddSDimitry Andric                           eFormatHex,
101435933ddSDimitry Andric                           {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
102435933ddSDimitry Andric                            LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
103435933ddSDimitry Andric                            LLDB_INVALID_REGNUM},
104435933ddSDimitry Andric                           nullptr,
105435933ddSDimitry Andric                           nullptr,
106435933ddSDimitry Andric                           nullptr,
107435933ddSDimitry Andric                           0};
1089f2f44ceSEd Maste   d_register_infos.push_back(orig_ax);
1090127ef0fSEd Maste }
1100127ef0fSEd Maste 
GetGPRSize() const111435933ddSDimitry Andric size_t RegisterContextLinux_i386::GetGPRSize() const { return sizeof(GPR); }
1120127ef0fSEd Maste 
GetRegisterInfo() const113435933ddSDimitry Andric const RegisterInfo *RegisterContextLinux_i386::GetRegisterInfo() const {
114435933ddSDimitry Andric   switch (m_target_arch.GetMachine()) {
1150127ef0fSEd Maste   case llvm::Triple::x86:
1161c3bbb01SEd Maste   case llvm::Triple::x86_64:
1170127ef0fSEd Maste     return g_register_infos_i386;
1180127ef0fSEd Maste   default:
1190127ef0fSEd Maste     assert(false && "Unhandled target architecture.");
1200127ef0fSEd Maste     return NULL;
1210127ef0fSEd Maste   }
1220127ef0fSEd Maste }
1230127ef0fSEd Maste 
GetRegisterCount() const124435933ddSDimitry Andric uint32_t RegisterContextLinux_i386::GetRegisterCount() const {
125435933ddSDimitry Andric   return static_cast<uint32_t>(sizeof(g_register_infos_i386) /
126435933ddSDimitry Andric                                sizeof(g_register_infos_i386[0]));
1270127ef0fSEd Maste }
1280127ef0fSEd Maste 
GetUserRegisterCount() const129435933ddSDimitry Andric uint32_t RegisterContextLinux_i386::GetUserRegisterCount() const {
1301c3bbb01SEd Maste   return static_cast<uint32_t>(k_num_user_registers_i386);
1311c3bbb01SEd Maste }
1329f2f44ceSEd Maste 
1339f2f44ceSEd Maste const std::vector<lldb_private::RegisterInfo> *
GetDynamicRegisterInfoP() const134435933ddSDimitry Andric RegisterContextLinux_i386::GetDynamicRegisterInfoP() const {
1359f2f44ceSEd Maste   return &d_register_infos;
1369f2f44ceSEd Maste }
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