1 //===- Target.cpp ---------------------------------------------------------===// 2 // 3 // The LLVM Linker 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // Machine-specific things, such as applying relocations, creation of 11 // GOT or PLT entries, etc., are handled in this file. 12 // 13 // Refer the ELF spec for the single letter variables, S, A or P, used 14 // in this file. 15 // 16 // Some functions defined in this file has "relaxTls" as part of their names. 17 // They do peephole optimization for TLS variables by rewriting instructions. 18 // They are not part of the ABI but optional optimization, so you can skip 19 // them if you are not interested in how TLS variables are optimized. 20 // See the following paper for the details. 21 // 22 // Ulrich Drepper, ELF Handling For Thread-Local Storage 23 // http://www.akkadia.org/drepper/tls.pdf 24 // 25 //===----------------------------------------------------------------------===// 26 27 #include "Target.h" 28 #include "InputFiles.h" 29 #include "OutputSections.h" 30 #include "SymbolTable.h" 31 #include "Symbols.h" 32 #include "lld/Common/ErrorHandler.h" 33 #include "llvm/Object/ELF.h" 34 35 using namespace llvm; 36 using namespace llvm::object; 37 using namespace llvm::ELF; 38 using namespace lld; 39 using namespace lld::elf; 40 41 TargetInfo *elf::Target; 42 43 std::string lld::toString(RelType Type) { 44 StringRef S = getELFRelocationTypeName(elf::Config->EMachine, Type); 45 if (S == "Unknown") 46 return ("Unknown (" + Twine(Type) + ")").str(); 47 return S; 48 } 49 50 TargetInfo *elf::getTarget() { 51 switch (Config->EMachine) { 52 case EM_386: 53 case EM_IAMCU: 54 return getX86TargetInfo(); 55 case EM_AARCH64: 56 return getAArch64TargetInfo(); 57 case EM_AMDGPU: 58 return getAMDGPUTargetInfo(); 59 case EM_ARM: 60 return getARMTargetInfo(); 61 case EM_AVR: 62 return getAVRTargetInfo(); 63 case EM_HEXAGON: 64 return getHexagonTargetInfo(); 65 case EM_MIPS: 66 switch (Config->EKind) { 67 case ELF32LEKind: 68 return getMipsTargetInfo<ELF32LE>(); 69 case ELF32BEKind: 70 return getMipsTargetInfo<ELF32BE>(); 71 case ELF64LEKind: 72 return getMipsTargetInfo<ELF64LE>(); 73 case ELF64BEKind: 74 return getMipsTargetInfo<ELF64BE>(); 75 default: 76 llvm_unreachable("unsupported MIPS target"); 77 } 78 case EM_MSP430: 79 return getMSP430TargetInfo(); 80 case EM_PPC: 81 return getPPCTargetInfo(); 82 case EM_PPC64: 83 return getPPC64TargetInfo(); 84 case EM_RISCV: 85 return getRISCVTargetInfo(); 86 case EM_SPARCV9: 87 return getSPARCV9TargetInfo(); 88 case EM_X86_64: 89 if (Config->EKind == ELF32LEKind) 90 return getX32TargetInfo(); 91 return getX86_64TargetInfo(); 92 } 93 llvm_unreachable("unknown target machine"); 94 } 95 96 template <class ELFT> static ErrorPlace getErrPlace(const uint8_t *Loc) { 97 for (InputSectionBase *D : InputSections) { 98 auto *IS = cast<InputSection>(D); 99 if (!IS->getParent()) 100 continue; 101 102 uint8_t *ISLoc = IS->getParent()->Loc + IS->OutSecOff; 103 if (ISLoc <= Loc && Loc < ISLoc + IS->getSize()) 104 return {IS, IS->template getLocation<ELFT>(Loc - ISLoc) + ": "}; 105 } 106 return {}; 107 } 108 109 ErrorPlace elf::getErrorPlace(const uint8_t *Loc) { 110 switch (Config->EKind) { 111 case ELF32LEKind: 112 return getErrPlace<ELF32LE>(Loc); 113 case ELF32BEKind: 114 return getErrPlace<ELF32BE>(Loc); 115 case ELF64LEKind: 116 return getErrPlace<ELF64LE>(Loc); 117 case ELF64BEKind: 118 return getErrPlace<ELF64BE>(Loc); 119 default: 120 llvm_unreachable("unknown ELF type"); 121 } 122 } 123 124 TargetInfo::~TargetInfo() {} 125 126 int64_t TargetInfo::getImplicitAddend(const uint8_t *Buf, RelType Type) const { 127 return 0; 128 } 129 130 bool TargetInfo::usesOnlyLowPageBits(RelType Type) const { return false; } 131 132 bool TargetInfo::needsThunk(RelExpr Expr, RelType Type, const InputFile *File, 133 uint64_t BranchAddr, const Symbol &S) const { 134 return false; 135 } 136 137 bool TargetInfo::adjustPrologueForCrossSplitStack(uint8_t *Loc, uint8_t *End, 138 uint8_t StOther) const { 139 llvm_unreachable("Target doesn't support split stacks."); 140 } 141 142 bool TargetInfo::inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const { 143 return true; 144 } 145 146 void TargetInfo::writeIgotPlt(uint8_t *Buf, const Symbol &S) const { 147 writeGotPlt(Buf, S); 148 } 149 150 RelExpr TargetInfo::adjustRelaxExpr(RelType Type, const uint8_t *Data, 151 RelExpr Expr) const { 152 return Expr; 153 } 154 155 void TargetInfo::relaxGot(uint8_t *Loc, uint64_t Val) const { 156 llvm_unreachable("Should not have claimed to be relaxable"); 157 } 158 159 void TargetInfo::relaxTlsGdToLe(uint8_t *Loc, RelType Type, 160 uint64_t Val) const { 161 llvm_unreachable("Should not have claimed to be relaxable"); 162 } 163 164 void TargetInfo::relaxTlsGdToIe(uint8_t *Loc, RelType Type, 165 uint64_t Val) const { 166 llvm_unreachable("Should not have claimed to be relaxable"); 167 } 168 169 void TargetInfo::relaxTlsIeToLe(uint8_t *Loc, RelType Type, 170 uint64_t Val) const { 171 llvm_unreachable("Should not have claimed to be relaxable"); 172 } 173 174 void TargetInfo::relaxTlsLdToLe(uint8_t *Loc, RelType Type, 175 uint64_t Val) const { 176 llvm_unreachable("Should not have claimed to be relaxable"); 177 } 178 179 uint64_t TargetInfo::getImageBase() { 180 // Use -image-base if set. Fall back to the target default if not. 181 if (Config->ImageBase) 182 return *Config->ImageBase; 183 return Config->Pic ? 0 : DefaultImageBase; 184 } 185