1 //===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "XCoreTargetMachine.h"
14 #include "MCTargetDesc/XCoreMCTargetDesc.h"
15 #include "XCore.h"
16 #include "XCoreTargetObjectFile.h"
17 #include "XCoreTargetTransformInfo.h"
18 #include "llvm/ADT/Optional.h"
19 #include "llvm/ADT/STLExtras.h"
20 #include "llvm/Analysis/TargetTransformInfo.h"
21 #include "llvm/CodeGen/Passes.h"
22 #include "llvm/CodeGen/TargetPassConfig.h"
23 #include "llvm/Support/CodeGen.h"
24 #include "llvm/Support/TargetRegistry.h"
25 
26 using namespace llvm;
27 
28 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
29   if (!RM.hasValue())
30     return Reloc::Static;
31   return *RM;
32 }
33 
34 /// Create an ILP32 architecture model
35 ///
36 XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Triple &TT,
37                                        StringRef CPU, StringRef FS,
38                                        const TargetOptions &Options,
39                                        Optional<Reloc::Model> RM,
40                                        CodeModel::Model CM,
41                                        CodeGenOpt::Level OL)
42     : LLVMTargetMachine(
43           T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32",
44           TT, CPU, FS, Options, getEffectiveRelocModel(RM), CM, OL),
45       TLOF(llvm::make_unique<XCoreTargetObjectFile>()),
46       Subtarget(TT, CPU, FS, *this) {
47   initAsmInfo();
48 }
49 
50 XCoreTargetMachine::~XCoreTargetMachine() = default;
51 
52 namespace {
53 
54 /// XCore Code Generator Pass Configuration Options.
55 class XCorePassConfig : public TargetPassConfig {
56 public:
57   XCorePassConfig(XCoreTargetMachine &TM, PassManagerBase &PM)
58     : TargetPassConfig(TM, PM) {}
59 
60   XCoreTargetMachine &getXCoreTargetMachine() const {
61     return getTM<XCoreTargetMachine>();
62   }
63 
64   void addIRPasses() override;
65   bool addPreISel() override;
66   bool addInstSelector() override;
67   void addPreEmitPass() override;
68 };
69 
70 } // end anonymous namespace
71 
72 TargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) {
73   return new XCorePassConfig(*this, PM);
74 }
75 
76 void XCorePassConfig::addIRPasses() {
77   addPass(createAtomicExpandPass());
78 
79   TargetPassConfig::addIRPasses();
80 }
81 
82 bool XCorePassConfig::addPreISel() {
83   addPass(createXCoreLowerThreadLocalPass());
84   return false;
85 }
86 
87 bool XCorePassConfig::addInstSelector() {
88   addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel()));
89   return false;
90 }
91 
92 void XCorePassConfig::addPreEmitPass() {
93   addPass(createXCoreFrameToArgsOffsetEliminationPass(), false);
94 }
95 
96 // Force static initialization.
97 extern "C" void LLVMInitializeXCoreTarget() {
98   RegisterTargetMachine<XCoreTargetMachine> X(getTheXCoreTarget());
99 }
100 
101 TargetIRAnalysis XCoreTargetMachine::getTargetIRAnalysis() {
102   return TargetIRAnalysis([this](const Function &F) {
103     return TargetTransformInfo(XCoreTTIImpl(this, F));
104   });
105 }
106