1 //===----- X86WinAllocaExpander.cpp - Expand WinAlloca pseudo instruction -===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines a pass that expands WinAlloca pseudo-instructions. 11 // 12 // It performs a conservative analysis to determine whether each allocation 13 // falls within a region of the stack that is safe to use, or whether stack 14 // probes must be emitted. 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "X86.h" 19 #include "X86InstrBuilder.h" 20 #include "X86InstrInfo.h" 21 #include "X86MachineFunctionInfo.h" 22 #include "X86Subtarget.h" 23 #include "llvm/ADT/PostOrderIterator.h" 24 #include "llvm/CodeGen/MachineFunctionPass.h" 25 #include "llvm/CodeGen/MachineInstrBuilder.h" 26 #include "llvm/CodeGen/MachineRegisterInfo.h" 27 #include "llvm/CodeGen/Passes.h" 28 #include "llvm/CodeGen/TargetInstrInfo.h" 29 #include "llvm/IR/Function.h" 30 #include "llvm/Support/raw_ostream.h" 31 32 using namespace llvm; 33 34 namespace { 35 36 class X86WinAllocaExpander : public MachineFunctionPass { 37 public: 38 X86WinAllocaExpander() : MachineFunctionPass(ID) {} 39 40 bool runOnMachineFunction(MachineFunction &MF) override; 41 42 private: 43 /// Strategies for lowering a WinAlloca. 44 enum Lowering { TouchAndSub, Sub, Probe }; 45 46 /// Deterministic-order map from WinAlloca instruction to desired lowering. 47 typedef MapVector<MachineInstr*, Lowering> LoweringMap; 48 49 /// Compute which lowering to use for each WinAlloca instruction. 50 void computeLowerings(MachineFunction &MF, LoweringMap& Lowerings); 51 52 /// Get the appropriate lowering based on current offset and amount. 53 Lowering getLowering(int64_t CurrentOffset, int64_t AllocaAmount); 54 55 /// Lower a WinAlloca instruction. 56 void lower(MachineInstr* MI, Lowering L); 57 58 MachineRegisterInfo *MRI; 59 const X86Subtarget *STI; 60 const TargetInstrInfo *TII; 61 const X86RegisterInfo *TRI; 62 unsigned StackPtr; 63 unsigned SlotSize; 64 int64_t StackProbeSize; 65 bool NoStackArgProbe; 66 67 StringRef getPassName() const override { return "X86 WinAlloca Expander"; } 68 static char ID; 69 }; 70 71 char X86WinAllocaExpander::ID = 0; 72 73 } // end anonymous namespace 74 75 FunctionPass *llvm::createX86WinAllocaExpander() { 76 return new X86WinAllocaExpander(); 77 } 78 79 /// Return the allocation amount for a WinAlloca instruction, or -1 if unknown. 80 static int64_t getWinAllocaAmount(MachineInstr *MI, MachineRegisterInfo *MRI) { 81 assert(MI->getOpcode() == X86::WIN_ALLOCA_32 || 82 MI->getOpcode() == X86::WIN_ALLOCA_64); 83 assert(MI->getOperand(0).isReg()); 84 85 unsigned AmountReg = MI->getOperand(0).getReg(); 86 MachineInstr *Def = MRI->getUniqueVRegDef(AmountReg); 87 88 // Look through copies. 89 while (Def && Def->isCopy() && Def->getOperand(1).isReg()) 90 Def = MRI->getUniqueVRegDef(Def->getOperand(1).getReg()); 91 92 if (!Def || 93 (Def->getOpcode() != X86::MOV32ri && Def->getOpcode() != X86::MOV64ri) || 94 !Def->getOperand(1).isImm()) 95 return -1; 96 97 return Def->getOperand(1).getImm(); 98 } 99 100 X86WinAllocaExpander::Lowering 101 X86WinAllocaExpander::getLowering(int64_t CurrentOffset, 102 int64_t AllocaAmount) { 103 // For a non-constant amount or a large amount, we have to probe. 104 if (AllocaAmount < 0 || AllocaAmount > StackProbeSize) 105 return Probe; 106 107 // If it fits within the safe region of the stack, just subtract. 108 if (CurrentOffset + AllocaAmount <= StackProbeSize) 109 return Sub; 110 111 // Otherwise, touch the current tip of the stack, then subtract. 112 return TouchAndSub; 113 } 114 115 static bool isPushPop(const MachineInstr &MI) { 116 switch (MI.getOpcode()) { 117 case X86::PUSH32i8: 118 case X86::PUSH32r: 119 case X86::PUSH32rmm: 120 case X86::PUSH32rmr: 121 case X86::PUSHi32: 122 case X86::PUSH64i8: 123 case X86::PUSH64r: 124 case X86::PUSH64rmm: 125 case X86::PUSH64rmr: 126 case X86::PUSH64i32: 127 case X86::POP32r: 128 case X86::POP64r: 129 return true; 130 default: 131 return false; 132 } 133 } 134 135 void X86WinAllocaExpander::computeLowerings(MachineFunction &MF, 136 LoweringMap &Lowerings) { 137 // Do a one-pass reverse post-order walk of the CFG to conservatively estimate 138 // the offset between the stack pointer and the lowest touched part of the 139 // stack, and use that to decide how to lower each WinAlloca instruction. 140 141 // Initialize OutOffset[B], the stack offset at exit from B, to something big. 142 DenseMap<MachineBasicBlock *, int64_t> OutOffset; 143 for (MachineBasicBlock &MBB : MF) 144 OutOffset[&MBB] = INT32_MAX; 145 146 // Note: we don't know the offset at the start of the entry block since the 147 // prologue hasn't been inserted yet, and how much that will adjust the stack 148 // pointer depends on register spills, which have not been computed yet. 149 150 // Compute the reverse post-order. 151 ReversePostOrderTraversal<MachineFunction*> RPO(&MF); 152 153 for (MachineBasicBlock *MBB : RPO) { 154 int64_t Offset = -1; 155 for (MachineBasicBlock *Pred : MBB->predecessors()) 156 Offset = std::max(Offset, OutOffset[Pred]); 157 if (Offset == -1) Offset = INT32_MAX; 158 159 for (MachineInstr &MI : *MBB) { 160 if (MI.getOpcode() == X86::WIN_ALLOCA_32 || 161 MI.getOpcode() == X86::WIN_ALLOCA_64) { 162 // A WinAlloca moves StackPtr, and potentially touches it. 163 int64_t Amount = getWinAllocaAmount(&MI, MRI); 164 Lowering L = getLowering(Offset, Amount); 165 Lowerings[&MI] = L; 166 switch (L) { 167 case Sub: 168 Offset += Amount; 169 break; 170 case TouchAndSub: 171 Offset = Amount; 172 break; 173 case Probe: 174 Offset = 0; 175 break; 176 } 177 } else if (MI.isCall() || isPushPop(MI)) { 178 // Calls, pushes and pops touch the tip of the stack. 179 Offset = 0; 180 } else if (MI.getOpcode() == X86::ADJCALLSTACKUP32 || 181 MI.getOpcode() == X86::ADJCALLSTACKUP64) { 182 Offset -= MI.getOperand(0).getImm(); 183 } else if (MI.getOpcode() == X86::ADJCALLSTACKDOWN32 || 184 MI.getOpcode() == X86::ADJCALLSTACKDOWN64) { 185 Offset += MI.getOperand(0).getImm(); 186 } else if (MI.modifiesRegister(StackPtr, TRI)) { 187 // Any other modification of SP means we've lost track of it. 188 Offset = INT32_MAX; 189 } 190 } 191 192 OutOffset[MBB] = Offset; 193 } 194 } 195 196 static unsigned getSubOpcode(bool Is64Bit, int64_t Amount) { 197 if (Is64Bit) 198 return isInt<8>(Amount) ? X86::SUB64ri8 : X86::SUB64ri32; 199 return isInt<8>(Amount) ? X86::SUB32ri8 : X86::SUB32ri; 200 } 201 202 void X86WinAllocaExpander::lower(MachineInstr* MI, Lowering L) { 203 DebugLoc DL = MI->getDebugLoc(); 204 MachineBasicBlock *MBB = MI->getParent(); 205 MachineBasicBlock::iterator I = *MI; 206 207 int64_t Amount = getWinAllocaAmount(MI, MRI); 208 if (Amount == 0) { 209 MI->eraseFromParent(); 210 return; 211 } 212 213 bool Is64Bit = STI->is64Bit(); 214 assert(SlotSize == 4 || SlotSize == 8); 215 unsigned RegA = (SlotSize == 8) ? X86::RAX : X86::EAX; 216 217 switch (L) { 218 case TouchAndSub: 219 assert(Amount >= SlotSize); 220 221 // Use a push to touch the top of the stack. 222 BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) 223 .addReg(RegA, RegState::Undef); 224 Amount -= SlotSize; 225 if (!Amount) 226 break; 227 228 // Fall through to make any remaining adjustment. 229 LLVM_FALLTHROUGH; 230 case Sub: 231 assert(Amount > 0); 232 if (Amount == SlotSize) { 233 // Use push to save size. 234 BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) 235 .addReg(RegA, RegState::Undef); 236 } else { 237 // Sub. 238 BuildMI(*MBB, I, DL, TII->get(getSubOpcode(Is64Bit, Amount)), StackPtr) 239 .addReg(StackPtr) 240 .addImm(Amount); 241 } 242 break; 243 case Probe: 244 if (!NoStackArgProbe) { 245 // The probe lowering expects the amount in RAX/EAX. 246 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::COPY), RegA) 247 .addReg(MI->getOperand(0).getReg()); 248 249 // Do the probe. 250 STI->getFrameLowering()->emitStackProbe(*MBB->getParent(), *MBB, MI, DL, 251 /*InPrologue=*/false); 252 } else { 253 // Sub 254 BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::SUB64rr : X86::SUB32rr), 255 StackPtr) 256 .addReg(StackPtr) 257 .addReg(MI->getOperand(0).getReg()); 258 } 259 break; 260 } 261 262 unsigned AmountReg = MI->getOperand(0).getReg(); 263 MI->eraseFromParent(); 264 265 // Delete the definition of AmountReg, possibly walking a chain of copies. 266 for (;;) { 267 if (!MRI->use_empty(AmountReg)) 268 break; 269 MachineInstr *AmountDef = MRI->getUniqueVRegDef(AmountReg); 270 if (!AmountDef) 271 break; 272 if (AmountDef->isCopy() && AmountDef->getOperand(1).isReg()) 273 AmountReg = AmountDef->getOperand(1).isReg(); 274 AmountDef->eraseFromParent(); 275 break; 276 } 277 } 278 279 bool X86WinAllocaExpander::runOnMachineFunction(MachineFunction &MF) { 280 if (!MF.getInfo<X86MachineFunctionInfo>()->hasWinAlloca()) 281 return false; 282 283 MRI = &MF.getRegInfo(); 284 STI = &MF.getSubtarget<X86Subtarget>(); 285 TII = STI->getInstrInfo(); 286 TRI = STI->getRegisterInfo(); 287 StackPtr = TRI->getStackRegister(); 288 SlotSize = TRI->getSlotSize(); 289 290 StackProbeSize = 4096; 291 if (MF.getFunction().hasFnAttribute("stack-probe-size")) { 292 MF.getFunction() 293 .getFnAttribute("stack-probe-size") 294 .getValueAsString() 295 .getAsInteger(0, StackProbeSize); 296 } 297 NoStackArgProbe = MF.getFunction().hasFnAttribute("no-stack-arg-probe"); 298 if (NoStackArgProbe) 299 StackProbeSize = INT64_MAX; 300 301 LoweringMap Lowerings; 302 computeLowerings(MF, Lowerings); 303 for (auto &P : Lowerings) 304 lower(P.first, P.second); 305 306 return true; 307 } 308