1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the X86 specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86.h"
15 
16 #include "X86CallLowering.h"
17 #include "X86LegalizerInfo.h"
18 #include "X86RegisterBankInfo.h"
19 #include "X86Subtarget.h"
20 #include "MCTargetDesc/X86BaseInfo.h"
21 #include "X86TargetMachine.h"
22 #include "llvm/ADT/Triple.h"
23 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
24 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
25 #include "llvm/IR/Attributes.h"
26 #include "llvm/IR/ConstantRange.h"
27 #include "llvm/IR/Function.h"
28 #include "llvm/IR/GlobalValue.h"
29 #include "llvm/Support/Casting.h"
30 #include "llvm/Support/CodeGen.h"
31 #include "llvm/Support/CommandLine.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/Target/TargetMachine.h"
36 
37 #if defined(_MSC_VER)
38 #include <intrin.h>
39 #endif
40 
41 using namespace llvm;
42 
43 #define DEBUG_TYPE "subtarget"
44 
45 #define GET_SUBTARGETINFO_TARGET_DESC
46 #define GET_SUBTARGETINFO_CTOR
47 #include "X86GenSubtargetInfo.inc"
48 
49 // Temporary option to control early if-conversion for x86 while adding machine
50 // models.
51 static cl::opt<bool>
52 X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
53                cl::desc("Enable early if-conversion on X86"));
54 
55 
56 /// Classify a blockaddress reference for the current subtarget according to how
57 /// we should reference it in a non-pcrel context.
58 unsigned char X86Subtarget::classifyBlockAddressReference() const {
59   return classifyLocalReference(nullptr);
60 }
61 
62 /// Classify a global variable reference for the current subtarget according to
63 /// how we should reference it in a non-pcrel context.
64 unsigned char
65 X86Subtarget::classifyGlobalReference(const GlobalValue *GV) const {
66   return classifyGlobalReference(GV, *GV->getParent());
67 }
68 
69 unsigned char
70 X86Subtarget::classifyLocalReference(const GlobalValue *GV) const {
71   // 64 bits can use %rip addressing for anything local.
72   if (is64Bit())
73     return X86II::MO_NO_FLAG;
74 
75   // If this is for a position dependent executable, the static linker can
76   // figure it out.
77   if (!isPositionIndependent())
78     return X86II::MO_NO_FLAG;
79 
80   // The COFF dynamic linker just patches the executable sections.
81   if (isTargetCOFF())
82     return X86II::MO_NO_FLAG;
83 
84   if (isTargetDarwin()) {
85     // 32 bit macho has no relocation for a-b if a is undefined, even if
86     // b is in the section that is being relocated.
87     // This means we have to use o load even for GVs that are known to be
88     // local to the dso.
89     if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage()))
90       return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
91 
92     return X86II::MO_PIC_BASE_OFFSET;
93   }
94 
95   return X86II::MO_GOTOFF;
96 }
97 
98 unsigned char X86Subtarget::classifyGlobalReference(const GlobalValue *GV,
99                                                     const Module &M) const {
100   // Large model never uses stubs.
101   if (TM.getCodeModel() == CodeModel::Large)
102     return X86II::MO_NO_FLAG;
103 
104   // Absolute symbols can be referenced directly.
105   if (GV) {
106     if (Optional<ConstantRange> CR = GV->getAbsoluteSymbolRange()) {
107       // See if we can use the 8-bit immediate form. Note that some instructions
108       // will sign extend the immediate operand, so to be conservative we only
109       // accept the range [0,128).
110       if (CR->getUnsignedMax().ult(128))
111         return X86II::MO_ABS8;
112       else
113         return X86II::MO_NO_FLAG;
114     }
115   }
116 
117   if (TM.shouldAssumeDSOLocal(M, GV))
118     return classifyLocalReference(GV);
119 
120   if (isTargetCOFF())
121     return X86II::MO_DLLIMPORT;
122 
123   if (is64Bit())
124     return X86II::MO_GOTPCREL;
125 
126   if (isTargetDarwin()) {
127     if (!isPositionIndependent())
128       return X86II::MO_DARWIN_NONLAZY;
129     return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
130   }
131 
132   return X86II::MO_GOT;
133 }
134 
135 unsigned char
136 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV) const {
137   return classifyGlobalFunctionReference(GV, *GV->getParent());
138 }
139 
140 unsigned char
141 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV,
142                                               const Module &M) const {
143   if (TM.shouldAssumeDSOLocal(M, GV))
144     return X86II::MO_NO_FLAG;
145 
146   if (isTargetCOFF()) {
147     assert(GV->hasDLLImportStorageClass() &&
148            "shouldAssumeDSOLocal gave inconsistent answer");
149     return X86II::MO_DLLIMPORT;
150   }
151 
152   const Function *F = dyn_cast_or_null<Function>(GV);
153 
154   if (isTargetELF()) {
155     if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv()))
156       // According to psABI, PLT stub clobbers XMM8-XMM15.
157       // In Regcall calling convention those registers are used for passing
158       // parameters. Thus we need to prevent lazy binding in Regcall.
159       return X86II::MO_GOTPCREL;
160     if (F && F->hasFnAttribute(Attribute::NonLazyBind) && is64Bit())
161       return X86II::MO_GOTPCREL;
162     return X86II::MO_PLT;
163   }
164 
165   if (is64Bit()) {
166     if (F && F->hasFnAttribute(Attribute::NonLazyBind))
167       // If the function is marked as non-lazy, generate an indirect call
168       // which loads from the GOT directly. This avoids runtime overhead
169       // at the cost of eager binding (and one extra byte of encoding).
170       return X86II::MO_GOTPCREL;
171     return X86II::MO_NO_FLAG;
172   }
173 
174   return X86II::MO_NO_FLAG;
175 }
176 
177 /// This function returns the name of a function which has an interface like
178 /// the non-standard bzero function, if such a function exists on the
179 /// current subtarget and it is considered preferable over memset with zero
180 /// passed as the second argument. Otherwise it returns null.
181 const char *X86Subtarget::getBZeroEntry() const {
182   // Darwin 10 has a __bzero entry point for this purpose.
183   if (getTargetTriple().isMacOSX() &&
184       !getTargetTriple().isMacOSXVersionLT(10, 6))
185     return "__bzero";
186 
187   return nullptr;
188 }
189 
190 bool X86Subtarget::hasSinCos() const {
191   if (getTargetTriple().isMacOSX()) {
192     return !getTargetTriple().isMacOSXVersionLT(10, 9) && is64Bit();
193   } else if (getTargetTriple().isOSFuchsia()) {
194     return true;
195   }
196   return false;
197 }
198 
199 /// Return true if the subtarget allows calls to immediate address.
200 bool X86Subtarget::isLegalToCallImmediateAddr() const {
201   // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
202   // but WinCOFFObjectWriter::RecordRelocation cannot emit them.  Once it does,
203   // the following check for Win32 should be removed.
204   if (In64BitMode || isTargetWin32())
205     return false;
206   return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
207 }
208 
209 void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
210   std::string CPUName = CPU;
211   if (CPUName.empty())
212     CPUName = "generic";
213 
214   // Make sure 64-bit features are available in 64-bit mode. (But make sure
215   // SSE2 can be turned off explicitly.)
216   std::string FullFS = FS;
217   if (In64BitMode) {
218     if (!FullFS.empty())
219       FullFS = "+64bit,+sse2," + FullFS;
220     else
221       FullFS = "+64bit,+sse2";
222   }
223 
224   // LAHF/SAHF are always supported in non-64-bit mode.
225   if (!In64BitMode) {
226     if (!FullFS.empty())
227       FullFS = "+sahf," + FullFS;
228     else
229       FullFS = "+sahf";
230   }
231 
232   // Parse features string and set the CPU.
233   ParseSubtargetFeatures(CPUName, FullFS);
234 
235   // All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of
236   // 16-bytes and under that are reasonably fast. These features were
237   // introduced with Intel's Nehalem/Silvermont and AMD's Family10h
238   // micro-architectures respectively.
239   if (hasSSE42() || hasSSE4A())
240     IsUAMem16Slow = false;
241 
242   InstrItins = getInstrItineraryForCPU(CPUName);
243 
244   // It's important to keep the MCSubtargetInfo feature bits in sync with
245   // target data structure which is shared with MC code emitter, etc.
246   if (In64BitMode)
247     ToggleFeature(X86::Mode64Bit);
248   else if (In32BitMode)
249     ToggleFeature(X86::Mode32Bit);
250   else if (In16BitMode)
251     ToggleFeature(X86::Mode16Bit);
252   else
253     llvm_unreachable("Not 16-bit, 32-bit or 64-bit mode!");
254 
255   DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
256                << ", 3DNowLevel " << X863DNowLevel
257                << ", 64bit " << HasX86_64 << "\n");
258   assert((!In64BitMode || HasX86_64) &&
259          "64-bit code requested on a subtarget that doesn't support it!");
260 
261   // Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD and Solaris (both
262   // 32 and 64 bit) and for all 64-bit targets.
263   if (StackAlignOverride)
264     stackAlignment = StackAlignOverride;
265   else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() ||
266            isTargetKFreeBSD() || In64BitMode)
267     stackAlignment = 16;
268 
269   // Some CPUs have more overhead for gather. The specified overhead is relative
270   // to the Load operation. "2" is the number provided by Intel architects. This
271   // parameter is used for cost estimation of Gather Op and comparison with
272   // other alternatives.
273   // TODO: Remove the explicit hasAVX512()?, That would mean we would only
274   // enable gather with a -march.
275   if (hasAVX512() || (hasAVX2() && hasFastGather()))
276     GatherOverhead = 2;
277   if (hasAVX512())
278     ScatterOverhead = 2;
279 }
280 
281 void X86Subtarget::initializeEnvironment() {
282   X86SSELevel = NoSSE;
283   X863DNowLevel = NoThreeDNow;
284   HasX87 = false;
285   HasCMov = false;
286   HasX86_64 = false;
287   HasPOPCNT = false;
288   HasSSE4A = false;
289   HasAES = false;
290   HasVAES = false;
291   HasFXSR = false;
292   HasXSAVE = false;
293   HasXSAVEOPT = false;
294   HasXSAVEC = false;
295   HasXSAVES = false;
296   HasPCLMUL = false;
297   HasVPCLMULQDQ = false;
298   HasGFNI = false;
299   HasFMA = false;
300   HasFMA4 = false;
301   HasXOP = false;
302   HasTBM = false;
303   HasLWP = false;
304   HasMOVBE = false;
305   HasRDRAND = false;
306   HasF16C = false;
307   HasFSGSBase = false;
308   HasLZCNT = false;
309   HasBMI = false;
310   HasBMI2 = false;
311   HasVBMI = false;
312   HasVBMI2 = false;
313   HasIFMA = false;
314   HasRTM = false;
315   HasERI = false;
316   HasCDI = false;
317   HasPFI = false;
318   HasDQI = false;
319   HasVPOPCNTDQ = false;
320   HasBWI = false;
321   HasVLX = false;
322   HasADX = false;
323   HasPKU = false;
324   HasVNNI = false;
325   HasBITALG = false;
326   HasSHA = false;
327   HasPRFCHW = false;
328   HasRDSEED = false;
329   HasLAHFSAHF = false;
330   HasMWAITX = false;
331   HasCLZERO = false;
332   HasMPX = false;
333   HasSHSTK = false;
334   HasIBT = false;
335   HasSGX = false;
336   HasCLFLUSHOPT = false;
337   HasCLWB = false;
338   IsPMULLDSlow = false;
339   IsSHLDSlow = false;
340   IsUAMem16Slow = false;
341   IsUAMem32Slow = false;
342   HasSSEUnalignedMem = false;
343   HasCmpxchg16b = false;
344   UseLeaForSP = false;
345   HasFastPartialYMMorZMMWrite = false;
346   HasFastGather = false;
347   HasFastScalarFSQRT = false;
348   HasFastVectorFSQRT = false;
349   HasFastLZCNT = false;
350   HasFastSHLDRotate = false;
351   HasMacroFusion = false;
352   HasERMSB = false;
353   HasSlowDivide32 = false;
354   HasSlowDivide64 = false;
355   PadShortFunctions = false;
356   SlowTwoMemOps = false;
357   LEAUsesAG = false;
358   SlowLEA = false;
359   Slow3OpsLEA = false;
360   SlowIncDec = false;
361   stackAlignment = 4;
362   // FIXME: this is a known good value for Yonah. How about others?
363   MaxInlineSizeThreshold = 128;
364   UseSoftFloat = false;
365   X86ProcFamily = Others;
366   GatherOverhead = 1024;
367   ScatterOverhead = 1024;
368 }
369 
370 X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
371                                                             StringRef FS) {
372   initializeEnvironment();
373   initSubtargetFeatures(CPU, FS);
374   return *this;
375 }
376 
377 X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
378                            const X86TargetMachine &TM,
379                            unsigned StackAlignOverride)
380     : X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others),
381       PICStyle(PICStyles::None), TM(TM), TargetTriple(TT),
382       StackAlignOverride(StackAlignOverride),
383       In64BitMode(TargetTriple.getArch() == Triple::x86_64),
384       In32BitMode(TargetTriple.getArch() == Triple::x86 &&
385                   TargetTriple.getEnvironment() != Triple::CODE16),
386       In16BitMode(TargetTriple.getArch() == Triple::x86 &&
387                   TargetTriple.getEnvironment() == Triple::CODE16),
388       InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
389       FrameLowering(*this, getStackAlignment()) {
390   // Determine the PICStyle based on the target selected.
391   if (!isPositionIndependent())
392     setPICStyle(PICStyles::None);
393   else if (is64Bit())
394     setPICStyle(PICStyles::RIPRel);
395   else if (isTargetCOFF())
396     setPICStyle(PICStyles::None);
397   else if (isTargetDarwin())
398     setPICStyle(PICStyles::StubPIC);
399   else if (isTargetELF())
400     setPICStyle(PICStyles::GOT);
401 
402   CallLoweringInfo.reset(new X86CallLowering(*getTargetLowering()));
403   Legalizer.reset(new X86LegalizerInfo(*this, TM));
404 
405   auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());
406   RegBankInfo.reset(RBI);
407   InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));
408 }
409 
410 const CallLowering *X86Subtarget::getCallLowering() const {
411   return CallLoweringInfo.get();
412 }
413 
414 const InstructionSelector *X86Subtarget::getInstructionSelector() const {
415   return InstSelector.get();
416 }
417 
418 const LegalizerInfo *X86Subtarget::getLegalizerInfo() const {
419   return Legalizer.get();
420 }
421 
422 const RegisterBankInfo *X86Subtarget::getRegBankInfo() const {
423   return RegBankInfo.get();
424 }
425 
426 bool X86Subtarget::enableEarlyIfConversion() const {
427   return hasCMov() && X86EarlyIfConv;
428 }
429