1 //======- X86RetpolineThunks.cpp - Construct retpoline thunks for x86 --=====// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// 11 /// Pass that injects an MI thunk implementing a "retpoline". This is 12 /// a RET-implemented trampoline that is used to lower indirect calls in a way 13 /// that prevents speculation on some x86 processors and can be used to mitigate 14 /// security vulnerabilities due to targeted speculative execution and side 15 /// channels such as CVE-2017-5715. 16 /// 17 /// TODO(chandlerc): All of this code could use better comments and 18 /// documentation. 19 /// 20 //===----------------------------------------------------------------------===// 21 22 #include "X86.h" 23 #include "X86InstrBuilder.h" 24 #include "X86Subtarget.h" 25 #include "llvm/CodeGen/MachineFunction.h" 26 #include "llvm/CodeGen/MachineInstrBuilder.h" 27 #include "llvm/CodeGen/MachineModuleInfo.h" 28 #include "llvm/CodeGen/Passes.h" 29 #include "llvm/CodeGen/TargetPassConfig.h" 30 #include "llvm/IR/IRBuilder.h" 31 #include "llvm/IR/Instructions.h" 32 #include "llvm/IR/Module.h" 33 #include "llvm/Support/CommandLine.h" 34 #include "llvm/Support/Debug.h" 35 #include "llvm/Support/raw_ostream.h" 36 37 using namespace llvm; 38 39 #define DEBUG_TYPE "x86-retpoline-thunks" 40 41 static const char ThunkNamePrefix[] = "__llvm_retpoline_"; 42 static const char R11ThunkName[] = "__llvm_retpoline_r11"; 43 static const char EAXThunkName[] = "__llvm_retpoline_eax"; 44 static const char ECXThunkName[] = "__llvm_retpoline_ecx"; 45 static const char EDXThunkName[] = "__llvm_retpoline_edx"; 46 static const char EDIThunkName[] = "__llvm_retpoline_edi"; 47 48 namespace { 49 class X86RetpolineThunks : public MachineFunctionPass { 50 public: 51 static char ID; 52 53 X86RetpolineThunks() : MachineFunctionPass(ID) {} 54 55 StringRef getPassName() const override { return "X86 Retpoline Thunks"; } 56 57 bool doInitialization(Module &M) override; 58 bool runOnMachineFunction(MachineFunction &F) override; 59 60 void getAnalysisUsage(AnalysisUsage &AU) const override { 61 MachineFunctionPass::getAnalysisUsage(AU); 62 AU.addRequired<MachineModuleInfo>(); 63 AU.addPreserved<MachineModuleInfo>(); 64 } 65 66 private: 67 MachineModuleInfo *MMI; 68 const TargetMachine *TM; 69 bool Is64Bit; 70 const X86Subtarget *STI; 71 const X86InstrInfo *TII; 72 73 bool InsertedThunks; 74 75 void createThunkFunction(Module &M, StringRef Name); 76 void insertRegReturnAddrClobber(MachineBasicBlock &MBB, unsigned Reg); 77 void populateThunk(MachineFunction &MF, unsigned Reg); 78 }; 79 80 } // end anonymous namespace 81 82 FunctionPass *llvm::createX86RetpolineThunksPass() { 83 return new X86RetpolineThunks(); 84 } 85 86 char X86RetpolineThunks::ID = 0; 87 88 bool X86RetpolineThunks::doInitialization(Module &M) { 89 InsertedThunks = false; 90 return false; 91 } 92 93 bool X86RetpolineThunks::runOnMachineFunction(MachineFunction &MF) { 94 LLVM_DEBUG(dbgs() << getPassName() << '\n'); 95 96 TM = &MF.getTarget();; 97 STI = &MF.getSubtarget<X86Subtarget>(); 98 TII = STI->getInstrInfo(); 99 Is64Bit = TM->getTargetTriple().getArch() == Triple::x86_64; 100 101 MMI = &getAnalysis<MachineModuleInfo>(); 102 Module &M = const_cast<Module &>(*MMI->getModule()); 103 104 // If this function is not a thunk, check to see if we need to insert 105 // a thunk. 106 if (!MF.getName().startswith(ThunkNamePrefix)) { 107 // If we've already inserted a thunk, nothing else to do. 108 if (InsertedThunks) 109 return false; 110 111 // Only add a thunk if one of the functions has the retpoline feature 112 // enabled in its subtarget, and doesn't enable external thunks. 113 // FIXME: Conditionalize on indirect calls so we don't emit a thunk when 114 // nothing will end up calling it. 115 // FIXME: It's a little silly to look at every function just to enumerate 116 // the subtargets, but eventually we'll want to look at them for indirect 117 // calls, so maybe this is OK. 118 if ((!STI->useRetpolineIndirectCalls() && 119 !STI->useRetpolineIndirectBranches()) || 120 STI->useRetpolineExternalThunk()) 121 return false; 122 123 // Otherwise, we need to insert the thunk. 124 // WARNING: This is not really a well behaving thing to do in a function 125 // pass. We extract the module and insert a new function (and machine 126 // function) directly into the module. 127 if (Is64Bit) 128 createThunkFunction(M, R11ThunkName); 129 else 130 for (StringRef Name : 131 {EAXThunkName, ECXThunkName, EDXThunkName, EDIThunkName}) 132 createThunkFunction(M, Name); 133 InsertedThunks = true; 134 return true; 135 } 136 137 // If this *is* a thunk function, we need to populate it with the correct MI. 138 if (Is64Bit) { 139 assert(MF.getName() == "__llvm_retpoline_r11" && 140 "Should only have an r11 thunk on 64-bit targets"); 141 142 // __llvm_retpoline_r11: 143 // callq .Lr11_call_target 144 // .Lr11_capture_spec: 145 // pause 146 // lfence 147 // jmp .Lr11_capture_spec 148 // .align 16 149 // .Lr11_call_target: 150 // movq %r11, (%rsp) 151 // retq 152 populateThunk(MF, X86::R11); 153 } else { 154 // For 32-bit targets we need to emit a collection of thunks for various 155 // possible scratch registers as well as a fallback that uses EDI, which is 156 // normally callee saved. 157 // __llvm_retpoline_eax: 158 // calll .Leax_call_target 159 // .Leax_capture_spec: 160 // pause 161 // jmp .Leax_capture_spec 162 // .align 16 163 // .Leax_call_target: 164 // movl %eax, (%esp) # Clobber return addr 165 // retl 166 // 167 // __llvm_retpoline_ecx: 168 // ... # Same setup 169 // movl %ecx, (%esp) 170 // retl 171 // 172 // __llvm_retpoline_edx: 173 // ... # Same setup 174 // movl %edx, (%esp) 175 // retl 176 // 177 // __llvm_retpoline_edi: 178 // ... # Same setup 179 // movl %edi, (%esp) 180 // retl 181 if (MF.getName() == EAXThunkName) 182 populateThunk(MF, X86::EAX); 183 else if (MF.getName() == ECXThunkName) 184 populateThunk(MF, X86::ECX); 185 else if (MF.getName() == EDXThunkName) 186 populateThunk(MF, X86::EDX); 187 else if (MF.getName() == EDIThunkName) 188 populateThunk(MF, X86::EDI); 189 else 190 llvm_unreachable("Invalid thunk name on x86-32!"); 191 } 192 193 return true; 194 } 195 196 void X86RetpolineThunks::createThunkFunction(Module &M, StringRef Name) { 197 assert(Name.startswith(ThunkNamePrefix) && 198 "Created a thunk with an unexpected prefix!"); 199 200 LLVMContext &Ctx = M.getContext(); 201 auto Type = FunctionType::get(Type::getVoidTy(Ctx), false); 202 Function *F = 203 Function::Create(Type, GlobalValue::LinkOnceODRLinkage, Name, &M); 204 F->setVisibility(GlobalValue::HiddenVisibility); 205 F->setComdat(M.getOrInsertComdat(Name)); 206 207 // Add Attributes so that we don't create a frame, unwind information, or 208 // inline. 209 AttrBuilder B; 210 B.addAttribute(llvm::Attribute::NoUnwind); 211 B.addAttribute(llvm::Attribute::Naked); 212 F->addAttributes(llvm::AttributeList::FunctionIndex, B); 213 214 // Populate our function a bit so that we can verify. 215 BasicBlock *Entry = BasicBlock::Create(Ctx, "entry", F); 216 IRBuilder<> Builder(Entry); 217 218 Builder.CreateRetVoid(); 219 220 // MachineFunctions/MachineBasicBlocks aren't created automatically for the 221 // IR-level constructs we already made. Create them and insert them into the 222 // module. 223 MachineFunction &MF = MMI->getOrCreateMachineFunction(*F); 224 MachineBasicBlock *EntryMBB = MF.CreateMachineBasicBlock(Entry); 225 226 // Insert EntryMBB into MF. It's not in the module until we do this. 227 MF.insert(MF.end(), EntryMBB); 228 } 229 230 void X86RetpolineThunks::insertRegReturnAddrClobber(MachineBasicBlock &MBB, 231 unsigned Reg) { 232 const unsigned MovOpc = Is64Bit ? X86::MOV64mr : X86::MOV32mr; 233 const unsigned SPReg = Is64Bit ? X86::RSP : X86::ESP; 234 addRegOffset(BuildMI(&MBB, DebugLoc(), TII->get(MovOpc)), SPReg, false, 0) 235 .addReg(Reg); 236 } 237 238 void X86RetpolineThunks::populateThunk(MachineFunction &MF, 239 unsigned Reg) { 240 // Set MF properties. We never use vregs... 241 MF.getProperties().set(MachineFunctionProperties::Property::NoVRegs); 242 243 // Grab the entry MBB and erase any other blocks. O0 codegen appears to 244 // generate two bbs for the entry block. 245 MachineBasicBlock *Entry = &MF.front(); 246 Entry->clear(); 247 while (MF.size() > 1) 248 MF.erase(std::next(MF.begin())); 249 250 MachineBasicBlock *CaptureSpec = MF.CreateMachineBasicBlock(Entry->getBasicBlock()); 251 MachineBasicBlock *CallTarget = MF.CreateMachineBasicBlock(Entry->getBasicBlock()); 252 MCSymbol *TargetSym = MF.getContext().createTempSymbol(); 253 MF.push_back(CaptureSpec); 254 MF.push_back(CallTarget); 255 256 const unsigned CallOpc = Is64Bit ? X86::CALL64pcrel32 : X86::CALLpcrel32; 257 const unsigned RetOpc = Is64Bit ? X86::RETQ : X86::RETL; 258 259 Entry->addLiveIn(Reg); 260 BuildMI(Entry, DebugLoc(), TII->get(CallOpc)).addSym(TargetSym); 261 262 // The MIR verifier thinks that the CALL in the entry block will fall through 263 // to CaptureSpec, so mark it as the successor. Technically, CaptureTarget is 264 // the successor, but the MIR verifier doesn't know how to cope with that. 265 Entry->addSuccessor(CaptureSpec); 266 267 // In the capture loop for speculation, we want to stop the processor from 268 // speculating as fast as possible. On Intel processors, the PAUSE instruction 269 // will block speculation without consuming any execution resources. On AMD 270 // processors, the PAUSE instruction is (essentially) a nop, so we also use an 271 // LFENCE instruction which they have advised will stop speculation as well 272 // with minimal resource utilization. We still end the capture with a jump to 273 // form an infinite loop to fully guarantee that no matter what implementation 274 // of the x86 ISA, speculating this code path never escapes. 275 BuildMI(CaptureSpec, DebugLoc(), TII->get(X86::PAUSE)); 276 BuildMI(CaptureSpec, DebugLoc(), TII->get(X86::LFENCE)); 277 BuildMI(CaptureSpec, DebugLoc(), TII->get(X86::JMP_1)).addMBB(CaptureSpec); 278 CaptureSpec->setHasAddressTaken(); 279 CaptureSpec->addSuccessor(CaptureSpec); 280 281 CallTarget->addLiveIn(Reg); 282 CallTarget->setHasAddressTaken(); 283 CallTarget->setAlignment(4); 284 insertRegReturnAddrClobber(*CallTarget, Reg); 285 CallTarget->back().setPreInstrSymbol(MF, TargetSym); 286 BuildMI(CallTarget, DebugLoc(), TII->get(RetOpc)); 287 } 288