1 //===-- X86FixupLEAs.cpp - use or replace LEA instructions -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the pass that finds instructions that can be
11 // re-written as LEA instructions in order to reduce pipeline delays.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "X86.h"
16 #include "X86InstrInfo.h"
17 #include "X86Subtarget.h"
18 #include "llvm/ADT/Statistic.h"
19 #include "llvm/CodeGen/LiveVariables.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 using namespace llvm;
28 
29 #define DEBUG_TYPE "x86-fixup-LEAs"
30 
31 STATISTIC(NumLEAs, "Number of LEA instructions created");
32 
33 namespace {
34 class FixupLEAPass : public MachineFunctionPass {
35   enum RegUsageState { RU_NotUsed, RU_Write, RU_Read };
36   static char ID;
37   /// \brief Loop over all of the instructions in the basic block
38   /// replacing applicable instructions with LEA instructions,
39   /// where appropriate.
40   bool processBasicBlock(MachineFunction &MF, MachineFunction::iterator MFI);
41 
42   const char *getPassName() const override { return "X86 LEA Fixup"; }
43 
44   /// \brief Given a machine register, look for the instruction
45   /// which writes it in the current basic block. If found,
46   /// try to replace it with an equivalent LEA instruction.
47   /// If replacement succeeds, then also process the the newly created
48   /// instruction.
49   void seekLEAFixup(MachineOperand &p, MachineBasicBlock::iterator &I,
50                     MachineFunction::iterator MFI);
51 
52   /// \brief Given a memory access or LEA instruction
53   /// whose address mode uses a base and/or index register, look for
54   /// an opportunity to replace the instruction which sets the base or index
55   /// register with an equivalent LEA instruction.
56   void processInstruction(MachineBasicBlock::iterator &I,
57                           MachineFunction::iterator MFI);
58 
59   /// \brief Given a LEA instruction which is unprofitable
60   /// on Silvermont try to replace it with an equivalent ADD instruction
61   void processInstructionForSLM(MachineBasicBlock::iterator &I,
62                                 MachineFunction::iterator MFI);
63 
64   /// \brief Determine if an instruction references a machine register
65   /// and, if so, whether it reads or writes the register.
66   RegUsageState usesRegister(MachineOperand &p, MachineBasicBlock::iterator I);
67 
68   /// \brief Step backwards through a basic block, looking
69   /// for an instruction which writes a register within
70   /// a maximum of INSTR_DISTANCE_THRESHOLD instruction latency cycles.
71   MachineBasicBlock::iterator searchBackwards(MachineOperand &p,
72                                               MachineBasicBlock::iterator &I,
73                                               MachineFunction::iterator MFI);
74 
75   /// \brief if an instruction can be converted to an
76   /// equivalent LEA, insert the new instruction into the basic block
77   /// and return a pointer to it. Otherwise, return zero.
78   MachineInstr *postRAConvertToLEA(MachineFunction::iterator &MFI,
79                                    MachineBasicBlock::iterator &MBBI) const;
80 
81 public:
82   FixupLEAPass() : MachineFunctionPass(ID) {}
83 
84   /// \brief Loop over all of the basic blocks,
85   /// replacing instructions by equivalent LEA instructions
86   /// if needed and when possible.
87   bool runOnMachineFunction(MachineFunction &MF) override;
88 
89 private:
90   MachineFunction *MF;
91   const TargetMachine *TM;
92   const X86InstrInfo *TII; // Machine instruction info.
93 };
94 char FixupLEAPass::ID = 0;
95 }
96 
97 MachineInstr *
98 FixupLEAPass::postRAConvertToLEA(MachineFunction::iterator &MFI,
99                                  MachineBasicBlock::iterator &MBBI) const {
100   MachineInstr *MI = MBBI;
101   MachineInstr *NewMI;
102   switch (MI->getOpcode()) {
103   case X86::MOV32rr:
104   case X86::MOV64rr: {
105     const MachineOperand &Src = MI->getOperand(1);
106     const MachineOperand &Dest = MI->getOperand(0);
107     NewMI = BuildMI(*MF, MI->getDebugLoc(),
108                     TII->get(MI->getOpcode() == X86::MOV32rr ? X86::LEA32r
109                                                              : X86::LEA64r))
110                 .addOperand(Dest)
111                 .addOperand(Src)
112                 .addImm(1)
113                 .addReg(0)
114                 .addImm(0)
115                 .addReg(0);
116     MFI->insert(MBBI, NewMI); // Insert the new inst
117     return NewMI;
118   }
119   case X86::ADD64ri32:
120   case X86::ADD64ri8:
121   case X86::ADD64ri32_DB:
122   case X86::ADD64ri8_DB:
123   case X86::ADD32ri:
124   case X86::ADD32ri8:
125   case X86::ADD32ri_DB:
126   case X86::ADD32ri8_DB:
127   case X86::ADD16ri:
128   case X86::ADD16ri8:
129   case X86::ADD16ri_DB:
130   case X86::ADD16ri8_DB:
131     if (!MI->getOperand(2).isImm()) {
132       // convertToThreeAddress will call getImm()
133       // which requires isImm() to be true
134       return nullptr;
135     }
136     break;
137   case X86::ADD16rr:
138   case X86::ADD16rr_DB:
139     if (MI->getOperand(1).getReg() != MI->getOperand(2).getReg()) {
140       // if src1 != src2, then convertToThreeAddress will
141       // need to create a Virtual register, which we cannot do
142       // after register allocation.
143       return nullptr;
144     }
145   }
146   return TII->convertToThreeAddress(MFI, MBBI, nullptr);
147 }
148 
149 FunctionPass *llvm::createX86FixupLEAs() { return new FixupLEAPass(); }
150 
151 bool FixupLEAPass::runOnMachineFunction(MachineFunction &Func) {
152   MF = &Func;
153   TM = &Func.getTarget();
154   const X86Subtarget &ST = TM->getSubtarget<X86Subtarget>();
155   if (!ST.LEAusesAG() && !ST.slowLEA())
156     return false;
157 
158   TII = static_cast<const X86InstrInfo *>(TM->getInstrInfo());
159 
160   DEBUG(dbgs() << "Start X86FixupLEAs\n";);
161   // Process all basic blocks.
162   for (MachineFunction::iterator I = Func.begin(), E = Func.end(); I != E; ++I)
163     processBasicBlock(Func, I);
164   DEBUG(dbgs() << "End X86FixupLEAs\n";);
165 
166   return true;
167 }
168 
169 FixupLEAPass::RegUsageState
170 FixupLEAPass::usesRegister(MachineOperand &p, MachineBasicBlock::iterator I) {
171   RegUsageState RegUsage = RU_NotUsed;
172   MachineInstr *MI = I;
173 
174   for (unsigned int i = 0; i < MI->getNumOperands(); ++i) {
175     MachineOperand &opnd = MI->getOperand(i);
176     if (opnd.isReg() && opnd.getReg() == p.getReg()) {
177       if (opnd.isDef())
178         return RU_Write;
179       RegUsage = RU_Read;
180     }
181   }
182   return RegUsage;
183 }
184 
185 /// getPreviousInstr - Given a reference to an instruction in a basic
186 /// block, return a reference to the previous instruction in the block,
187 /// wrapping around to the last instruction of the block if the block
188 /// branches to itself.
189 static inline bool getPreviousInstr(MachineBasicBlock::iterator &I,
190                                     MachineFunction::iterator MFI) {
191   if (I == MFI->begin()) {
192     if (MFI->isPredecessor(MFI)) {
193       I = --MFI->end();
194       return true;
195     } else
196       return false;
197   }
198   --I;
199   return true;
200 }
201 
202 MachineBasicBlock::iterator
203 FixupLEAPass::searchBackwards(MachineOperand &p, MachineBasicBlock::iterator &I,
204                               MachineFunction::iterator MFI) {
205   int InstrDistance = 1;
206   MachineBasicBlock::iterator CurInst;
207   static const int INSTR_DISTANCE_THRESHOLD = 5;
208 
209   CurInst = I;
210   bool Found;
211   Found = getPreviousInstr(CurInst, MFI);
212   while (Found && I != CurInst) {
213     if (CurInst->isCall() || CurInst->isInlineAsm())
214       break;
215     if (InstrDistance > INSTR_DISTANCE_THRESHOLD)
216       break; // too far back to make a difference
217     if (usesRegister(p, CurInst) == RU_Write) {
218       return CurInst;
219     }
220     InstrDistance += TII->getInstrLatency(TM->getInstrItineraryData(), CurInst);
221     Found = getPreviousInstr(CurInst, MFI);
222   }
223   return nullptr;
224 }
225 
226 void FixupLEAPass::processInstruction(MachineBasicBlock::iterator &I,
227                                       MachineFunction::iterator MFI) {
228   // Process a load, store, or LEA instruction.
229   MachineInstr *MI = I;
230   int opcode = MI->getOpcode();
231   const MCInstrDesc &Desc = MI->getDesc();
232   int AddrOffset = X86II::getMemoryOperandNo(Desc.TSFlags, opcode);
233   if (AddrOffset >= 0) {
234     AddrOffset += X86II::getOperandBias(Desc);
235     MachineOperand &p = MI->getOperand(AddrOffset + X86::AddrBaseReg);
236     if (p.isReg() && p.getReg() != X86::ESP) {
237       seekLEAFixup(p, I, MFI);
238     }
239     MachineOperand &q = MI->getOperand(AddrOffset + X86::AddrIndexReg);
240     if (q.isReg() && q.getReg() != X86::ESP) {
241       seekLEAFixup(q, I, MFI);
242     }
243   }
244 }
245 
246 void FixupLEAPass::seekLEAFixup(MachineOperand &p,
247                                 MachineBasicBlock::iterator &I,
248                                 MachineFunction::iterator MFI) {
249   MachineBasicBlock::iterator MBI = searchBackwards(p, I, MFI);
250   if (MBI) {
251     MachineInstr *NewMI = postRAConvertToLEA(MFI, MBI);
252     if (NewMI) {
253       ++NumLEAs;
254       DEBUG(dbgs() << "FixLEA: Candidate to replace:"; MBI->dump(););
255       // now to replace with an equivalent LEA...
256       DEBUG(dbgs() << "FixLEA: Replaced by: "; NewMI->dump(););
257       MFI->erase(MBI);
258       MachineBasicBlock::iterator J =
259           static_cast<MachineBasicBlock::iterator>(NewMI);
260       processInstruction(J, MFI);
261     }
262   }
263 }
264 
265 void FixupLEAPass::processInstructionForSLM(MachineBasicBlock::iterator &I,
266                                             MachineFunction::iterator MFI) {
267   MachineInstr *MI = I;
268   const int opcode = MI->getOpcode();
269   if (opcode != X86::LEA16r && opcode != X86::LEA32r && opcode != X86::LEA64r &&
270       opcode != X86::LEA64_32r)
271     return;
272   if (MI->getOperand(5).getReg() != 0 || !MI->getOperand(4).isImm() ||
273       !TII->isSafeToClobberEFLAGS(*MFI, I))
274     return;
275   const unsigned DstR = MI->getOperand(0).getReg();
276   const unsigned SrcR1 = MI->getOperand(1).getReg();
277   const unsigned SrcR2 = MI->getOperand(3).getReg();
278   if ((SrcR1 == 0 || SrcR1 != DstR) && (SrcR2 == 0 || SrcR2 != DstR))
279     return;
280   if (MI->getOperand(2).getImm() > 1)
281     return;
282   int addrr_opcode, addri_opcode;
283   switch (opcode) {
284   case X86::LEA16r:
285     addrr_opcode = X86::ADD16rr;
286     addri_opcode = X86::ADD16ri;
287     break;
288   case X86::LEA32r:
289     addrr_opcode = X86::ADD32rr;
290     addri_opcode = X86::ADD32ri;
291     break;
292   case X86::LEA64_32r:
293   case X86::LEA64r:
294     addrr_opcode = X86::ADD64rr;
295     addri_opcode = X86::ADD64ri32;
296     break;
297   default:
298     assert(false && "Unexpected LEA instruction");
299   }
300   DEBUG(dbgs() << "FixLEA: Candidate to replace:"; I->dump(););
301   DEBUG(dbgs() << "FixLEA: Replaced by: ";);
302   MachineInstr *NewMI = nullptr;
303   const MachineOperand &Dst = MI->getOperand(0);
304   // Make ADD instruction for two registers writing to LEA's destination
305   if (SrcR1 != 0 && SrcR2 != 0) {
306     const MachineOperand &Src1 = MI->getOperand(SrcR1 == DstR ? 1 : 3);
307     const MachineOperand &Src2 = MI->getOperand(SrcR1 == DstR ? 3 : 1);
308     NewMI = BuildMI(*MF, MI->getDebugLoc(), TII->get(addrr_opcode))
309                 .addOperand(Dst)
310                 .addOperand(Src1)
311                 .addOperand(Src2);
312     MFI->insert(I, NewMI);
313     DEBUG(NewMI->dump(););
314   }
315   // Make ADD instruction for immediate
316   if (MI->getOperand(4).getImm() != 0) {
317     const MachineOperand &SrcR = MI->getOperand(SrcR1 == DstR ? 1 : 3);
318     NewMI = BuildMI(*MF, MI->getDebugLoc(), TII->get(addri_opcode))
319                 .addOperand(Dst)
320                 .addOperand(SrcR)
321                 .addImm(MI->getOperand(4).getImm());
322     MFI->insert(I, NewMI);
323     DEBUG(NewMI->dump(););
324   }
325   if (NewMI) {
326     MFI->erase(I);
327     I = static_cast<MachineBasicBlock::iterator>(NewMI);
328   }
329 }
330 
331 bool FixupLEAPass::processBasicBlock(MachineFunction &MF,
332                                      MachineFunction::iterator MFI) {
333 
334   for (MachineBasicBlock::iterator I = MFI->begin(); I != MFI->end(); ++I) {
335     if (TM->getSubtarget<X86Subtarget>().isSLM())
336       processInstructionForSLM(I, MFI);
337     else
338       processInstruction(I, MFI);
339   }
340   return false;
341 }
342