1 //===-- WebAssemblyUtilities.cpp - WebAssembly Utility Functions ----------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// \brief This file implements several utility functions for WebAssembly. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #include "WebAssemblyUtilities.h" 16 #include "WebAssemblyMachineFunctionInfo.h" 17 #include "llvm/CodeGen/MachineInstr.h" 18 using namespace llvm; 19 20 bool WebAssembly::isArgument(const MachineInstr &MI) { 21 switch (MI.getOpcode()) { 22 case WebAssembly::ARGUMENT_I32: 23 case WebAssembly::ARGUMENT_I64: 24 case WebAssembly::ARGUMENT_F32: 25 case WebAssembly::ARGUMENT_F64: 26 case WebAssembly::ARGUMENT_v16i8: 27 case WebAssembly::ARGUMENT_v8i16: 28 case WebAssembly::ARGUMENT_v4i32: 29 case WebAssembly::ARGUMENT_v4f32: 30 return true; 31 default: 32 return false; 33 } 34 } 35 36 bool WebAssembly::isCopy(const MachineInstr &MI) { 37 switch (MI.getOpcode()) { 38 case WebAssembly::COPY_I32: 39 case WebAssembly::COPY_I64: 40 case WebAssembly::COPY_F32: 41 case WebAssembly::COPY_F64: 42 return true; 43 default: 44 return false; 45 } 46 } 47 48 bool WebAssembly::isTee(const MachineInstr &MI) { 49 switch (MI.getOpcode()) { 50 case WebAssembly::TEE_I32: 51 case WebAssembly::TEE_I64: 52 case WebAssembly::TEE_F32: 53 case WebAssembly::TEE_F64: 54 return true; 55 default: 56 return false; 57 } 58 } 59 60 /// Test whether MI is a child of some other node in an expression tree. 61 bool WebAssembly::isChild(const MachineInstr &MI, 62 const WebAssemblyFunctionInfo &MFI) { 63 if (MI.getNumOperands() == 0) 64 return false; 65 const MachineOperand &MO = MI.getOperand(0); 66 if (!MO.isReg() || MO.isImplicit() || !MO.isDef()) 67 return false; 68 unsigned Reg = MO.getReg(); 69 return TargetRegisterInfo::isVirtualRegister(Reg) && 70 MFI.isVRegStackified(Reg); 71 } 72