1// WebAssemblyInstrInfo.td-Describe the WebAssembly Instructions-*- tablegen -*-
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// \brief WebAssembly Instruction definitions.
12///
13//===----------------------------------------------------------------------===//
14
15//===----------------------------------------------------------------------===//
16// WebAssembly Instruction Predicate Definitions.
17//===----------------------------------------------------------------------===//
18
19def HasAddr32 : Predicate<"!Subtarget->hasAddr64()">;
20def HasAddr64 : Predicate<"Subtarget->hasAddr64()">;
21def HasSIMD128 : Predicate<"Subtarget->hasSIMD128()">,
22                           AssemblerPredicate<"FeatureSIMD128", "simd128">;
23
24//===----------------------------------------------------------------------===//
25// WebAssembly-specific DAG Node Types.
26//===----------------------------------------------------------------------===//
27
28def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>]>;
29def SDT_WebAssemblyCallSeqEnd :
30    SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
31def SDT_WebAssemblyCall0    : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
32def SDT_WebAssemblyCall1    : SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>;
33def SDT_WebAssemblyTableswitch : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
34def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
35def SDT_WebAssemblyReturn   : SDTypeProfile<0, -1, []>;
36def SDT_WebAssemblyWrapper  : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>,
37                                                   SDTCisPtrTy<0>]>;
38
39//===----------------------------------------------------------------------===//
40// WebAssembly-specific DAG Nodes.
41//===----------------------------------------------------------------------===//
42
43def WebAssemblycallseq_start :
44    SDNode<"ISD::CALLSEQ_START", SDT_WebAssemblyCallSeqStart,
45           [SDNPHasChain, SDNPOutGlue]>;
46def WebAssemblycallseq_end :
47    SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd,
48           [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
49def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0",
50                              SDT_WebAssemblyCall0,
51                              [SDNPHasChain, SDNPVariadic]>;
52def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1",
53                              SDT_WebAssemblyCall1,
54                              [SDNPHasChain, SDNPVariadic]>;
55def WebAssemblytableswitch : SDNode<"WebAssemblyISD::TABLESWITCH",
56                                    SDT_WebAssemblyTableswitch,
57                                    [SDNPHasChain, SDNPVariadic]>;
58def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT",
59                                 SDT_WebAssemblyArgument>;
60def WebAssemblyreturn   : SDNode<"WebAssemblyISD::RETURN",
61                                 SDT_WebAssemblyReturn, [SDNPHasChain]>;
62def WebAssemblywrapper  : SDNode<"WebAssemblyISD::Wrapper",
63                                 SDT_WebAssemblyWrapper>;
64
65//===----------------------------------------------------------------------===//
66// WebAssembly-specific Operands.
67//===----------------------------------------------------------------------===//
68
69let OperandNamespace = "WebAssembly" in {
70
71let OperandType = "OPERAND_BASIC_BLOCK" in
72def bb_op : Operand<OtherVT>;
73
74let OperandType = "OPERAND_FPIMM" in {
75def f32imm_op : Operand<f32>;
76def f64imm_op : Operand<f64>;
77} // OperandType = "OPERAND_FPIMM"
78
79} // OperandNamespace = "WebAssembly"
80
81//===----------------------------------------------------------------------===//
82// WebAssembly Instruction Format Definitions.
83//===----------------------------------------------------------------------===//
84
85include "WebAssemblyInstrFormats.td"
86
87//===----------------------------------------------------------------------===//
88// Additional instructions.
89//===----------------------------------------------------------------------===//
90
91multiclass ARGUMENT<WebAssemblyRegClass vt> {
92  let hasSideEffects = 1, Uses = [ARGUMENTS], isCodeGenOnly = 1 in
93  def ARGUMENT_#vt : I<(outs vt:$res), (ins i32imm:$argno),
94                       [(set vt:$res, (WebAssemblyargument timm:$argno))]>;
95}
96defm : ARGUMENT<I32>;
97defm : ARGUMENT<I64>;
98defm : ARGUMENT<F32>;
99defm : ARGUMENT<F64>;
100
101let Defs = [ARGUMENTS] in {
102
103// get_local and set_local are not generated by instruction selection; they
104// are implied by virtual register uses and defs in most contexts. However,
105// they are explicitly emitted for special purposes.
106multiclass LOCAL<WebAssemblyRegClass vt> {
107  def GET_LOCAL_#vt : I<(outs vt:$res), (ins i32imm:$regno), [],
108                        "get_local\t$res, $regno">;
109  // TODO: set_local returns its operand value
110  def SET_LOCAL_#vt : I<(outs), (ins i32imm:$regno, vt:$src), [],
111                        "set_local\t$regno, $src">;
112
113  // COPY_LOCAL is not an actual instruction in wasm, but since we allow
114  // get_local and set_local to be implicit, we can have a COPY_LOCAL which
115  // is actually a no-op because all the work is done in the implied
116  // get_local and set_local.
117  let isAsCheapAsAMove = 1 in
118  def COPY_LOCAL_#vt : I<(outs vt:$res), (ins vt:$src), [],
119                         "copy_local\t$res, $src">;
120}
121defm : LOCAL<I32>;
122defm : LOCAL<I64>;
123defm : LOCAL<F32>;
124defm : LOCAL<F64>;
125
126let isMoveImm = 1 in {
127def CONST_I32 : I<(outs I32:$res), (ins i32imm:$imm),
128                  [(set I32:$res, imm:$imm)],
129                  "i32.const\t$res, $imm">;
130def CONST_I64 : I<(outs I64:$res), (ins i64imm:$imm),
131                  [(set I64:$res, imm:$imm)],
132                  "i64.const\t$res, $imm">;
133def CONST_F32 : I<(outs F32:$res), (ins f32imm_op:$imm),
134                  [(set F32:$res, fpimm:$imm)],
135                  "f32.const\t$res, $imm">;
136def CONST_F64 : I<(outs F64:$res), (ins f64imm_op:$imm),
137                  [(set F64:$res, fpimm:$imm)],
138                  "f64.const\t$res, $imm">;
139} // isMoveImm = 1
140
141} // Defs = [ARGUMENTS]
142
143def : Pat<(i32 (WebAssemblywrapper tglobaladdr:$addr)),
144          (CONST_I32 tglobaladdr:$addr)>;
145def : Pat<(i32 (WebAssemblywrapper texternalsym:$addr)),
146          (CONST_I32 texternalsym:$addr)>;
147
148//===----------------------------------------------------------------------===//
149// Additional sets of instructions.
150//===----------------------------------------------------------------------===//
151
152include "WebAssemblyInstrMemory.td"
153include "WebAssemblyInstrCall.td"
154include "WebAssemblyInstrControl.td"
155include "WebAssemblyInstrInteger.td"
156include "WebAssemblyInstrConv.td"
157include "WebAssemblyInstrFloat.td"
158include "WebAssemblyInstrAtomics.td"
159include "WebAssemblyInstrSIMD.td"
160