1 //- WebAssemblyISelDAGToDAG.cpp - A dag to dag inst selector for WebAssembly -// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// This file defines an instruction selector for the WebAssembly target. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 16 #include "WebAssembly.h" 17 #include "WebAssemblyTargetMachine.h" 18 #include "llvm/CodeGen/SelectionDAGISel.h" 19 #include "llvm/IR/Function.h" // To access function attributes. 20 #include "llvm/Support/Debug.h" 21 #include "llvm/Support/KnownBits.h" 22 #include "llvm/Support/MathExtras.h" 23 #include "llvm/Support/raw_ostream.h" 24 using namespace llvm; 25 26 #define DEBUG_TYPE "wasm-isel" 27 28 //===--------------------------------------------------------------------===// 29 /// WebAssembly-specific code to select WebAssembly machine instructions for 30 /// SelectionDAG operations. 31 /// 32 namespace { 33 class WebAssemblyDAGToDAGISel final : public SelectionDAGISel { 34 /// Keep a pointer to the WebAssemblySubtarget around so that we can make the 35 /// right decision when generating code for different targets. 36 const WebAssemblySubtarget *Subtarget; 37 38 bool ForCodeSize; 39 40 public: 41 WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &tm, 42 CodeGenOpt::Level OptLevel) 43 : SelectionDAGISel(tm, OptLevel), Subtarget(nullptr), ForCodeSize(false) { 44 } 45 46 StringRef getPassName() const override { 47 return "WebAssembly Instruction Selection"; 48 } 49 50 bool runOnMachineFunction(MachineFunction &MF) override { 51 LLVM_DEBUG(dbgs() << "********** ISelDAGToDAG **********\n" 52 "********** Function: " 53 << MF.getName() << '\n'); 54 55 ForCodeSize = MF.getFunction().hasFnAttribute(Attribute::OptimizeForSize) || 56 MF.getFunction().hasFnAttribute(Attribute::MinSize); 57 Subtarget = &MF.getSubtarget<WebAssemblySubtarget>(); 58 return SelectionDAGISel::runOnMachineFunction(MF); 59 } 60 61 void Select(SDNode *Node) override; 62 63 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, 64 std::vector<SDValue> &OutOps) override; 65 66 // Include the pieces autogenerated from the target description. 67 #include "WebAssemblyGenDAGISel.inc" 68 69 private: 70 // add select functions here... 71 }; 72 } // end anonymous namespace 73 74 void WebAssemblyDAGToDAGISel::Select(SDNode *Node) { 75 // If we have a custom node, we already have selected! 76 if (Node->isMachineOpcode()) { 77 LLVM_DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n"); 78 Node->setNodeId(-1); 79 return; 80 } 81 82 // Few custom selection stuff. If we need WebAssembly-specific selection, 83 // uncomment this block add corresponding case statements. 84 /* 85 switch (Node->getOpcode()) { 86 default: 87 break; 88 } 89 */ 90 91 // Select the default instruction. 92 SelectCode(Node); 93 } 94 95 bool WebAssemblyDAGToDAGISel::SelectInlineAsmMemoryOperand( 96 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { 97 switch (ConstraintID) { 98 case InlineAsm::Constraint_i: 99 case InlineAsm::Constraint_m: 100 // We just support simple memory operands that just have a single address 101 // operand and need no special handling. 102 OutOps.push_back(Op); 103 return false; 104 default: 105 break; 106 } 107 108 return true; 109 } 110 111 /// This pass converts a legalized DAG into a WebAssembly-specific DAG, ready 112 /// for instruction scheduling. 113 FunctionPass *llvm::createWebAssemblyISelDag(WebAssemblyTargetMachine &TM, 114 CodeGenOpt::Level OptLevel) { 115 return new WebAssemblyDAGToDAGISel(TM, OptLevel); 116 } 117