1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// Type profiles 12//===----------------------------------------------------------------------===// 13def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 14 SDTCisVT<1, i64>]>; 15def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 16 SDTCisVT<1, i64>]>; 17def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 18def SDT_ZCmp : SDTypeProfile<1, 2, 19 [SDTCisVT<0, i32>, 20 SDTCisSameAs<1, 2>]>; 21def SDT_ZICmp : SDTypeProfile<1, 3, 22 [SDTCisVT<0, i32>, 23 SDTCisSameAs<1, 2>, 24 SDTCisVT<3, i32>]>; 25def SDT_ZBRCCMask : SDTypeProfile<0, 4, 26 [SDTCisVT<0, i32>, 27 SDTCisVT<1, i32>, 28 SDTCisVT<2, OtherVT>, 29 SDTCisVT<3, i32>]>; 30def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 31 [SDTCisSameAs<0, 1>, 32 SDTCisSameAs<1, 2>, 33 SDTCisVT<3, i32>, 34 SDTCisVT<4, i32>, 35 SDTCisVT<5, i32>]>; 36def SDT_ZWrapPtr : SDTypeProfile<1, 1, 37 [SDTCisSameAs<0, 1>, 38 SDTCisPtrTy<0>]>; 39def SDT_ZWrapOffset : SDTypeProfile<1, 2, 40 [SDTCisSameAs<0, 1>, 41 SDTCisSameAs<0, 2>, 42 SDTCisPtrTy<0>]>; 43def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 44def SDT_ZGR128Binary : SDTypeProfile<1, 2, 45 [SDTCisVT<0, untyped>, 46 SDTCisInt<1>, 47 SDTCisInt<2>]>; 48def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 49 [SDTCisInt<0>, 50 SDTCisVT<1, i32>, 51 SDTCisSameAs<0, 2>, 52 SDTCisSameAs<0, 3>]>; 53def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 54 [SDTCisInt<0>, 55 SDTCisVT<1, i32>, 56 SDTCisSameAs<0, 2>, 57 SDTCisSameAs<0, 3>, 58 SDTCisVT<1, i32>]>; 59def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 60 [SDTCisVT<0, i32>, 61 SDTCisPtrTy<1>, 62 SDTCisVT<2, i32>, 63 SDTCisVT<3, i32>, 64 SDTCisVT<4, i32>, 65 SDTCisVT<5, i32>]>; 66def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 67 [SDTCisVT<0, i32>, 68 SDTCisVT<1, i32>, 69 SDTCisPtrTy<2>, 70 SDTCisVT<3, i32>, 71 SDTCisVT<4, i32>, 72 SDTCisVT<5, i32>, 73 SDTCisVT<6, i32>, 74 SDTCisVT<7, i32>]>; 75def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 76 [SDTCisInt<0>, 77 SDTCisVT<1, i32>, 78 SDTCisPtrTy<2>, 79 SDTCisSameAs<0, 3>, 80 SDTCisSameAs<0, 4>]>; 81def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 82 [SDTCisVT<0, untyped>, 83 SDTCisPtrTy<1>]>; 84def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 85 [SDTCisVT<0, untyped>, 86 SDTCisPtrTy<1>]>; 87def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 88 [SDTCisVT<0, untyped>, 89 SDTCisVT<1, i32>, 90 SDTCisPtrTy<2>, 91 SDTCisVT<3, untyped>, 92 SDTCisVT<4, untyped>]>; 93def SDT_ZMemMemLength : SDTypeProfile<0, 3, 94 [SDTCisPtrTy<0>, 95 SDTCisPtrTy<1>, 96 SDTCisVT<2, i64>]>; 97def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 98 [SDTCisVT<0, i32>, 99 SDTCisPtrTy<1>, 100 SDTCisPtrTy<2>, 101 SDTCisVT<3, i64>]>; 102def SDT_ZMemMemLoop : SDTypeProfile<0, 4, 103 [SDTCisPtrTy<0>, 104 SDTCisPtrTy<1>, 105 SDTCisVT<2, i64>, 106 SDTCisVT<3, i64>]>; 107def SDT_ZMemMemLoopCC : SDTypeProfile<1, 4, 108 [SDTCisVT<0, i32>, 109 SDTCisPtrTy<1>, 110 SDTCisPtrTy<2>, 111 SDTCisVT<3, i64>, 112 SDTCisVT<4, i64>]>; 113def SDT_ZString : SDTypeProfile<1, 3, 114 [SDTCisPtrTy<0>, 115 SDTCisPtrTy<1>, 116 SDTCisPtrTy<2>, 117 SDTCisVT<3, i32>]>; 118def SDT_ZStringCC : SDTypeProfile<2, 3, 119 [SDTCisPtrTy<0>, 120 SDTCisVT<1, i32>, 121 SDTCisPtrTy<2>, 122 SDTCisPtrTy<3>, 123 SDTCisVT<4, i32>]>; 124def SDT_ZIPM : SDTypeProfile<1, 1, 125 [SDTCisVT<0, i32>, 126 SDTCisVT<1, i32>]>; 127def SDT_ZPrefetch : SDTypeProfile<0, 2, 128 [SDTCisVT<0, i32>, 129 SDTCisPtrTy<1>]>; 130def SDT_ZTBegin : SDTypeProfile<1, 2, 131 [SDTCisVT<0, i32>, 132 SDTCisPtrTy<1>, 133 SDTCisVT<2, i32>]>; 134def SDT_ZTEnd : SDTypeProfile<1, 0, 135 [SDTCisVT<0, i32>]>; 136def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 137 [SDTCisVec<0>, 138 SDTCisSameAs<0, 1>, 139 SDTCisVT<3, i32>]>; 140def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 141 [SDTCisVec<1>, 142 SDTCisVT<2, i32>]>; 143def SDT_ZReplicate : SDTypeProfile<1, 1, 144 [SDTCisVec<0>]>; 145def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 146 [SDTCisVec<0>, 147 SDTCisVec<1>]>; 148def SDT_ZVecUnary : SDTypeProfile<1, 1, 149 [SDTCisVec<0>, 150 SDTCisSameAs<0, 1>]>; 151def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 152 [SDTCisVec<0>, 153 SDTCisVT<1, i32>, 154 SDTCisSameAs<0, 2>]>; 155def SDT_ZVecBinary : SDTypeProfile<1, 2, 156 [SDTCisVec<0>, 157 SDTCisSameAs<0, 1>, 158 SDTCisSameAs<0, 2>]>; 159def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 160 [SDTCisVec<0>, 161 SDTCisVT<1, i32>, 162 SDTCisSameAs<0, 2>, 163 SDTCisSameAs<0, 2>]>; 164def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 165 [SDTCisVec<0>, 166 SDTCisSameAs<0, 1>, 167 SDTCisVT<2, i32>]>; 168def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 169 [SDTCisVec<0>, 170 SDTCisVec<1>, 171 SDTCisSameAs<1, 2>]>; 172def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 173 [SDTCisVec<0>, 174 SDTCisVT<1, i32>, 175 SDTCisVec<2>, 176 SDTCisSameAs<2, 3>]>; 177def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 178 [SDTCisVec<0>, 179 SDTCisVT<1, i32>, 180 SDTCisVec<2>, 181 SDTCisVT<3, i32>]>; 182def SDT_ZRotateMask : SDTypeProfile<1, 2, 183 [SDTCisVec<0>, 184 SDTCisVT<1, i32>, 185 SDTCisVT<2, i32>]>; 186def SDT_ZJoinDwords : SDTypeProfile<1, 2, 187 [SDTCisVT<0, v2i64>, 188 SDTCisVT<1, i64>, 189 SDTCisVT<2, i64>]>; 190def SDT_ZVecTernary : SDTypeProfile<1, 3, 191 [SDTCisVec<0>, 192 SDTCisSameAs<0, 1>, 193 SDTCisSameAs<0, 2>, 194 SDTCisSameAs<0, 3>]>; 195def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 196 [SDTCisVec<0>, 197 SDTCisSameAs<0, 1>, 198 SDTCisSameAs<0, 2>, 199 SDTCisVT<3, i32>]>; 200def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 201 [SDTCisVec<0>, 202 SDTCisVT<1, i32>, 203 SDTCisSameAs<0, 2>, 204 SDTCisSameAs<0, 3>, 205 SDTCisVT<4, i32>]>; 206def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 207 [SDTCisVec<0>, 208 SDTCisSameAs<0, 1>, 209 SDTCisSameAs<0, 2>, 210 SDTCisSameAs<0, 3>, 211 SDTCisVT<4, i32>]>; 212def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 213 [SDTCisVec<0>, 214 SDTCisVT<1, i32>, 215 SDTCisSameAs<0, 2>, 216 SDTCisSameAs<0, 3>, 217 SDTCisSameAs<0, 4>, 218 SDTCisVT<5, i32>]>; 219def SDT_ZTest : SDTypeProfile<1, 2, 220 [SDTCisVT<0, i32>, 221 SDTCisVT<2, i64>]>; 222 223//===----------------------------------------------------------------------===// 224// Node definitions 225//===----------------------------------------------------------------------===// 226 227// These are target-independent nodes, but have target-specific formats. 228def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 229 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 230def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 231 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 232 SDNPOutGlue]>; 233def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 234 235// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 236def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 237 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 238def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 239 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 240 SDNPVariadic]>; 241def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 242 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 243 SDNPVariadic]>; 244def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 245 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 246 SDNPVariadic]>; 247def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 248 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 249 SDNPVariadic]>; 250def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 251def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 252 SDT_ZWrapOffset, []>; 253def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>; 254def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 255def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 256def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 257def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 258 [SDNPHasChain]>; 259def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 260 SDT_ZSelectCCMask>; 261def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 262def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 263def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 264def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 265def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 266def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 267def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 268def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 269def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 270def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 271def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 272def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 273def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 274 275def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone, 276 [SDNPHasChain, SDNPSideEffect]>; 277 278def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad, 279 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 280def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore, 281 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 282 283def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 284 285// Defined because the index is an i32 rather than a pointer. 286def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 287 SDT_ZInsertVectorElt>; 288def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 289 SDT_ZExtractVectorElt>; 290def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 291def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 292def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 293def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 294def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 295def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 296def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 297def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 298def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 299 SDT_ZVecTernaryInt>; 300def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 301def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 302def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 303def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 304def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 305def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 306def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 307def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 308def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 309 SDT_ZVecBinaryInt>; 310def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 311 SDT_ZVecBinaryInt>; 312def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 313 SDT_ZVecBinaryInt>; 314def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>; 315def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 316def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 317def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 318def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>; 319def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>; 320def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>; 321def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 322def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 323def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 324def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 325def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 326def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 327def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 328def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 329def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 330def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 331def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 332def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 333def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 334def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 335def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 336def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 337def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 338 SDT_ZVecQuaternaryIntCC>; 339def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 340 SDT_ZVecQuaternaryIntCC>; 341def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 342 343class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 344 : SDNode<"SystemZISD::"##name, profile, 345 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 346 347def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 348def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 349def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 350def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 351def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 352def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 353def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 354def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 355def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 356def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 357def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 358 359def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 360 SDT_ZAtomicCmpSwap, 361 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 362 SDNPMemOperand]>; 363def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 364 SDT_ZAtomicCmpSwapW, 365 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 366 SDNPMemOperand]>; 367 368def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 369 SDT_ZAtomicLoad128, 370 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 371def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 372 SDT_ZAtomicStore128, 373 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 374def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 375 SDT_ZAtomicCmpSwap128, 376 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 377 SDNPMemOperand]>; 378 379def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 380 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 381def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop, 382 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 383def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 384 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 385def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop, 386 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 387def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 388 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 389def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop, 390 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 391def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 392 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 393def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop, 394 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 395def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 396 [SDNPHasChain, SDNPMayLoad]>; 397def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoopCC, 398 [SDNPHasChain, SDNPMayLoad]>; 399def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 400 [SDNPHasChain, SDNPMayLoad]>; 401def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 402 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 403def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 404 [SDNPHasChain, SDNPMayLoad]>; 405def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 406 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 407 SDNPMemOperand]>; 408 409def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 410 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 411def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 412 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 413def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 414 [SDNPHasChain, SDNPSideEffect]>; 415 416def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 417def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 418def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 419 420//===----------------------------------------------------------------------===// 421// Pattern fragments 422//===----------------------------------------------------------------------===// 423 424def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 425 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 426}]>; 427def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 428 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 429}]>; 430def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 431 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 432}]>; 433 434def z_storebswap16 : PatFrag<(ops node:$src, node:$addr), 435 (z_storebswap node:$src, node:$addr), [{ 436 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 437}]>; 438def z_storebswap32 : PatFrag<(ops node:$src, node:$addr), 439 (z_storebswap node:$src, node:$addr), [{ 440 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 441}]>; 442def z_storebswap64 : PatFrag<(ops node:$src, node:$addr), 443 (z_storebswap node:$src, node:$addr), [{ 444 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 445}]>; 446 447// Fragments including CC as an implicit source. 448def z_br_ccmask 449 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 450 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 451def z_select_ccmask 452 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 453 (z_select_ccmask_1 node:$true, node:$false, 454 node:$valid, node:$mask, CC)>; 455def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 456def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 457 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 458def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 459 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 460 461// Signed and unsigned comparisons. 462def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 463 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 464 return Type != SystemZICMP::UnsignedOnly; 465}]>; 466def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 467 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 468 return Type != SystemZICMP::SignedOnly; 469}]>; 470 471// Register- and memory-based TEST UNDER MASK. 472def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>; 473def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 474 475// Register sign-extend operations. Sub-32-bit values are represented as i32s. 476def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 477def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 478def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 479 480// Match extensions of an i32 to an i64, followed by an in-register sign 481// extension from a sub-i32 value. 482def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 483def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 484 485// Register zero-extend operations. Sub-32-bit values are represented as i32s. 486def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 487def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 488def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 489 490// Extending loads in which the extension type can be signed. 491def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 492 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 493 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 494}]>; 495def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 496 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 497}]>; 498def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 499 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 500}]>; 501def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 502 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 503}]>; 504 505// Extending loads in which the extension type can be unsigned. 506def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 507 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 508 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 509}]>; 510def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 511 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 512}]>; 513def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 514 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 515}]>; 516def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 517 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 518}]>; 519 520// Extending loads in which the extension type doesn't matter. 521def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 522 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 523}]>; 524def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 525 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 526}]>; 527def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 528 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 529}]>; 530def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 531 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 532}]>; 533 534// Aligned loads. 535class AlignedLoad<SDPatternOperator load> 536 : PatFrag<(ops node:$addr), (load node:$addr), [{ 537 auto *Load = cast<LoadSDNode>(N); 538 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 539}]>; 540def aligned_load : AlignedLoad<load>; 541def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 542def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 543def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 544def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 545 546// Aligned stores. 547class AlignedStore<SDPatternOperator store> 548 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 549 auto *Store = cast<StoreSDNode>(N); 550 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 551}]>; 552def aligned_store : AlignedStore<store>; 553def aligned_truncstorei16 : AlignedStore<truncstorei16>; 554def aligned_truncstorei32 : AlignedStore<truncstorei32>; 555 556// Non-volatile loads. Used for instructions that might access the storage 557// location multiple times. 558class NonvolatileLoad<SDPatternOperator load> 559 : PatFrag<(ops node:$addr), (load node:$addr), [{ 560 auto *Load = cast<LoadSDNode>(N); 561 return !Load->isVolatile(); 562}]>; 563def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 564def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 565def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 566 567// Non-volatile stores. 568class NonvolatileStore<SDPatternOperator store> 569 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 570 auto *Store = cast<StoreSDNode>(N); 571 return !Store->isVolatile(); 572}]>; 573def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 574def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 575def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 576 577// A store of a load that can be implemented using MVC. 578def mvc_store : PatFrag<(ops node:$value, node:$addr), 579 (unindexedstore node:$value, node:$addr), 580 [{ return storeLoadCanUseMVC(N); }]>; 581 582// Binary read-modify-write operations on memory in which the other 583// operand is also memory and for which block operations like NC can 584// be used. There are two patterns for each operator, depending on 585// which operand contains the "other" load. 586multiclass block_op<SDPatternOperator operator> { 587 def "1" : PatFrag<(ops node:$value, node:$addr), 588 (unindexedstore (operator node:$value, 589 (unindexedload node:$addr)), 590 node:$addr), 591 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 592 def "2" : PatFrag<(ops node:$value, node:$addr), 593 (unindexedstore (operator (unindexedload node:$addr), 594 node:$value), 595 node:$addr), 596 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 597} 598defm block_and : block_op<and>; 599defm block_or : block_op<or>; 600defm block_xor : block_op<xor>; 601 602// Insertions. 603def inserti8 : PatFrag<(ops node:$src1, node:$src2), 604 (or (and node:$src1, -256), node:$src2)>; 605def insertll : PatFrag<(ops node:$src1, node:$src2), 606 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 607def insertlh : PatFrag<(ops node:$src1, node:$src2), 608 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 609def inserthl : PatFrag<(ops node:$src1, node:$src2), 610 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 611def inserthh : PatFrag<(ops node:$src1, node:$src2), 612 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 613def insertlf : PatFrag<(ops node:$src1, node:$src2), 614 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 615def inserthf : PatFrag<(ops node:$src1, node:$src2), 616 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 617 618// ORs that can be treated as insertions. 619def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 620 (or node:$src1, node:$src2), [{ 621 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 622 return CurDAG->MaskedValueIsZero(N->getOperand(0), 623 APInt::getLowBitsSet(BitWidth, 8)); 624}]>; 625 626// ORs that can be treated as reversed insertions. 627def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 628 (or node:$src1, node:$src2), [{ 629 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 630 return CurDAG->MaskedValueIsZero(N->getOperand(1), 631 APInt::getLowBitsSet(BitWidth, 8)); 632}]>; 633 634// Negative integer absolute. 635def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>; 636 637// Integer absolute, matching the canonical form generated by DAGCombiner. 638def z_iabs32 : PatFrag<(ops node:$src), 639 (xor (add node:$src, (sra node:$src, (i32 31))), 640 (sra node:$src, (i32 31)))>; 641def z_iabs64 : PatFrag<(ops node:$src), 642 (xor (add node:$src, (sra node:$src, (i32 63))), 643 (sra node:$src, (i32 63)))>; 644def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>; 645def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>; 646 647// Integer multiply-and-add 648def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 649 (add (mul node:$src1, node:$src2), node:$src3)>; 650 651// Alternatives to match operations with or without an overflow CC result. 652def z_sadd : PatFrags<(ops node:$src1, node:$src2), 653 [(z_saddo node:$src1, node:$src2), 654 (add node:$src1, node:$src2)]>; 655def z_uadd : PatFrags<(ops node:$src1, node:$src2), 656 [(z_uaddo node:$src1, node:$src2), 657 (add node:$src1, node:$src2)]>; 658def z_ssub : PatFrags<(ops node:$src1, node:$src2), 659 [(z_ssubo node:$src1, node:$src2), 660 (sub node:$src1, node:$src2)]>; 661def z_usub : PatFrags<(ops node:$src1, node:$src2), 662 [(z_usubo node:$src1, node:$src2), 663 (sub node:$src1, node:$src2)]>; 664 665// Fused multiply-subtract, using the natural operand order. 666def fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 667 (fma node:$src1, node:$src2, (fneg node:$src3))>; 668 669// Fused multiply-add and multiply-subtract, but with the order of the 670// operands matching SystemZ's MA and MS instructions. 671def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 672 (fma node:$src2, node:$src3, node:$src1)>; 673def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 674 (fma node:$src2, node:$src3, (fneg node:$src1))>; 675 676// Negative fused multiply-add and multiply-subtract. 677def fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 678 (fneg (fma node:$src1, node:$src2, node:$src3))>; 679def fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 680 (fneg (fms node:$src1, node:$src2, node:$src3))>; 681 682// Floating-point negative absolute. 683def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 684 685// Create a unary operator that loads from memory and then performs 686// the given operation on it. 687class loadu<SDPatternOperator operator, SDPatternOperator load = load> 688 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 689 690// Create a store operator that performs the given unary operation 691// on the value before storing it. 692class storeu<SDPatternOperator operator, SDPatternOperator store = store> 693 : PatFrag<(ops node:$value, node:$addr), 694 (store (operator node:$value), node:$addr)>; 695 696// Create a store operator that performs the given inherent operation 697// and stores the resulting value. 698class storei<SDPatternOperator operator, SDPatternOperator store = store> 699 : PatFrag<(ops node:$addr), 700 (store (operator), node:$addr)>; 701 702// Create a shift operator that optionally ignores an AND of the 703// shift count with an immediate if the bottom 6 bits are all set. 704def imm32bottom6set : PatLeaf<(i32 imm), [{ 705 return (N->getZExtValue() & 0x3f) == 0x3f; 706}]>; 707class shiftop<SDPatternOperator operator> 708 : PatFrags<(ops node:$val, node:$count), 709 [(operator node:$val, node:$count), 710 (operator node:$val, (and node:$count, imm32bottom6set))]>; 711 712// Vector representation of all-zeros and all-ones. 713def z_vzero : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 0))))>; 714def z_vones : PatFrag<(ops), (bitconvert (v16i8 (z_byte_mask (i32 65535))))>; 715 716// Load a scalar and replicate it in all elements of a vector. 717class z_replicate_load<ValueType scalartype, SDPatternOperator load> 718 : PatFrag<(ops node:$addr), 719 (z_replicate (scalartype (load node:$addr)))>; 720def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 721def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 722def z_replicate_loadi32 : z_replicate_load<i32, load>; 723def z_replicate_loadi64 : z_replicate_load<i64, load>; 724def z_replicate_loadf32 : z_replicate_load<f32, load>; 725def z_replicate_loadf64 : z_replicate_load<f64, load>; 726 727// Load a scalar and insert it into a single element of a vector. 728class z_vle<ValueType scalartype, SDPatternOperator load> 729 : PatFrag<(ops node:$vec, node:$addr, node:$index), 730 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 731 node:$index)>; 732def z_vlei8 : z_vle<i32, anyextloadi8>; 733def z_vlei16 : z_vle<i32, anyextloadi16>; 734def z_vlei32 : z_vle<i32, load>; 735def z_vlei64 : z_vle<i64, load>; 736def z_vlef32 : z_vle<f32, load>; 737def z_vlef64 : z_vle<f64, load>; 738 739// Load a scalar and insert it into the low element of the high i64 of a 740// zeroed vector. 741class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 742 : PatFrag<(ops node:$addr), 743 (z_vector_insert (z_vzero), 744 (scalartype (load node:$addr)), (i32 index))>; 745def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 746def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 747def z_vllezi32 : z_vllez<i32, load, 1>; 748def z_vllezi64 : PatFrags<(ops node:$addr), 749 [(z_vector_insert (z_vzero), 750 (i64 (load node:$addr)), (i32 0)), 751 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>; 752// We use high merges to form a v4f32 from four f32s. Propagating zero 753// into all elements but index 1 gives this expression. 754def z_vllezf32 : PatFrag<(ops node:$addr), 755 (z_merge_high 756 (v2i64 757 (z_unpackl_high 758 (v4i32 759 (bitconvert 760 (v4f32 (scalar_to_vector 761 (f32 (load node:$addr)))))))), 762 (v2i64 (z_vzero)))>; 763def z_vllezf64 : PatFrag<(ops node:$addr), 764 (z_merge_high 765 (v2f64 (scalar_to_vector (f64 (load node:$addr)))), 766 (z_vzero))>; 767 768// Similarly for the high element of a zeroed vector. 769def z_vllezli32 : z_vllez<i32, load, 0>; 770def z_vllezlf32 : PatFrag<(ops node:$addr), 771 (z_merge_high 772 (v2i64 773 (bitconvert 774 (z_merge_high 775 (v4f32 (scalar_to_vector 776 (f32 (load node:$addr)))), 777 (v4f32 (z_vzero))))), 778 (v2i64 (z_vzero)))>; 779 780// Store one element of a vector. 781class z_vste<ValueType scalartype, SDPatternOperator store> 782 : PatFrag<(ops node:$vec, node:$addr, node:$index), 783 (store (scalartype (z_vector_extract node:$vec, node:$index)), 784 node:$addr)>; 785def z_vstei8 : z_vste<i32, truncstorei8>; 786def z_vstei16 : z_vste<i32, truncstorei16>; 787def z_vstei32 : z_vste<i32, store>; 788def z_vstei64 : z_vste<i64, store>; 789def z_vstef32 : z_vste<f32, store>; 790def z_vstef64 : z_vste<f64, store>; 791 792// Arithmetic negation on vectors. 793def z_vneg : PatFrag<(ops node:$x), (sub (z_vzero), node:$x)>; 794 795// Bitwise negation on vectors. 796def z_vnot : PatFrag<(ops node:$x), (xor node:$x, (z_vones))>; 797 798// Signed "integer greater than zero" on vectors. 799def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, (z_vzero))>; 800 801// Signed "integer less than zero" on vectors. 802def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph (z_vzero), node:$x)>; 803 804// Integer absolute on vectors. 805class z_viabs<int shift> 806 : PatFrag<(ops node:$src), 807 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))), 808 (z_vsra_by_scalar node:$src, (i32 shift)))>; 809def z_viabs8 : z_viabs<7>; 810def z_viabs16 : z_viabs<15>; 811def z_viabs32 : z_viabs<31>; 812def z_viabs64 : z_viabs<63>; 813 814// Sign-extend the i64 elements of a vector. 815class z_vse<int shift> 816 : PatFrag<(ops node:$src), 817 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 818def z_vsei8 : z_vse<56>; 819def z_vsei16 : z_vse<48>; 820def z_vsei32 : z_vse<32>; 821 822// ...and again with the extensions being done on individual i64 scalars. 823class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 824 : PatFrag<(ops node:$src), 825 (z_join_dwords 826 (operator (z_vector_extract node:$src, index1)), 827 (operator (z_vector_extract node:$src, index2)))>; 828def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 829def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 830def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 831