1 //==- SystemZMachineScheduler.h - SystemZ Scheduler Interface ----*- C++ -*-==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // -------------------------- Post RA scheduling ---------------------------- //
11 // SystemZPostRASchedStrategy is a scheduling strategy which is plugged into
12 // the MachineScheduler. It has a sorted Available set of SUs and a pickNode()
13 // implementation that looks to optimize decoder grouping and balance the
14 // usage of processor resources. Scheduler states are saved for the end
15 // region of each MBB, so that a successor block can learn from it.
16 //===----------------------------------------------------------------------===//
17 
18 #include "SystemZHazardRecognizer.h"
19 #include "llvm/CodeGen/MachineScheduler.h"
20 #include "llvm/CodeGen/ScheduleDAG.h"
21 #include <set>
22 
23 #ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
24 #define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
25 
26 using namespace llvm;
27 
28 namespace llvm {
29 
30 /// A MachineSchedStrategy implementation for SystemZ post RA scheduling.
31 class SystemZPostRASchedStrategy : public MachineSchedStrategy {
32 
33   const MachineLoopInfo *MLI;
34   const SystemZInstrInfo *TII;
35 
36   // A SchedModel is needed before any DAG is built while advancing past
37   // non-scheduled instructions, so it would not always be possible to call
38   // DAG->getSchedClass(SU).
39   TargetSchedModel SchedModel;
40 
41   /// A candidate during instruction evaluation.
42   struct Candidate {
43     SUnit *SU = nullptr;
44 
45     /// The decoding cost.
46     int GroupingCost = 0;
47 
48     /// The processor resources cost.
49     int ResourcesCost = 0;
50 
51     Candidate() = default;
52     Candidate(SUnit *SU_, SystemZHazardRecognizer &HazardRec);
53 
54     // Compare two candidates.
55     bool operator<(const Candidate &other);
56 
57     // Check if this node is free of cost ("as good as any").
58     bool noCost() const {
59       return (GroupingCost <= 0 && !ResourcesCost);
60     }
61   };
62 
63   // A sorter for the Available set that makes sure that SUs are considered
64   // in the best order.
65   struct SUSorter {
66     bool operator() (SUnit *lhs, SUnit *rhs) const {
67       if (lhs->isScheduleHigh && !rhs->isScheduleHigh)
68         return true;
69       if (!lhs->isScheduleHigh && rhs->isScheduleHigh)
70         return false;
71 
72       if (lhs->getHeight() > rhs->getHeight())
73         return true;
74       else if (lhs->getHeight() < rhs->getHeight())
75         return false;
76 
77       return (lhs->NodeNum < rhs->NodeNum);
78     }
79   };
80   // A set of SUs with a sorter and dump method.
81   struct SUSet : std::set<SUnit*, SUSorter> {
82     #ifndef NDEBUG
83     void dump(SystemZHazardRecognizer &HazardRec) const;
84     #endif
85   };
86 
87   /// The set of available SUs to schedule next.
88   SUSet Available;
89 
90   /// Current MBB
91   MachineBasicBlock *MBB;
92 
93   /// Maintain hazard recognizers for all blocks, so that the scheduler state
94   /// can be maintained past BB boundaries when appropariate.
95   typedef std::map<MachineBasicBlock*, SystemZHazardRecognizer*> MBB2HazRec;
96   MBB2HazRec SchedStates;
97 
98   /// Pointer to the HazardRecognizer that tracks the scheduler state for
99   /// the current region.
100   SystemZHazardRecognizer *HazardRec;
101 
102   /// Update the scheduler state by emitting (non-scheduled) instructions
103   /// up to, but not including, NextBegin.
104   void advanceTo(MachineBasicBlock::iterator NextBegin);
105 
106 public:
107   SystemZPostRASchedStrategy(const MachineSchedContext *C);
108   virtual ~SystemZPostRASchedStrategy();
109 
110   /// Called for a region before scheduling.
111   void initPolicy(MachineBasicBlock::iterator Begin,
112                   MachineBasicBlock::iterator End,
113                   unsigned NumRegionInstrs) override;
114 
115   /// PostRA scheduling does not track pressure.
116   bool shouldTrackPressure() const override { return false; }
117 
118   // Process scheduling regions top-down so that scheduler states can be
119   // transferrred over scheduling boundaries.
120   bool doMBBSchedRegionsTopDown() const override { return true; }
121 
122   void initialize(ScheduleDAGMI *dag) override {}
123 
124   /// Tell the strategy that MBB is about to be processed.
125   void enterMBB(MachineBasicBlock *NextMBB) override;
126 
127   /// Tell the strategy that current MBB is done.
128   void leaveMBB() override;
129 
130   /// Pick the next node to schedule, or return NULL.
131   SUnit *pickNode(bool &IsTopNode) override;
132 
133   /// ScheduleDAGMI has scheduled an instruction - tell HazardRec
134   /// about it.
135   void schedNode(SUnit *SU, bool IsTopNode) override;
136 
137   /// SU has had all predecessor dependencies resolved. Put it into
138   /// Available.
139   void releaseTopNode(SUnit *SU) override;
140 
141   /// Currently only scheduling top-down, so this method is empty.
142   void releaseBottomNode(SUnit *SU) override {};
143 };
144 
145 } // end namespace llvm
146 
147 #endif // LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
148