1 //==-- SystemZExpandPseudo.cpp - Expand pseudo instructions -------*- C++ -*-=//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains a pass that expands pseudo instructions into target
11 // instructions to allow proper scheduling and other late optimizations.  This
12 // pass should be run after register allocation but before the post-regalloc
13 // scheduling pass.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #include "SystemZ.h"
18 #include "SystemZInstrInfo.h"
19 #include "SystemZSubtarget.h"
20 #include "llvm/CodeGen/LivePhysRegs.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 using namespace llvm;
24 
25 #define SYSTEMZ_EXPAND_PSEUDO_NAME "SystemZ pseudo instruction expansion pass"
26 
27 namespace llvm {
28   void initializeSystemZExpandPseudoPass(PassRegistry&);
29 }
30 
31 namespace {
32 class SystemZExpandPseudo : public MachineFunctionPass {
33 public:
34   static char ID;
35   SystemZExpandPseudo() : MachineFunctionPass(ID) {
36     initializeSystemZExpandPseudoPass(*PassRegistry::getPassRegistry());
37   }
38 
39   const SystemZInstrInfo *TII;
40 
41   bool runOnMachineFunction(MachineFunction &Fn) override;
42 
43   StringRef getPassName() const override { return SYSTEMZ_EXPAND_PSEUDO_NAME; }
44 
45 private:
46   bool expandMBB(MachineBasicBlock &MBB);
47   bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
48                 MachineBasicBlock::iterator &NextMBBI);
49   bool expandLOCRMux(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
50                      MachineBasicBlock::iterator &NextMBBI);
51 };
52 char SystemZExpandPseudo::ID = 0;
53 }
54 
55 INITIALIZE_PASS(SystemZExpandPseudo, "systemz-expand-pseudo",
56                 SYSTEMZ_EXPAND_PSEUDO_NAME, false, false)
57 
58 /// Returns an instance of the pseudo instruction expansion pass.
59 FunctionPass *llvm::createSystemZExpandPseudoPass(SystemZTargetMachine &TM) {
60   return new SystemZExpandPseudo();
61 }
62 
63 // MI is a load-register-on-condition pseudo instruction that could not be
64 // handled as a single hardware instruction.  Replace it by a branch sequence.
65 bool SystemZExpandPseudo::expandLOCRMux(MachineBasicBlock &MBB,
66                                         MachineBasicBlock::iterator MBBI,
67                                         MachineBasicBlock::iterator &NextMBBI) {
68   MachineFunction &MF = *MBB.getParent();
69   const BasicBlock *BB = MBB.getBasicBlock();
70   MachineInstr &MI = *MBBI;
71   DebugLoc DL = MI.getDebugLoc();
72   unsigned DestReg = MI.getOperand(0).getReg();
73   unsigned SrcReg = MI.getOperand(2).getReg();
74   unsigned CCValid = MI.getOperand(3).getImm();
75   unsigned CCMask = MI.getOperand(4).getImm();
76 
77   LivePhysRegs LiveRegs(TII->getRegisterInfo());
78   LiveRegs.addLiveOuts(MBB);
79   for (auto I = std::prev(MBB.end()); I != MBBI; --I)
80     LiveRegs.stepBackward(*I);
81 
82   // Splice MBB at MI, moving the rest of the block into RestMBB.
83   MachineBasicBlock *RestMBB = MF.CreateMachineBasicBlock(BB);
84   MF.insert(std::next(MachineFunction::iterator(MBB)), RestMBB);
85   RestMBB->splice(RestMBB->begin(), &MBB, MI, MBB.end());
86   RestMBB->transferSuccessors(&MBB);
87   for (auto I = LiveRegs.begin(); I != LiveRegs.end(); ++I)
88     RestMBB->addLiveIn(*I);
89 
90   // Create a new block MoveMBB to hold the move instruction.
91   MachineBasicBlock *MoveMBB = MF.CreateMachineBasicBlock(BB);
92   MF.insert(std::next(MachineFunction::iterator(MBB)), MoveMBB);
93   MoveMBB->addLiveIn(SrcReg);
94   for (auto I = LiveRegs.begin(); I != LiveRegs.end(); ++I)
95     MoveMBB->addLiveIn(*I);
96 
97   // At the end of MBB, create a conditional branch to RestMBB if the
98   // condition is false, otherwise fall through to MoveMBB.
99   BuildMI(&MBB, DL, TII->get(SystemZ::BRC))
100     .addImm(CCValid).addImm(CCMask ^ CCValid).addMBB(RestMBB);
101   MBB.addSuccessor(RestMBB);
102   MBB.addSuccessor(MoveMBB);
103 
104   // In MoveMBB, emit an instruction to move SrcReg into DestReg,
105   // then fall through to RestMBB.
106   TII->copyPhysReg(*MoveMBB, MoveMBB->end(), DL, DestReg, SrcReg,
107                    MI.getOperand(2).isKill());
108   MoveMBB->addSuccessor(RestMBB);
109 
110   NextMBBI = MBB.end();
111   MI.eraseFromParent();
112   return true;
113 }
114 
115 /// If MBBI references a pseudo instruction that should be expanded here,
116 /// do the expansion and return true.  Otherwise return false.
117 bool SystemZExpandPseudo::expandMI(MachineBasicBlock &MBB,
118                                    MachineBasicBlock::iterator MBBI,
119                                    MachineBasicBlock::iterator &NextMBBI) {
120   MachineInstr &MI = *MBBI;
121   switch (MI.getOpcode()) {
122   case SystemZ::LOCRMux:
123     return expandLOCRMux(MBB, MBBI, NextMBBI);
124   default:
125     break;
126   }
127   return false;
128 }
129 
130 /// Iterate over the instructions in basic block MBB and expand any
131 /// pseudo instructions.  Return true if anything was modified.
132 bool SystemZExpandPseudo::expandMBB(MachineBasicBlock &MBB) {
133   bool Modified = false;
134 
135   MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
136   while (MBBI != E) {
137     MachineBasicBlock::iterator NMBBI = std::next(MBBI);
138     Modified |= expandMI(MBB, MBBI, NMBBI);
139     MBBI = NMBBI;
140   }
141 
142   return Modified;
143 }
144 
145 bool SystemZExpandPseudo::runOnMachineFunction(MachineFunction &MF) {
146   TII = static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
147 
148   bool Modified = false;
149   for (auto &MBB : MF)
150     Modified |= expandMBB(MBB);
151   return Modified;
152 }
153 
154