1 //===-- RISCVInstPrinter.cpp - Convert RISCV MCInst to asm syntax ---------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This class prints an RISCV MCInst to a .s file. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "RISCVInstPrinter.h" 15 #include "MCTargetDesc/RISCVMCExpr.h" 16 #include "Utils/RISCVBaseInfo.h" 17 #include "llvm/MC/MCAsmInfo.h" 18 #include "llvm/MC/MCExpr.h" 19 #include "llvm/MC/MCInst.h" 20 #include "llvm/MC/MCRegisterInfo.h" 21 #include "llvm/MC/MCSubtargetInfo.h" 22 #include "llvm/MC/MCSymbol.h" 23 #include "llvm/Support/CommandLine.h" 24 #include "llvm/Support/ErrorHandling.h" 25 #include "llvm/Support/FormattedStream.h" 26 using namespace llvm; 27 28 #define DEBUG_TYPE "asm-printer" 29 30 // Include the auto-generated portion of the assembly writer. 31 #define PRINT_ALIAS_INSTR 32 #include "RISCVGenAsmWriter.inc" 33 34 // Include the auto-generated portion of the compress emitter. 35 #define GEN_UNCOMPRESS_INSTR 36 #include "RISCVGenCompressInstEmitter.inc" 37 38 static cl::opt<bool> 39 NoAliases("riscv-no-aliases", 40 cl::desc("Disable the emission of assembler pseudo instructions"), 41 cl::init(false), cl::Hidden); 42 43 void RISCVInstPrinter::printInst(const MCInst *MI, raw_ostream &O, 44 StringRef Annot, const MCSubtargetInfo &STI) { 45 bool Res = false; 46 const MCInst *NewMI = MI; 47 MCInst UncompressedMI; 48 if (!NoAliases) 49 Res = uncompressInst(UncompressedMI, *MI, MRI, STI); 50 if (Res) 51 NewMI = const_cast<MCInst *>(&UncompressedMI); 52 if (NoAliases || !printAliasInstr(NewMI, STI, O)) 53 printInstruction(NewMI, STI, O); 54 printAnnotation(O, Annot); 55 } 56 57 void RISCVInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const { 58 O << getRegisterName(RegNo); 59 } 60 61 void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, 62 const MCSubtargetInfo &STI, raw_ostream &O, 63 const char *Modifier) { 64 assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported"); 65 const MCOperand &MO = MI->getOperand(OpNo); 66 67 if (MO.isReg()) { 68 printRegName(O, MO.getReg()); 69 return; 70 } 71 72 if (MO.isImm()) { 73 O << MO.getImm(); 74 return; 75 } 76 77 assert(MO.isExpr() && "Unknown operand kind in printOperand"); 78 MO.getExpr()->print(O, &MAI); 79 } 80 81 void RISCVInstPrinter::printCSRSystemRegister(const MCInst *MI, unsigned OpNo, 82 const MCSubtargetInfo &STI, 83 raw_ostream &O) { 84 unsigned Imm = MI->getOperand(OpNo).getImm(); 85 auto SysReg = RISCVSysReg::lookupSysRegByEncoding(Imm); 86 if (SysReg && SysReg->haveRequiredFeatures(STI.getFeatureBits())) 87 O << SysReg->Name; 88 else 89 O << Imm; 90 } 91 92 void RISCVInstPrinter::printFenceArg(const MCInst *MI, unsigned OpNo, 93 const MCSubtargetInfo &STI, 94 raw_ostream &O) { 95 unsigned FenceArg = MI->getOperand(OpNo).getImm(); 96 assert (((FenceArg >> 4) == 0) && "Invalid immediate in printFenceArg"); 97 98 if ((FenceArg & RISCVFenceField::I) != 0) 99 O << 'i'; 100 if ((FenceArg & RISCVFenceField::O) != 0) 101 O << 'o'; 102 if ((FenceArg & RISCVFenceField::R) != 0) 103 O << 'r'; 104 if ((FenceArg & RISCVFenceField::W) != 0) 105 O << 'w'; 106 if (FenceArg == 0) 107 O << "unknown"; 108 } 109 110 void RISCVInstPrinter::printFRMArg(const MCInst *MI, unsigned OpNo, 111 const MCSubtargetInfo &STI, raw_ostream &O) { 112 auto FRMArg = 113 static_cast<RISCVFPRndMode::RoundingMode>(MI->getOperand(OpNo).getImm()); 114 O << RISCVFPRndMode::roundingModeToString(FRMArg); 115 } 116