1 //===-- PPCRegisterInfo.h - PowerPC Register Information Impl ---*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the PowerPC implementation of the TargetRegisterInfo
11 // class.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_POWERPC_PPCREGISTERINFO_H
16 #define LLVM_LIB_TARGET_POWERPC_PPCREGISTERINFO_H
17 
18 #include "PPC.h"
19 #include "llvm/ADT/DenseMap.h"
20 
21 #define GET_REGINFO_HEADER
22 #include "PPCGenRegisterInfo.inc"
23 
24 namespace llvm {
25 class PPCSubtarget;
26 class TargetInstrInfo;
27 class Type;
28 
29 class PPCRegisterInfo : public PPCGenRegisterInfo {
30   DenseMap<unsigned, unsigned> ImmToIdxMap;
31   const PPCSubtarget &Subtarget;
32 public:
33   PPCRegisterInfo(const PPCSubtarget &SubTarget);
34 
35   /// getPointerRegClass - Return the register class to use to hold pointers.
36   /// This is used for addressing modes.
37   const TargetRegisterClass *
38   getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override;
39 
40   unsigned getRegPressureLimit(const TargetRegisterClass *RC,
41                                MachineFunction &MF) const override;
42 
43   const TargetRegisterClass*
44   getLargestLegalSuperClass(const TargetRegisterClass *RC) const override;
45 
46   /// Code Generation virtual methods...
47   const MCPhysReg *
48   getCalleeSavedRegs(const MachineFunction* MF =nullptr) const override;
49   const uint32_t *getCallPreservedMask(CallingConv::ID CC) const override;
50   const uint32_t *getNoPreservedMask() const;
51 
52   void adjustStackMapLiveOutMask(uint32_t *Mask) const override;
53 
54   BitVector getReservedRegs(const MachineFunction &MF) const override;
55 
56   /// We require the register scavenger.
57   bool requiresRegisterScavenging(const MachineFunction &MF) const override {
58     return true;
59   }
60 
61   bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
62     return true;
63   }
64 
65   bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
66     return true;
67   }
68 
69   bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override {
70     return true;
71   }
72 
73   void lowerDynamicAlloc(MachineBasicBlock::iterator II) const;
74   void lowerCRSpilling(MachineBasicBlock::iterator II,
75                        unsigned FrameIndex) const;
76   void lowerCRRestore(MachineBasicBlock::iterator II,
77                       unsigned FrameIndex) const;
78   void lowerCRBitSpilling(MachineBasicBlock::iterator II,
79                           unsigned FrameIndex) const;
80   void lowerCRBitRestore(MachineBasicBlock::iterator II,
81                          unsigned FrameIndex) const;
82   void lowerVRSAVESpilling(MachineBasicBlock::iterator II,
83                            unsigned FrameIndex) const;
84   void lowerVRSAVERestore(MachineBasicBlock::iterator II,
85                           unsigned FrameIndex) const;
86 
87   bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
88 			    int &FrameIdx) const override;
89   void eliminateFrameIndex(MachineBasicBlock::iterator II,
90                            int SPAdj, unsigned FIOperandNum,
91                            RegScavenger *RS = nullptr) const override;
92 
93   // Support for virtual base registers.
94   bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
95   void materializeFrameBaseRegister(MachineBasicBlock *MBB,
96                                     unsigned BaseReg, int FrameIdx,
97                                     int64_t Offset) const override;
98   void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
99                          int64_t Offset) const override;
100   bool isFrameOffsetLegal(const MachineInstr *MI,
101                           int64_t Offset) const override;
102 
103   // Debug information queries.
104   unsigned getFrameRegister(const MachineFunction &MF) const override;
105 
106   // Base pointer (stack realignment) support.
107   unsigned getBaseRegister(const MachineFunction &MF) const;
108   bool hasBasePointer(const MachineFunction &MF) const;
109   bool canRealignStack(const MachineFunction &MF) const;
110   bool needsStackRealignment(const MachineFunction &MF) const override;
111 };
112 
113 } // end namespace llvm
114 
115 #endif
116