1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target streamer methods.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCELF.h"
21 #include "llvm/MC/MCSectionELF.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/ELF.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/FormattedStream.h"
28 
29 using namespace llvm;
30 
31 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
32     : MCTargetStreamer(S), canHaveModuleDirective(true) {}
33 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
34 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
35 void MipsTargetStreamer::emitDirectiveSetMips16() {}
36 void MipsTargetStreamer::emitDirectiveSetNoMips16() {}
37 void MipsTargetStreamer::emitDirectiveSetReorder() {}
38 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
39 void MipsTargetStreamer::emitDirectiveSetMacro() {}
40 void MipsTargetStreamer::emitDirectiveSetNoMacro() {}
41 void MipsTargetStreamer::emitDirectiveSetAt() {}
42 void MipsTargetStreamer::emitDirectiveSetNoAt() {}
43 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
44 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
45 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
46 void MipsTargetStreamer::emitDirectiveNaN2008() {}
47 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
48 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
49 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
50 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
51                                    unsigned ReturnReg) {}
52 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
53 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
54 }
55 void MipsTargetStreamer::emitDirectiveSetMips32R2() {}
56 void MipsTargetStreamer::emitDirectiveSetMips64() {}
57 void MipsTargetStreamer::emitDirectiveSetMips64R2() {}
58 void MipsTargetStreamer::emitDirectiveSetDsp() {}
59 void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
60 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
61                                               const MCSymbol &Sym, bool IsReg) {
62 }
63 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
64                                                      bool IsO32ABI) {
65   if (!Enabled && !IsO32ABI)
66     report_fatal_error("+nooddspreg is only valid for O32");
67 }
68 
69 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
70                                              formatted_raw_ostream &OS)
71     : MipsTargetStreamer(S), OS(OS) {}
72 
73 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
74   OS << "\t.set\tmicromips\n";
75   setCanHaveModuleDir(false);
76 }
77 
78 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
79   OS << "\t.set\tnomicromips\n";
80   setCanHaveModuleDir(false);
81 }
82 
83 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
84   OS << "\t.set\tmips16\n";
85   setCanHaveModuleDir(false);
86 }
87 
88 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
89   OS << "\t.set\tnomips16\n";
90   setCanHaveModuleDir(false);
91 }
92 
93 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
94   OS << "\t.set\treorder\n";
95   setCanHaveModuleDir(false);
96 }
97 
98 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
99   OS << "\t.set\tnoreorder\n";
100   setCanHaveModuleDir(false);
101 }
102 
103 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
104   OS << "\t.set\tmacro\n";
105   setCanHaveModuleDir(false);
106 }
107 
108 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
109   OS << "\t.set\tnomacro\n";
110   setCanHaveModuleDir(false);
111 }
112 
113 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
114   OS << "\t.set\tat\n";
115   setCanHaveModuleDir(false);
116 }
117 
118 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
119   OS << "\t.set\tnoat\n";
120   setCanHaveModuleDir(false);
121 }
122 
123 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
124   OS << "\t.end\t" << Name << '\n';
125 }
126 
127 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
128   OS << "\t.ent\t" << Symbol.getName() << '\n';
129 }
130 
131 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
132 
133 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
134 
135 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
136   OS << "\t.nan\tlegacy\n";
137 }
138 
139 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
140   OS << "\t.option\tpic0\n";
141 }
142 
143 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
144   OS << "\t.option\tpic2\n";
145 }
146 
147 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
148                                       unsigned ReturnReg) {
149   OS << "\t.frame\t$"
150      << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
151      << StackSize << ",$"
152      << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
153 }
154 
155 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
156   OS << "\t.set\tmips32r2\n";
157   setCanHaveModuleDir(false);
158 }
159 
160 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
161   OS << "\t.set\tmips64\n";
162   setCanHaveModuleDir(false);
163 }
164 
165 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
166   OS << "\t.set\tmips64r2\n";
167   setCanHaveModuleDir(false);
168 }
169 
170 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
171   OS << "\t.set\tdsp\n";
172   setCanHaveModuleDir(false);
173 }
174 // Print a 32 bit hex number with all numbers.
175 static void printHex32(unsigned Value, raw_ostream &OS) {
176   OS << "0x";
177   for (int i = 7; i >= 0; i--)
178     OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
179 }
180 
181 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
182                                      int CPUTopSavedRegOff) {
183   OS << "\t.mask \t";
184   printHex32(CPUBitmask, OS);
185   OS << ',' << CPUTopSavedRegOff << '\n';
186 }
187 
188 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
189                                       int FPUTopSavedRegOff) {
190   OS << "\t.fmask\t";
191   printHex32(FPUBitmask, OS);
192   OS << "," << FPUTopSavedRegOff << '\n';
193 }
194 
195 void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
196   OS << "\t.cpload\t$"
197      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
198   setCanHaveModuleDir(false);
199 }
200 
201 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
202                                                  int RegOrOffset,
203                                                  const MCSymbol &Sym,
204                                                  bool IsReg) {
205   OS << "\t.cpsetup\t$"
206      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
207 
208   if (IsReg)
209     OS << "$"
210        << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
211   else
212     OS << RegOrOffset;
213 
214   OS << ", ";
215 
216   OS << Sym.getName() << "\n";
217   setCanHaveModuleDir(false);
218 }
219 
220 void MipsTargetAsmStreamer::emitDirectiveModuleFP(
221     MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
222   MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
223 
224   StringRef ModuleValue;
225   OS << "\t.module\tfp=";
226   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
227 }
228 
229 void MipsTargetAsmStreamer::emitDirectiveSetFp(
230     MipsABIFlagsSection::FpABIKind Value) {
231   StringRef ModuleValue;
232   OS << "\t.set\tfp=";
233   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
234 }
235 
236 void MipsTargetAsmStreamer::emitMipsAbiFlags() {
237   // No action required for text output.
238 }
239 
240 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
241                                                         bool IsO32ABI) {
242   MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
243 
244   OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
245 }
246 
247 // This part is for ELF object output.
248 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
249                                              const MCSubtargetInfo &STI)
250     : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
251   MCAssembler &MCA = getStreamer().getAssembler();
252   uint64_t Features = STI.getFeatureBits();
253   Triple T(STI.getTargetTriple());
254   Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
255             ? true
256             : false;
257 
258   // Update e_header flags
259   unsigned EFlags = 0;
260 
261   // Architecture
262   if (Features & Mips::FeatureMips64r6)
263     EFlags |= ELF::EF_MIPS_ARCH_64R6;
264   else if (Features & Mips::FeatureMips64r2)
265     EFlags |= ELF::EF_MIPS_ARCH_64R2;
266   else if (Features & Mips::FeatureMips64)
267     EFlags |= ELF::EF_MIPS_ARCH_64;
268   else if (Features & Mips::FeatureMips5)
269     EFlags |= ELF::EF_MIPS_ARCH_5;
270   else if (Features & Mips::FeatureMips4)
271     EFlags |= ELF::EF_MIPS_ARCH_4;
272   else if (Features & Mips::FeatureMips3)
273     EFlags |= ELF::EF_MIPS_ARCH_3;
274   else if (Features & Mips::FeatureMips32r6)
275     EFlags |= ELF::EF_MIPS_ARCH_32R6;
276   else if (Features & Mips::FeatureMips32r2)
277     EFlags |= ELF::EF_MIPS_ARCH_32R2;
278   else if (Features & Mips::FeatureMips32)
279     EFlags |= ELF::EF_MIPS_ARCH_32;
280   else if (Features & Mips::FeatureMips2)
281     EFlags |= ELF::EF_MIPS_ARCH_2;
282   else
283     EFlags |= ELF::EF_MIPS_ARCH_1;
284 
285   // ABI
286   // N64 does not require any ABI bits.
287   if (Features & Mips::FeatureO32)
288     EFlags |= ELF::EF_MIPS_ABI_O32;
289   else if (Features & Mips::FeatureN32)
290     EFlags |= ELF::EF_MIPS_ABI2;
291 
292   if (Features & Mips::FeatureGP64Bit) {
293     if (Features & Mips::FeatureO32)
294       EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
295   } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
296     EFlags |= ELF::EF_MIPS_32BITMODE;
297 
298   // Other options.
299   if (Features & Mips::FeatureNaN2008)
300     EFlags |= ELF::EF_MIPS_NAN2008;
301 
302   // -mabicalls and -mplt are not implemented but we should act as if they were
303   // given.
304   EFlags |= ELF::EF_MIPS_CPIC;
305   if (Features & Mips::FeatureN64)
306     EFlags |= ELF::EF_MIPS_PIC;
307 
308   MCA.setELFHeaderEFlags(EFlags);
309 }
310 
311 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
312   if (!isMicroMipsEnabled())
313     return;
314   MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
315   uint8_t Type = MCELF::GetType(Data);
316   if (Type != ELF::STT_FUNC)
317     return;
318 
319   // The "other" values are stored in the last 6 bits of the second byte
320   // The traditional defines for STO values assume the full byte and thus
321   // the shift to pack it.
322   MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
323 }
324 
325 void MipsTargetELFStreamer::finish() {
326   MCAssembler &MCA = getStreamer().getAssembler();
327   const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
328 
329   // .bss, .text and .data are always at least 16-byte aligned.
330   MCSectionData &TextSectionData =
331       MCA.getOrCreateSectionData(*OFI.getTextSection());
332   MCSectionData &DataSectionData =
333       MCA.getOrCreateSectionData(*OFI.getDataSection());
334   MCSectionData &BSSSectionData =
335       MCA.getOrCreateSectionData(*OFI.getBSSSection());
336 
337   TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment()));
338   DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
339   BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
340 
341   // Emit all the option records.
342   // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
343   // .reginfo.
344   MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
345   MEF.EmitMipsOptionRecords();
346 
347   emitMipsAbiFlags();
348 }
349 
350 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
351                                            const MCExpr *Value) {
352   // If on rhs is micromips symbol then mark Symbol as microMips.
353   if (Value->getKind() != MCExpr::SymbolRef)
354     return;
355   const MCSymbol &RhsSym =
356       static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
357   MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
358   uint8_t Type = MCELF::GetType(Data);
359   if ((Type != ELF::STT_FUNC) ||
360       !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
361     return;
362 
363   MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
364   // The "other" values are stored in the last 6 bits of the second byte.
365   // The traditional defines for STO values assume the full byte and thus
366   // the shift to pack it.
367   MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
368 }
369 
370 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
371   return static_cast<MCELFStreamer &>(Streamer);
372 }
373 
374 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
375   MicroMipsEnabled = true;
376 
377   MCAssembler &MCA = getStreamer().getAssembler();
378   unsigned Flags = MCA.getELFHeaderEFlags();
379   Flags |= ELF::EF_MIPS_MICROMIPS;
380   MCA.setELFHeaderEFlags(Flags);
381 }
382 
383 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
384   MicroMipsEnabled = false;
385   setCanHaveModuleDir(false);
386 }
387 
388 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
389   MCAssembler &MCA = getStreamer().getAssembler();
390   unsigned Flags = MCA.getELFHeaderEFlags();
391   Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
392   MCA.setELFHeaderEFlags(Flags);
393   setCanHaveModuleDir(false);
394 }
395 
396 void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
397   // FIXME: implement.
398   setCanHaveModuleDir(false);
399 }
400 
401 void MipsTargetELFStreamer::emitDirectiveSetReorder() {
402   // FIXME: implement.
403   setCanHaveModuleDir(false);
404 }
405 
406 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
407   MCAssembler &MCA = getStreamer().getAssembler();
408   unsigned Flags = MCA.getELFHeaderEFlags();
409   Flags |= ELF::EF_MIPS_NOREORDER;
410   MCA.setELFHeaderEFlags(Flags);
411   setCanHaveModuleDir(false);
412 }
413 
414 void MipsTargetELFStreamer::emitDirectiveSetMacro() {
415   // FIXME: implement.
416   setCanHaveModuleDir(false);
417 }
418 
419 void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
420   // FIXME: implement.
421   setCanHaveModuleDir(false);
422 }
423 
424 void MipsTargetELFStreamer::emitDirectiveSetAt() {
425   // FIXME: implement.
426   setCanHaveModuleDir(false);
427 }
428 
429 void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
430   // FIXME: implement.
431   setCanHaveModuleDir(false);
432 }
433 
434 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
435   // FIXME: implement.
436 }
437 
438 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
439   // FIXME: implement.
440 }
441 
442 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
443   MCAssembler &MCA = getStreamer().getAssembler();
444   unsigned Flags = MCA.getELFHeaderEFlags();
445   Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
446   MCA.setELFHeaderEFlags(Flags);
447 }
448 
449 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
450   MCAssembler &MCA = getStreamer().getAssembler();
451   unsigned Flags = MCA.getELFHeaderEFlags();
452   Flags |= ELF::EF_MIPS_NAN2008;
453   MCA.setELFHeaderEFlags(Flags);
454 }
455 
456 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
457   MCAssembler &MCA = getStreamer().getAssembler();
458   unsigned Flags = MCA.getELFHeaderEFlags();
459   Flags &= ~ELF::EF_MIPS_NAN2008;
460   MCA.setELFHeaderEFlags(Flags);
461 }
462 
463 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
464   MCAssembler &MCA = getStreamer().getAssembler();
465   unsigned Flags = MCA.getELFHeaderEFlags();
466   // This option overrides other PIC options like -KPIC.
467   Pic = false;
468   Flags &= ~ELF::EF_MIPS_PIC;
469   MCA.setELFHeaderEFlags(Flags);
470 }
471 
472 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
473   MCAssembler &MCA = getStreamer().getAssembler();
474   unsigned Flags = MCA.getELFHeaderEFlags();
475   Pic = true;
476   // NOTE: We are following the GAS behaviour here which means the directive
477   // 'pic2' also sets the CPIC bit in the ELF header. This is different from
478   // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
479   // EF_MIPS_CPIC to be mutually exclusive.
480   Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
481   MCA.setELFHeaderEFlags(Flags);
482 }
483 
484 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
485                                       unsigned ReturnReg) {
486   // FIXME: implement.
487 }
488 
489 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
490                                      int CPUTopSavedRegOff) {
491   // FIXME: implement.
492 }
493 
494 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
495                                       int FPUTopSavedRegOff) {
496   // FIXME: implement.
497 }
498 
499 void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
500   setCanHaveModuleDir(false);
501 }
502 
503 void MipsTargetELFStreamer::emitDirectiveSetMips64() {
504   setCanHaveModuleDir(false);
505 }
506 
507 void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
508   setCanHaveModuleDir(false);
509 }
510 
511 void MipsTargetELFStreamer::emitDirectiveSetDsp() {
512   setCanHaveModuleDir(false);
513 }
514 
515 void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
516   // .cpload $reg
517   // This directive expands to:
518   // lui   $gp, %hi(_gp_disp)
519   // addui $gp, $gp, %lo(_gp_disp)
520   // addu  $gp, $gp, $reg
521   // when support for position independent code is enabled.
522   if (!Pic || (isN32() || isN64()))
523     return;
524 
525   // There's a GNU extension controlled by -mno-shared that allows
526   // locally-binding symbols to be accessed using absolute addresses.
527   // This is currently not supported. When supported -mno-shared makes
528   // .cpload expand to:
529   //   lui     $gp, %hi(__gnu_local_gp)
530   //   addiu   $gp, $gp, %lo(__gnu_local_gp)
531 
532   StringRef SymName("_gp_disp");
533   MCAssembler &MCA = getStreamer().getAssembler();
534   MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
535   MCA.getOrCreateSymbolData(*GP_Disp);
536 
537   MCInst TmpInst;
538   TmpInst.setOpcode(Mips::LUi);
539   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
540   const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
541       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
542   TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
543   getStreamer().EmitInstruction(TmpInst, STI);
544 
545   TmpInst.clear();
546 
547   TmpInst.setOpcode(Mips::ADDiu);
548   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
549   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
550   const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
551       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
552   TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
553   getStreamer().EmitInstruction(TmpInst, STI);
554 
555   TmpInst.clear();
556 
557   TmpInst.setOpcode(Mips::ADDu);
558   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
559   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
560   TmpInst.addOperand(MCOperand::CreateReg(RegNo));
561   getStreamer().EmitInstruction(TmpInst, STI);
562 
563   setCanHaveModuleDir(false);
564 }
565 
566 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
567                                                  int RegOrOffset,
568                                                  const MCSymbol &Sym,
569                                                  bool IsReg) {
570   // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
571   if (!Pic || !(isN32() || isN64()))
572     return;
573 
574   MCAssembler &MCA = getStreamer().getAssembler();
575   MCInst Inst;
576 
577   // Either store the old $gp in a register or on the stack
578   if (IsReg) {
579     // move $save, $gpreg
580     Inst.setOpcode(Mips::DADDu);
581     Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
582     Inst.addOperand(MCOperand::CreateReg(Mips::GP));
583     Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
584   } else {
585     // sd $gpreg, offset($sp)
586     Inst.setOpcode(Mips::SD);
587     Inst.addOperand(MCOperand::CreateReg(Mips::GP));
588     Inst.addOperand(MCOperand::CreateReg(Mips::SP));
589     Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
590   }
591   getStreamer().EmitInstruction(Inst, STI);
592   Inst.clear();
593 
594   const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
595       Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
596   const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
597       Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
598   // lui $gp, %hi(%neg(%gp_rel(funcSym)))
599   Inst.setOpcode(Mips::LUi);
600   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
601   Inst.addOperand(MCOperand::CreateExpr(HiExpr));
602   getStreamer().EmitInstruction(Inst, STI);
603   Inst.clear();
604 
605   // addiu  $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
606   Inst.setOpcode(Mips::ADDiu);
607   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
608   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
609   Inst.addOperand(MCOperand::CreateExpr(LoExpr));
610   getStreamer().EmitInstruction(Inst, STI);
611   Inst.clear();
612 
613   // daddu  $gp, $gp, $funcreg
614   Inst.setOpcode(Mips::DADDu);
615   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
616   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
617   Inst.addOperand(MCOperand::CreateReg(RegNo));
618   getStreamer().EmitInstruction(Inst, STI);
619 
620   setCanHaveModuleDir(false);
621 }
622 
623 void MipsTargetELFStreamer::emitMipsAbiFlags() {
624   MCAssembler &MCA = getStreamer().getAssembler();
625   MCContext &Context = MCA.getContext();
626   MCStreamer &OS = getStreamer();
627   const MCSectionELF *Sec =
628       Context.getELFSection(".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS,
629                             ELF::SHF_ALLOC, SectionKind::getMetadata(), 24, "");
630   MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
631   ABIShndxSD.setAlignment(8);
632   OS.SwitchSection(Sec);
633 
634   OS << ABIFlagsSection;
635 }
636 
637 void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
638                                                         bool IsO32ABI) {
639   MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
640 
641   ABIFlagsSection.OddSPReg = Enabled;
642 }
643