1//===-- MSP430InstrFormats.td - MSP430 Instruction Formats -*- tablegen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11//  Describe MSP430 instructions format here
12//
13
14class SourceMode<bits<2> val> {
15  bits<2> Value = val;
16}
17
18def SrcReg      : SourceMode<0>; // r
19def SrcMem      : SourceMode<1>; // m
20def SrcIndReg   : SourceMode<2>; // n
21def SrcPostInc  : SourceMode<3>; // p
22def SrcImm      : SourceMode<3>; // i
23//  SrcCGImm    : SourceMode< >; // c
24
25class DestMode<bit val> {
26  bit Value = val;
27}
28
29def DstReg      : DestMode<0>;   // r
30def DstMem      : DestMode<1>;   // m
31
32// Generic MSP430 Format
33class MSP430Inst<dag outs, dag ins, int size, string asmstr> : Instruction {
34  field bits<48> Inst;
35  field bits<48> SoftFail = 0;
36
37  let Namespace = "MSP430";
38
39  dag OutOperandList = outs;
40  dag InOperandList  = ins;
41
42  let AsmString = asmstr;
43  let Size = size;
44}
45
46// MSP430 Double Operand (Format I) Instructions
47class IForm<bits<4> opcode, DestMode ad, bit bw, SourceMode as, int size,
48            dag outs, dag ins, string asmstr, list<dag> pattern>
49  : MSP430Inst<outs, ins, size, asmstr> {
50  let Pattern = pattern;
51
52  bits<4> rs;
53  bits<4> rd;
54
55  let Inst{15-12} = opcode;
56  let Inst{11-8}  = rs;
57  let Inst{7}     = ad.Value;
58  let Inst{6}     = bw;
59  let Inst{5-4}   = as.Value;
60  let Inst{3-0}   = rd;
61}
62
63// 8 bit IForm instructions
64class IForm8<bits<4> opcode, DestMode dest, SourceMode src, int size,
65             dag outs, dag ins, string asmstr, list<dag> pattern>
66  : IForm<opcode, dest, 1, src, size, outs, ins, asmstr, pattern>;
67
68class I8rr<bits<4> opcode,
69           dag outs, dag ins, string asmstr, list<dag> pattern>
70  : IForm8<opcode, DstReg, SrcReg, 2, outs, ins, asmstr, pattern> {
71  let DecoderNamespace = "Alpha";
72}
73
74class I8ri<bits<4> opcode,
75           dag outs, dag ins, string asmstr, list<dag> pattern>
76  : IForm8<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> {
77  let DecoderNamespace = "Gamma";
78  bits<16> imm;
79  let Inst{31-16} = imm;
80  let rs = 0b0000;
81}
82
83class I8rc<bits<4> opcode,
84           dag outs, dag ins, string asmstr, list<dag> pattern>
85  : MSP430Inst<outs, ins, 2, asmstr> {
86  let DecoderNamespace = "Beta";
87  let Pattern = pattern;
88
89  bits<6> imm;
90  bits<4> rd;
91
92  let Inst{15-12} = opcode;
93  let Inst{11-8}  = imm{3-0};
94  let Inst{7}     = DstReg.Value;
95  let Inst{6}     = 1;
96  let Inst{5-4}   = imm{5-4};
97  let Inst{3-0}   = rd;
98}
99
100class I8rm<bits<4> opcode,
101           dag outs, dag ins, string asmstr, list<dag> pattern>
102  : IForm8<opcode, DstReg, SrcMem, 4, outs, ins, asmstr, pattern> {
103  let DecoderNamespace = "Gamma";
104  bits<20> src;
105  let rs = src{3-0};
106  let Inst{31-16} = src{19-4};
107}
108
109class I8rn<bits<4> opcode,
110           dag outs, dag ins, string asmstr, list<dag> pattern>
111  : IForm8<opcode, DstReg, SrcIndReg, 2, outs, ins, asmstr, pattern> {
112  let DecoderNamespace = "Delta";
113}
114
115class I8rp<bits<4> opcode,
116           dag outs, dag ins, string asmstr, list<dag> pattern>
117  : IForm8<opcode, DstReg, SrcPostInc, 2, outs, ins, asmstr, pattern> {
118  let DecoderNamespace = "Delta";
119}
120
121class I8mr<bits<4> opcode,
122           dag outs, dag ins, string asmstr, list<dag> pattern>
123  : IForm8<opcode, DstMem, SrcReg, 4, outs, ins, asmstr, pattern> {
124  let DecoderNamespace = "Alpha";
125  bits<20> dst;
126  let rd = dst{3-0};
127  let Inst{31-16} = dst{19-4};
128}
129
130class I8mi<bits<4> opcode,
131           dag outs, dag ins, string asmstr, list<dag> pattern>
132  : IForm8<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> {
133  let DecoderNamespace = "Gamma";
134  bits<16> imm;
135  bits<20> dst;
136  let rs = 0b0000;
137  let Inst{31-16} = imm;
138  let rd = dst{3-0};
139  let Inst{47-32} = dst{19-4};
140}
141
142class I8mc<bits<4> opcode,
143           dag outs, dag ins, string asmstr, list<dag> pattern>
144  : MSP430Inst<outs, ins, 4, asmstr> {
145  let DecoderNamespace = "Beta";
146  let Pattern = pattern;
147
148  bits<6> imm;
149  bits<20> dst;
150
151  let Inst{31-16} = dst{19-4};
152  let Inst{15-12} = opcode;
153  let Inst{11-8}  = imm{3-0};
154  let Inst{7}     = DstMem.Value;
155  let Inst{6}     = 1;
156  let Inst{5-4}   = imm{5-4};
157  let Inst{3-0}   = dst{3-0};
158}
159
160class I8mm<bits<4> opcode,
161           dag outs, dag ins, string asmstr, list<dag> pattern>
162  : IForm8<opcode, DstMem, SrcMem, 6, outs, ins, asmstr, pattern> {
163  let DecoderNamespace = "Gamma";
164  bits<20> src;
165  bits<20> dst;
166  let rs = src{3-0};
167  let Inst{31-16} = src{19-4};
168  let rd = dst{3-0};
169  let Inst{47-32} = dst{19-4};
170}
171
172class I8mn<bits<4> opcode,
173           dag outs, dag ins, string asmstr, list<dag> pattern>
174  : IForm8<opcode, DstMem, SrcIndReg, 4, outs, ins, asmstr, pattern> {
175  let DecoderNamespace = "Delta";
176  bits<20> dst;
177  let rd = dst{3-0};
178  let Inst{31-16} = dst{19-4};
179}
180
181class I8mp<bits<4> opcode,
182           dag outs, dag ins, string asmstr, list<dag> pattern>
183  : IForm8<opcode, DstMem, SrcPostInc, 4, outs, ins, asmstr, pattern> {
184  let DecoderNamespace = "Delta";
185  bits<20> dst;
186  let rd = dst{3-0};
187  let Inst{31-16} = dst{19-4};
188}
189
190// 16 bit IForm instructions
191class IForm16<bits<4> opcode, DestMode dest, SourceMode src, int size,
192              dag outs, dag ins, string asmstr, list<dag> pattern>
193  : IForm<opcode, dest, 0, src, size, outs, ins, asmstr, pattern>;
194
195class I16rr<bits<4> opcode,
196            dag outs, dag ins, string asmstr, list<dag> pattern>
197  : IForm16<opcode, DstReg, SrcReg, 2, outs, ins, asmstr, pattern> {
198  let DecoderNamespace = "Alpha";
199}
200
201class I16ri<bits<4> opcode,
202            dag outs, dag ins, string asmstr, list<dag> pattern>
203  : IForm16<opcode, DstReg, SrcImm, 4, outs, ins, asmstr, pattern> {
204  let DecoderNamespace = "Gamma";
205  bits<16> imm;
206  let Inst{31-16} = imm;
207  let rs = 0b0000;
208}
209
210class I16rc<bits<4> opcode,
211            dag outs, dag ins, string asmstr, list<dag> pattern>
212  : MSP430Inst<outs, ins, 2, asmstr> {
213  let DecoderNamespace = "Beta";
214  let Pattern = pattern;
215
216  bits<6> imm;
217  bits<4> rd;
218
219  let Inst{15-12} = opcode;
220  let Inst{11-8}  = imm{3-0};
221  let Inst{7}     = DstReg.Value;
222  let Inst{6}     = 0;
223  let Inst{5-4}   = imm{5-4};
224  let Inst{3-0}   = rd;
225}
226
227class I16rm<bits<4> opcode,
228            dag outs, dag ins, string asmstr, list<dag> pattern>
229  : IForm16<opcode, DstReg, SrcMem, 4, outs, ins, asmstr, pattern> {
230  let DecoderNamespace = "Gamma";
231  bits<20> src;
232  let rs = src{3-0};
233  let Inst{31-16} = src{19-4};
234}
235
236class I16rn<bits<4> opcode,
237            dag outs, dag ins, string asmstr, list<dag> pattern>
238  : IForm16<opcode, DstReg, SrcIndReg, 2, outs, ins, asmstr, pattern> {
239  let DecoderNamespace = "Delta";
240}
241
242class I16rp<bits<4> opcode,
243            dag outs, dag ins, string asmstr, list<dag> pattern>
244  : IForm16<opcode, DstReg, SrcPostInc, 2, outs, ins, asmstr, pattern> {
245  let DecoderNamespace = "Delta";
246}
247
248class I16mr<bits<4> opcode,
249            dag outs, dag ins, string asmstr, list<dag> pattern>
250  : IForm16<opcode, DstMem, SrcReg, 4, outs, ins, asmstr, pattern> {
251  let DecoderNamespace = "Alpha";
252  bits<20> dst;
253  let rd = dst{3-0};
254  let Inst{31-16} = dst{19-4};
255}
256
257class I16mi<bits<4> opcode,
258            dag outs, dag ins, string asmstr, list<dag> pattern>
259  : IForm16<opcode, DstMem, SrcImm, 6, outs, ins, asmstr, pattern> {
260  let DecoderNamespace = "Gamma";
261  bits<16> imm;
262  bits<20> dst;
263  let Inst{31-16} = imm;
264  let rs = 0b0000;
265  let rd = dst{3-0};
266  let Inst{47-32} = dst{19-4};
267}
268
269class I16mc<bits<4> opcode,
270            dag outs, dag ins, string asmstr, list<dag> pattern>
271  : MSP430Inst<outs, ins, 4, asmstr> {
272  let DecoderNamespace = "Beta";
273  let Pattern = pattern;
274
275  bits<6> imm;
276  bits<20> dst;
277
278  let Inst{31-16} = dst{19-4};
279  let Inst{15-12} = opcode;
280  let Inst{11-8}  = imm{3-0};
281  let Inst{7}     = DstMem.Value;
282  let Inst{6}     = 0;
283  let Inst{5-4}   = imm{5-4};
284  let Inst{3-0}   = dst{3-0};
285}
286
287class I16mm<bits<4> opcode,
288            dag outs, dag ins, string asmstr, list<dag> pattern>
289  : IForm16<opcode, DstMem, SrcMem, 6, outs, ins, asmstr, pattern> {
290  let DecoderNamespace = "Gamma";
291  bits<20> src;
292  bits<20> dst;
293  let rs = src{3-0};
294  let Inst{31-16} = src{19-4};
295  let rd = dst{3-0};
296  let Inst{47-32} = dst{19-4};
297}
298
299class I16mn<bits<4> opcode,
300            dag outs, dag ins, string asmstr, list<dag> pattern>
301  : IForm16<opcode, DstMem, SrcIndReg, 4, outs, ins, asmstr, pattern> {
302  let DecoderNamespace = "Delta";
303  bits<20> dst;
304  let rd = dst{3-0};
305  let Inst{31-16} = dst{19-4};
306}
307
308class I16mp<bits<4> opcode,
309            dag outs, dag ins, string asmstr, list<dag> pattern>
310  : IForm16<opcode, DstMem, SrcPostInc, 4, outs, ins, asmstr, pattern> {
311  let DecoderNamespace = "Delta";
312  bits<20> dst;
313  let rd = dst{3-0};
314  let Inst{31-16} = dst{19-4};
315}
316
317// MSP430 Single Operand (Format II) Instructions
318class IIForm<bits<3> opcode, bit bw, SourceMode as, int size,
319             dag outs, dag ins, string asmstr, list<dag> pattern>
320  : MSP430Inst<outs, ins, size, asmstr> {
321  let Pattern = pattern;
322
323  bits<4> rs;
324
325  let Inst{15-10} = 0b000100;
326  let Inst{9-7}   = opcode;
327  let Inst{6}     = bw;
328  let Inst{5-4}   = as.Value;
329  let Inst{3-0}   = rs;
330}
331
332// 8 bit IIForm instructions
333class IIForm8<bits<3> opcode, SourceMode src, int size,
334              dag outs, dag ins, string asmstr, list<dag> pattern>
335  : IIForm<opcode, 1, src, size, outs, ins, asmstr, pattern>;
336
337class II8r<bits<3> opcode,
338           dag outs, dag ins, string asmstr, list<dag> pattern>
339  : IIForm8<opcode, SrcReg, 2, outs, ins, asmstr, pattern>;
340
341class II8m<bits<3> opcode,
342           dag outs, dag ins, string asmstr, list<dag> pattern>
343  : IIForm8<opcode, SrcMem, 4, outs, ins, asmstr, pattern> {
344  bits<20> src;
345  let rs = src{3-0};
346  let Inst{31-16} = src{19-4};
347}
348
349class II8i<bits<3> opcode,
350           dag outs, dag ins, string asmstr, list<dag> pattern>
351  : IIForm8<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
352  bits<16> imm;
353  let rs = 0b0000;
354  let Inst{31-16} = imm;
355}
356
357class II8c<bits<3> opcode,
358           dag outs, dag ins, string asmstr, list<dag> pattern>
359  : MSP430Inst<outs, ins, 2, asmstr> {
360  let Pattern = pattern;
361
362  bits<6> imm;
363
364  let Inst{15-10} = 0b000100;
365  let Inst{9-7}   = opcode;
366  let Inst{6}     = 1;
367  let Inst{5-0}   = imm;
368}
369
370class II8n<bits<3> opcode,
371           dag outs, dag ins, string asmstr, list<dag> pattern>
372  : IIForm8<opcode, SrcIndReg, 2, outs, ins, asmstr, pattern>;
373
374class II8p<bits<3> opcode,
375           dag outs, dag ins, string asmstr, list<dag> pattern>
376  : IIForm8<opcode, SrcPostInc, 2, outs, ins, asmstr, pattern>;
377
378// 16 bit IIForm instructions
379class IIForm16<bits<3> opcode, SourceMode src, int size,
380               dag outs, dag ins, string asmstr, list<dag> pattern>
381  : IIForm<opcode, 0, src, size, outs, ins, asmstr, pattern>;
382
383class II16r<bits<3> opcode,
384            dag outs, dag ins, string asmstr, list<dag> pattern>
385  : IIForm16<opcode, SrcReg, 2, outs, ins, asmstr, pattern>;
386
387class II16m<bits<3> opcode,
388            dag outs, dag ins, string asmstr, list<dag> pattern>
389  : IIForm16<opcode, SrcMem, 4, outs, ins, asmstr, pattern> {
390  bits<20> src;
391  let rs = src{3-0};
392  let Inst{31-16} = src{19-4};
393}
394
395class II16i<bits<3> opcode,
396            dag outs, dag ins, string asmstr, list<dag> pattern>
397  : IIForm16<opcode, SrcImm, 4, outs, ins, asmstr, pattern> {
398  bits<16> imm;
399  let rs = 0b0000;
400  let Inst{31-16} = imm;
401}
402
403class II16c<bits<3> opcode,
404            dag outs, dag ins, string asmstr, list<dag> pattern>
405  : MSP430Inst<outs, ins, 2, asmstr> {
406  let Pattern = pattern;
407
408  bits<6> imm;
409
410  let Inst{15-10} = 0b000100;
411  let Inst{9-7}   = opcode;
412  let Inst{6}     = 0;
413  let Inst{5-0}   = imm;
414}
415
416class II16n<bits<3> opcode,
417            dag outs, dag ins, string asmstr, list<dag> pattern>
418  : IIForm16<opcode, SrcIndReg, 2, outs, ins, asmstr, pattern>;
419
420class II16p<bits<3> opcode,
421            dag outs, dag ins, string asmstr, list<dag> pattern>
422  : IIForm16<opcode, SrcPostInc, 2, outs, ins, asmstr, pattern>;
423
424// MSP430 Conditional Jumps Instructions
425class CJForm<dag outs, dag ins, string asmstr, list<dag> pattern>
426  : MSP430Inst<outs, ins, 2, asmstr> {
427  let Pattern = pattern;
428
429  bits<3> cond;
430  bits<10> dst;
431
432  let Inst{15-13} = 0b001;
433  let Inst{12-10} = cond;
434  let Inst{9-0} = dst;
435}
436
437// Pseudo instructions
438class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
439  : MSP430Inst<outs, ins, 0, asmstr> {
440  let Pattern = pattern;
441}
442