1 //===--- ARMComputeBlockSize.cpp - Compute machine block sizes ------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "ARM.h" 11 #include "ARMBaseInstrInfo.h" 12 #include "ARMBasicBlockInfo.h" 13 #include "ARMMachineFunctionInfo.h" 14 #include "llvm/CodeGen/MachineBasicBlock.h" 15 #include "llvm/CodeGen/MachineFunction.h" 16 #include "llvm/CodeGen/MachineInstr.h" 17 #include "llvm/CodeGen/TargetSubtargetInfo.h" 18 #include <vector> 19 20 using namespace llvm; 21 22 namespace llvm { 23 24 // mayOptimizeThumb2Instruction - Returns true if optimizeThumb2Instructions 25 // below may shrink MI. 26 static bool 27 mayOptimizeThumb2Instruction(const MachineInstr *MI) { 28 switch(MI->getOpcode()) { 29 // optimizeThumb2Instructions. 30 case ARM::t2LEApcrel: 31 case ARM::t2LDRpci: 32 // optimizeThumb2Branches. 33 case ARM::t2B: 34 case ARM::t2Bcc: 35 case ARM::tBcc: 36 // optimizeThumb2JumpTables. 37 case ARM::t2BR_JT: 38 return true; 39 } 40 return false; 41 } 42 43 void computeBlockSize(MachineFunction *MF, MachineBasicBlock *MBB, 44 BasicBlockInfo &BBI) { 45 const ARMBaseInstrInfo *TII = 46 static_cast<const ARMBaseInstrInfo *>(MF->getSubtarget().getInstrInfo()); 47 bool isThumb = MF->getInfo<ARMFunctionInfo>()->isThumbFunction(); 48 BBI.Size = 0; 49 BBI.Unalign = 0; 50 BBI.PostAlign = 0; 51 52 for (MachineInstr &I : *MBB) { 53 BBI.Size += TII->getInstSizeInBytes(I); 54 // For inline asm, getInstSizeInBytes returns a conservative estimate. 55 // The actual size may be smaller, but still a multiple of the instr size. 56 if (I.isInlineAsm()) 57 BBI.Unalign = isThumb ? 1 : 2; 58 // Also consider instructions that may be shrunk later. 59 else if (isThumb && mayOptimizeThumb2Instruction(&I)) 60 BBI.Unalign = 1; 61 } 62 63 // tBR_JTr contains a .align 2 directive. 64 if (!MBB->empty() && MBB->back().getOpcode() == ARM::tBR_JTr) { 65 BBI.PostAlign = 2; 66 MBB->getParent()->ensureAlignment(2); 67 } 68 } 69 70 std::vector<BasicBlockInfo> computeAllBlockSizes(MachineFunction *MF) { 71 std::vector<BasicBlockInfo> BBInfo; 72 BBInfo.resize(MF->getNumBlockIDs()); 73 74 for (MachineBasicBlock &MBB : *MF) 75 computeBlockSize(MF, &MBB, BBInfo[MBB.getNumber()]); 76 77 return BBInfo; 78 } 79 80 } // end namespace llvm 81