18f0fd8f6SDimitry Andric //===-- AMDGPUInstrInfo.cpp - Base class for AMD GPU InstrInfo ------------===// 28f0fd8f6SDimitry Andric // 38f0fd8f6SDimitry Andric // The LLVM Compiler Infrastructure 48f0fd8f6SDimitry Andric // 58f0fd8f6SDimitry Andric // This file is distributed under the University of Illinois Open Source 68f0fd8f6SDimitry Andric // License. See LICENSE.TXT for details. 78f0fd8f6SDimitry Andric // 88f0fd8f6SDimitry Andric //===----------------------------------------------------------------------===// 98f0fd8f6SDimitry Andric // 108f0fd8f6SDimitry Andric /// \file 118f0fd8f6SDimitry Andric /// \brief Implementation of the TargetInstrInfo class that is common to all 128f0fd8f6SDimitry Andric /// AMD GPUs. 138f0fd8f6SDimitry Andric // 148f0fd8f6SDimitry Andric //===----------------------------------------------------------------------===// 158f0fd8f6SDimitry Andric 168f0fd8f6SDimitry Andric #include "AMDGPUInstrInfo.h" 178f0fd8f6SDimitry Andric #include "AMDGPURegisterInfo.h" 188f0fd8f6SDimitry Andric #include "AMDGPUTargetMachine.h" 19*4ba319b5SDimitry Andric #include "MCTargetDesc/AMDGPUMCTargetDesc.h" 208f0fd8f6SDimitry Andric #include "llvm/CodeGen/MachineFrameInfo.h" 218f0fd8f6SDimitry Andric #include "llvm/CodeGen/MachineInstrBuilder.h" 228f0fd8f6SDimitry Andric #include "llvm/CodeGen/MachineRegisterInfo.h" 238f0fd8f6SDimitry Andric 248f0fd8f6SDimitry Andric using namespace llvm; 258f0fd8f6SDimitry Andric 268f0fd8f6SDimitry Andric // Pin the vtable to this file. 27*4ba319b5SDimitry Andric //void AMDGPUInstrInfo::anchor() {} 288f0fd8f6SDimitry Andric AMDGPUInstrInfo(const GCNSubtarget & ST)29*4ba319b5SDimitry AndricAMDGPUInstrInfo::AMDGPUInstrInfo(const GCNSubtarget &ST) { } 308f0fd8f6SDimitry Andric 31954b921dSDimitry Andric 32954b921dSDimitry Andric // TODO: Should largely merge with AMDGPUTTIImpl::isSourceOfDivergence. isUniformMMO(const MachineMemOperand * MMO)33954b921dSDimitry Andricbool AMDGPUInstrInfo::isUniformMMO(const MachineMemOperand *MMO) { 34954b921dSDimitry Andric const Value *Ptr = MMO->getValue(); 35954b921dSDimitry Andric // UndefValue means this is a load of a kernel input. These are uniform. 36954b921dSDimitry Andric // Sometimes LDS instructions have constant pointers. 37954b921dSDimitry Andric // If Ptr is null, then that means this mem operand contains a 38954b921dSDimitry Andric // PseudoSourceValue like GOT. 39954b921dSDimitry Andric if (!Ptr || isa<UndefValue>(Ptr) || 40954b921dSDimitry Andric isa<Constant>(Ptr) || isa<GlobalValue>(Ptr)) 41954b921dSDimitry Andric return true; 42954b921dSDimitry Andric 43*4ba319b5SDimitry Andric if (MMO->getAddrSpace() == AMDGPUAS::CONSTANT_ADDRESS_32BIT) 44*4ba319b5SDimitry Andric return true; 45*4ba319b5SDimitry Andric 46954b921dSDimitry Andric if (const Argument *Arg = dyn_cast<Argument>(Ptr)) 47954b921dSDimitry Andric return AMDGPU::isArgPassedInSGPR(Arg); 48954b921dSDimitry Andric 49954b921dSDimitry Andric const Instruction *I = dyn_cast<Instruction>(Ptr); 50954b921dSDimitry Andric return I && I->getMetadata("amdgpu.uniform"); 51954b921dSDimitry Andric } 52