1//===- AMDGPUGenRegisterBankInfo.def -----------------------------*- C++ -*-==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This file defines all the static objects used by AMDGPURegisterBankInfo.
11/// \todo This should be generated by TableGen.
12//===----------------------------------------------------------------------===//
13
14namespace llvm {
15namespace AMDGPU {
16
17enum PartialMappingIdx {
18  None = - 1,
19  PM_SGPR32 = 0,
20  PM_SGPR64 = 1,
21  PM_VGPR32 = 2,
22  PM_VGPR64 = 3
23};
24
25const RegisterBankInfo::PartialMapping PartMappings[] {
26  // StartIdx, Length, RegBank
27  {0, 32, SGPRRegBank},
28  {0, 64, SGPRRegBank},
29  {0, 32, VGPRRegBank},
30  {0, 64, VGPRRegBank}
31};
32
33const RegisterBankInfo::ValueMapping ValMappings[] {
34  // SGPR 32-bit
35  {&PartMappings[0], 1},
36  // SGPR 64-bit
37  {&PartMappings[1], 1},
38  // VGPR 32-bit
39  {&PartMappings[2], 1},
40  // VGPR 64-bit
41  {&PartMappings[3], 1}
42};
43
44enum ValueMappingIdx {
45  SGPRStartIdx = 0,
46  VGPRStartIdx = 2
47};
48
49const RegisterBankInfo::ValueMapping *getValueMapping(unsigned BankID,
50                                                      unsigned Size) {
51  assert(Size % 32 == 0);
52  unsigned Idx = BankID == AMDGPU::SGPRRegBankID ? SGPRStartIdx : VGPRStartIdx;
53  Idx += (Size / 32) - 1;
54  return &ValMappings[Idx];
55}
56
57} // End AMDGPU namespace.
58} // End llvm namespace.
59