12cab237bSDimitry Andric //===----------------------------------------------------------------------===//
22cab237bSDimitry Andric //
32cab237bSDimitry Andric // The LLVM Compiler Infrastructure
42cab237bSDimitry Andric //
52cab237bSDimitry Andric // This file is distributed under the University of Illinois Open Source
62cab237bSDimitry Andric // License. See LICENSE.TXT for details.
72cab237bSDimitry Andric //
82cab237bSDimitry Andric //===----------------------------------------------------------------------===//
92cab237bSDimitry Andric
102cab237bSDimitry Andric #include "AMDGPU.h"
112cab237bSDimitry Andric #include "AMDGPUArgumentUsageInfo.h"
122cab237bSDimitry Andric #include "SIRegisterInfo.h"
132cab237bSDimitry Andric #include "llvm/Support/raw_ostream.h"
142cab237bSDimitry Andric
152cab237bSDimitry Andric using namespace llvm;
162cab237bSDimitry Andric
172cab237bSDimitry Andric #define DEBUG_TYPE "amdgpu-argument-reg-usage-info"
182cab237bSDimitry Andric
192cab237bSDimitry Andric INITIALIZE_PASS(AMDGPUArgumentUsageInfo, DEBUG_TYPE,
202cab237bSDimitry Andric "Argument Register Usage Information Storage", false, true)
212cab237bSDimitry Andric
print(raw_ostream & OS,const TargetRegisterInfo * TRI) const222cab237bSDimitry Andric void ArgDescriptor::print(raw_ostream &OS,
232cab237bSDimitry Andric const TargetRegisterInfo *TRI) const {
242cab237bSDimitry Andric if (!isSet()) {
252cab237bSDimitry Andric OS << "<not set>\n";
262cab237bSDimitry Andric return;
272cab237bSDimitry Andric }
282cab237bSDimitry Andric
292cab237bSDimitry Andric if (isRegister())
302cab237bSDimitry Andric OS << "Reg " << printReg(getRegister(), TRI) << '\n';
312cab237bSDimitry Andric else
322cab237bSDimitry Andric OS << "Stack offset " << getStackOffset() << '\n';
332cab237bSDimitry Andric }
342cab237bSDimitry Andric
352cab237bSDimitry Andric char AMDGPUArgumentUsageInfo::ID = 0;
362cab237bSDimitry Andric
372cab237bSDimitry Andric const AMDGPUFunctionArgInfo AMDGPUArgumentUsageInfo::ExternFunctionInfo{};
382cab237bSDimitry Andric
doInitialization(Module & M)392cab237bSDimitry Andric bool AMDGPUArgumentUsageInfo::doInitialization(Module &M) {
402cab237bSDimitry Andric return false;
412cab237bSDimitry Andric }
422cab237bSDimitry Andric
doFinalization(Module & M)432cab237bSDimitry Andric bool AMDGPUArgumentUsageInfo::doFinalization(Module &M) {
442cab237bSDimitry Andric ArgInfoMap.clear();
452cab237bSDimitry Andric return false;
462cab237bSDimitry Andric }
472cab237bSDimitry Andric
print(raw_ostream & OS,const Module * M) const482cab237bSDimitry Andric void AMDGPUArgumentUsageInfo::print(raw_ostream &OS, const Module *M) const {
492cab237bSDimitry Andric for (const auto &FI : ArgInfoMap) {
502cab237bSDimitry Andric OS << "Arguments for " << FI.first->getName() << '\n'
512cab237bSDimitry Andric << " PrivateSegmentBuffer: " << FI.second.PrivateSegmentBuffer
522cab237bSDimitry Andric << " DispatchPtr: " << FI.second.DispatchPtr
532cab237bSDimitry Andric << " QueuePtr: " << FI.second.QueuePtr
542cab237bSDimitry Andric << " KernargSegmentPtr: " << FI.second.KernargSegmentPtr
552cab237bSDimitry Andric << " DispatchID: " << FI.second.DispatchID
562cab237bSDimitry Andric << " FlatScratchInit: " << FI.second.FlatScratchInit
572cab237bSDimitry Andric << " PrivateSegmentSize: " << FI.second.PrivateSegmentSize
582cab237bSDimitry Andric << " WorkGroupIDX: " << FI.second.WorkGroupIDX
592cab237bSDimitry Andric << " WorkGroupIDY: " << FI.second.WorkGroupIDY
602cab237bSDimitry Andric << " WorkGroupIDZ: " << FI.second.WorkGroupIDZ
612cab237bSDimitry Andric << " WorkGroupInfo: " << FI.second.WorkGroupInfo
622cab237bSDimitry Andric << " PrivateSegmentWaveByteOffset: "
632cab237bSDimitry Andric << FI.second.PrivateSegmentWaveByteOffset
642cab237bSDimitry Andric << " ImplicitBufferPtr: " << FI.second.ImplicitBufferPtr
652cab237bSDimitry Andric << " ImplicitArgPtr: " << FI.second.ImplicitArgPtr
662cab237bSDimitry Andric << " WorkItemIDX " << FI.second.WorkItemIDX
672cab237bSDimitry Andric << " WorkItemIDY " << FI.second.WorkItemIDY
682cab237bSDimitry Andric << " WorkItemIDZ " << FI.second.WorkItemIDZ
692cab237bSDimitry Andric << '\n';
702cab237bSDimitry Andric }
712cab237bSDimitry Andric }
722cab237bSDimitry Andric
732cab237bSDimitry Andric std::pair<const ArgDescriptor *, const TargetRegisterClass *>
getPreloadedValue(AMDGPUFunctionArgInfo::PreloadedValue Value) const742cab237bSDimitry Andric AMDGPUFunctionArgInfo::getPreloadedValue(
752cab237bSDimitry Andric AMDGPUFunctionArgInfo::PreloadedValue Value) const {
762cab237bSDimitry Andric switch (Value) {
772cab237bSDimitry Andric case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_BUFFER: {
782cab237bSDimitry Andric return std::make_pair(
792cab237bSDimitry Andric PrivateSegmentBuffer ? &PrivateSegmentBuffer : nullptr,
802cab237bSDimitry Andric &AMDGPU::SGPR_128RegClass);
812cab237bSDimitry Andric }
822cab237bSDimitry Andric case AMDGPUFunctionArgInfo::IMPLICIT_BUFFER_PTR:
832cab237bSDimitry Andric return std::make_pair(ImplicitBufferPtr ? &ImplicitBufferPtr : nullptr,
842cab237bSDimitry Andric &AMDGPU::SGPR_64RegClass);
852cab237bSDimitry Andric case AMDGPUFunctionArgInfo::WORKGROUP_ID_X:
862cab237bSDimitry Andric return std::make_pair(WorkGroupIDX ? &WorkGroupIDX : nullptr,
872cab237bSDimitry Andric &AMDGPU::SGPR_32RegClass);
882cab237bSDimitry Andric
892cab237bSDimitry Andric case AMDGPUFunctionArgInfo::WORKGROUP_ID_Y:
902cab237bSDimitry Andric return std::make_pair(WorkGroupIDY ? &WorkGroupIDY : nullptr,
912cab237bSDimitry Andric &AMDGPU::SGPR_32RegClass);
922cab237bSDimitry Andric case AMDGPUFunctionArgInfo::WORKGROUP_ID_Z:
932cab237bSDimitry Andric return std::make_pair(WorkGroupIDZ ? &WorkGroupIDZ : nullptr,
942cab237bSDimitry Andric &AMDGPU::SGPR_32RegClass);
952cab237bSDimitry Andric case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_WAVE_BYTE_OFFSET:
962cab237bSDimitry Andric return std::make_pair(
972cab237bSDimitry Andric PrivateSegmentWaveByteOffset ? &PrivateSegmentWaveByteOffset : nullptr,
982cab237bSDimitry Andric &AMDGPU::SGPR_32RegClass);
992cab237bSDimitry Andric case AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR:
1002cab237bSDimitry Andric return std::make_pair(KernargSegmentPtr ? &KernargSegmentPtr : nullptr,
1012cab237bSDimitry Andric &AMDGPU::SGPR_64RegClass);
1022cab237bSDimitry Andric case AMDGPUFunctionArgInfo::IMPLICIT_ARG_PTR:
1032cab237bSDimitry Andric return std::make_pair(ImplicitArgPtr ? &ImplicitArgPtr : nullptr,
1042cab237bSDimitry Andric &AMDGPU::SGPR_64RegClass);
1052cab237bSDimitry Andric case AMDGPUFunctionArgInfo::DISPATCH_ID:
1062cab237bSDimitry Andric return std::make_pair(DispatchID ? &DispatchID : nullptr,
1072cab237bSDimitry Andric &AMDGPU::SGPR_64RegClass);
1082cab237bSDimitry Andric case AMDGPUFunctionArgInfo::FLAT_SCRATCH_INIT:
1092cab237bSDimitry Andric return std::make_pair(FlatScratchInit ? &FlatScratchInit : nullptr,
1102cab237bSDimitry Andric &AMDGPU::SGPR_64RegClass);
1112cab237bSDimitry Andric case AMDGPUFunctionArgInfo::DISPATCH_PTR:
1122cab237bSDimitry Andric return std::make_pair(DispatchPtr ? &DispatchPtr : nullptr,
1132cab237bSDimitry Andric &AMDGPU::SGPR_64RegClass);
1142cab237bSDimitry Andric case AMDGPUFunctionArgInfo::QUEUE_PTR:
1152cab237bSDimitry Andric return std::make_pair(QueuePtr ? &QueuePtr : nullptr,
1162cab237bSDimitry Andric &AMDGPU::SGPR_64RegClass);
1172cab237bSDimitry Andric case AMDGPUFunctionArgInfo::WORKITEM_ID_X:
1182cab237bSDimitry Andric return std::make_pair(WorkItemIDX ? &WorkItemIDX : nullptr,
1192cab237bSDimitry Andric &AMDGPU::VGPR_32RegClass);
1202cab237bSDimitry Andric case AMDGPUFunctionArgInfo::WORKITEM_ID_Y:
1212cab237bSDimitry Andric return std::make_pair(WorkItemIDY ? &WorkItemIDY : nullptr,
1222cab237bSDimitry Andric &AMDGPU::VGPR_32RegClass);
1232cab237bSDimitry Andric case AMDGPUFunctionArgInfo::WORKITEM_ID_Z:
1242cab237bSDimitry Andric return std::make_pair(WorkItemIDZ ? &WorkItemIDZ : nullptr,
1252cab237bSDimitry Andric &AMDGPU::VGPR_32RegClass);
1262cab237bSDimitry Andric }
1272cab237bSDimitry Andric llvm_unreachable("unexpected preloaded value type");
1282cab237bSDimitry Andric }
129