1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements a target parser to recognise hardware features such as 11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/Support/ARMBuildAttributes.h" 16 #include "llvm/Support/TargetParser.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/ADT/StringSwitch.h" 19 #include <cctype> 20 21 using namespace llvm; 22 23 namespace { 24 25 // List of canonical FPU names (use getFPUSynonym) and which architectural 26 // features they correspond to (use getFPUFeatures). 27 // FIXME: TableGen this. 28 struct { 29 const char * Name; 30 ARM::FPUKind ID; 31 unsigned FPUVersion; ///< Corresponds directly to the FP arch version number. 32 ARM::NeonSupportLevel NeonSupport; 33 ARM::FPURestriction Restriction; 34 } FPUNames[] = { 35 { "invalid", ARM::FK_INVALID, 0, ARM::NS_None, ARM::FR_None}, 36 { "none", ARM::FK_NONE, 0, ARM::NS_None, ARM::FR_None}, 37 { "vfp", ARM::FK_VFP, 2, ARM::NS_None, ARM::FR_None}, 38 { "vfpv2", ARM::FK_VFPV2, 2, ARM::NS_None, ARM::FR_None}, 39 { "vfpv3", ARM::FK_VFPV3, 3, ARM::NS_None, ARM::FR_None}, 40 { "vfpv3-d16", ARM::FK_VFPV3_D16, 3, ARM::NS_None, ARM::FR_D16}, 41 { "vfpv4", ARM::FK_VFPV4, 4, ARM::NS_None, ARM::FR_None}, 42 { "vfpv4-d16", ARM::FK_VFPV4_D16, 4, ARM::NS_None, ARM::FR_D16}, 43 { "fpv4-sp-d16", ARM::FK_FPV4_SP_D16, 4, ARM::NS_None, ARM::FR_SP_D16}, 44 { "fpv5-d16", ARM::FK_FPV5_D16, 5, ARM::NS_None, ARM::FR_D16}, 45 { "fpv5-sp-d16", ARM::FK_FPV5_SP_D16, 5, ARM::NS_None, ARM::FR_SP_D16}, 46 { "fp-armv8", ARM::FK_FP_ARMV8, 5, ARM::NS_None, ARM::FR_None}, 47 { "neon", ARM::FK_NEON, 3, ARM::NS_Neon, ARM::FR_None}, 48 { "neon-vfpv4", ARM::FK_NEON_VFPV4, 4, ARM::NS_Neon, ARM::FR_None}, 49 { "neon-fp-armv8", ARM::FK_NEON_FP_ARMV8, 5, ARM::NS_Neon, ARM::FR_None}, 50 { "crypto-neon-fp-armv8", 51 ARM::FK_CRYPTO_NEON_FP_ARMV8, 5, ARM::NS_Crypto, ARM::FR_None}, 52 { "softvfp", ARM::FK_SOFTVFP, 0, ARM::NS_None, ARM::FR_None}, 53 }; 54 55 // List of canonical arch names (use getArchSynonym). 56 // This table also provides the build attribute fields for CPU arch 57 // and Arch ID, according to the Addenda to the ARM ABI, chapters 58 // 2.4 and 2.3.5.2 respectively. 59 // FIXME: SubArch values were simplified to fit into the expectations 60 // of the triples and are not conforming with their official names. 61 // Check to see if the expectation should be changed. 62 // FIXME: TableGen this. 63 struct { 64 const char *Name; 65 ARM::ArchKind ID; 66 const char *CPUAttr; // CPU class in build attributes. 67 const char *SubArch; // Sub-Arch name. 68 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes. 69 } ARCHNames[] = { 70 { "invalid", ARM::AK_INVALID, nullptr, nullptr, ARMBuildAttrs::CPUArch::Pre_v4 }, 71 { "armv2", ARM::AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4 }, 72 { "armv2a", ARM::AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4 }, 73 { "armv3", ARM::AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4 }, 74 { "armv3m", ARM::AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4 }, 75 { "armv4", ARM::AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4 }, 76 { "armv4t", ARM::AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T }, 77 { "armv5t", ARM::AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T }, 78 { "armv5te", ARM::AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE }, 79 { "armv5tej", ARM::AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ }, 80 { "armv6", ARM::AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6 }, 81 { "armv6k", ARM::AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K }, 82 { "armv6t2", ARM::AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2 }, 83 { "armv6z", ARM::AK_ARMV6Z, "6Z", "v6z", ARMBuildAttrs::CPUArch::v6KZ }, 84 { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", "v6zk", ARMBuildAttrs::CPUArch::v6KZ }, 85 { "armv6-m", ARM::AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M }, 86 { "armv6s-m", ARM::AK_ARMV6SM, "6S-M", "v6sm", ARMBuildAttrs::CPUArch::v6S_M }, 87 { "armv7-a", ARM::AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7 }, 88 { "armv7-r", ARM::AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7 }, 89 { "armv7-m", ARM::AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7 }, 90 { "armv7e-m", ARM::AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M }, 91 { "armv8-a", ARM::AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8 }, 92 { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", "v8.1a", ARMBuildAttrs::CPUArch::v8 }, 93 // Non-standard Arch names. 94 { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE }, 95 { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE }, 96 { "xscale", ARM::AK_XSCALE, "xscale", "", ARMBuildAttrs::CPUArch::v5TE }, 97 { "armv5", ARM::AK_ARMV5, "5T", "v5", ARMBuildAttrs::CPUArch::v5T }, 98 { "armv5e", ARM::AK_ARMV5E, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE }, 99 { "armv6j", ARM::AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6 }, 100 { "armv6hl", ARM::AK_ARMV6HL, "6-M", "v6hl", ARMBuildAttrs::CPUArch::v6_M }, 101 { "armv7", ARM::AK_ARMV7, "7", "v7", ARMBuildAttrs::CPUArch::v7 }, 102 { "armv7l", ARM::AK_ARMV7L, "7-L", "v7l", ARMBuildAttrs::CPUArch::v7 }, 103 { "armv7hl", ARM::AK_ARMV7HL, "7-L", "v7hl", ARMBuildAttrs::CPUArch::v7 }, 104 { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7 } 105 }; 106 // List of Arch Extension names. 107 // FIXME: TableGen this. 108 struct { 109 const char *Name; 110 ARM::ArchExtKind ID; 111 } ARCHExtNames[] = { 112 { "invalid", ARM::AEK_INVALID }, 113 { "crc", ARM::AEK_CRC }, 114 { "crypto", ARM::AEK_CRYPTO }, 115 { "fp", ARM::AEK_FP }, 116 { "idiv", ARM::AEK_HWDIV }, 117 { "mp", ARM::AEK_MP }, 118 { "simd", ARM::AEK_SIMD }, 119 { "sec", ARM::AEK_SEC }, 120 { "virt", ARM::AEK_VIRT }, 121 { "os", ARM::AEK_OS }, 122 { "iwmmxt", ARM::AEK_IWMMXT }, 123 { "iwmmxt2", ARM::AEK_IWMMXT2 }, 124 { "maverick", ARM::AEK_MAVERICK }, 125 { "xscale", ARM::AEK_XSCALE } 126 }; 127 // List of CPU names and their arches. 128 // The same CPU can have multiple arches and can be default on multiple arches. 129 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly. 130 // When this becomes table-generated, we'd probably need two tables. 131 // FIXME: TableGen this. 132 struct { 133 const char *Name; 134 ARM::ArchKind ArchID; 135 bool Default; 136 } CPUNames[] = { 137 { "arm2", ARM::AK_ARMV2, true }, 138 { "arm3", ARM::AK_ARMV2A, true }, 139 { "arm6", ARM::AK_ARMV3, true }, 140 { "arm7m", ARM::AK_ARMV3M, true }, 141 { "arm8", ARM::AK_ARMV4, false }, 142 { "arm810", ARM::AK_ARMV4, false }, 143 { "strongarm", ARM::AK_ARMV4, true }, 144 { "strongarm110", ARM::AK_ARMV4, false }, 145 { "strongarm1100", ARM::AK_ARMV4, false }, 146 { "strongarm1110", ARM::AK_ARMV4, false }, 147 { "arm7tdmi", ARM::AK_ARMV4T, true }, 148 { "arm7tdmi-s", ARM::AK_ARMV4T, false }, 149 { "arm710t", ARM::AK_ARMV4T, false }, 150 { "arm720t", ARM::AK_ARMV4T, false }, 151 { "arm9", ARM::AK_ARMV4T, false }, 152 { "arm9tdmi", ARM::AK_ARMV4T, false }, 153 { "arm920", ARM::AK_ARMV4T, false }, 154 { "arm920t", ARM::AK_ARMV4T, false }, 155 { "arm922t", ARM::AK_ARMV4T, false }, 156 { "arm9312", ARM::AK_ARMV4T, false }, 157 { "arm940t", ARM::AK_ARMV4T, false }, 158 { "ep9312", ARM::AK_ARMV4T, false }, 159 { "arm10tdmi", ARM::AK_ARMV5T, true }, 160 { "arm1020t", ARM::AK_ARMV5T, false }, 161 { "arm9e", ARM::AK_ARMV5TE, false }, 162 { "arm946e-s", ARM::AK_ARMV5TE, false }, 163 { "arm966e-s", ARM::AK_ARMV5TE, false }, 164 { "arm968e-s", ARM::AK_ARMV5TE, false }, 165 { "arm10e", ARM::AK_ARMV5TE, false }, 166 { "arm1020e", ARM::AK_ARMV5TE, false }, 167 { "arm1022e", ARM::AK_ARMV5TE, true }, 168 { "iwmmxt", ARM::AK_ARMV5TE, false }, 169 { "xscale", ARM::AK_ARMV5TE, false }, 170 { "arm926ej-s", ARM::AK_ARMV5TEJ, true }, 171 { "arm1136jf-s", ARM::AK_ARMV6, true }, 172 { "arm1176j-s", ARM::AK_ARMV6K, false }, 173 { "arm1176jz-s", ARM::AK_ARMV6K, false }, 174 { "mpcore", ARM::AK_ARMV6K, false }, 175 { "mpcorenovfp", ARM::AK_ARMV6K, false }, 176 { "arm1176jzf-s", ARM::AK_ARMV6K, true }, 177 { "arm1176jzf-s", ARM::AK_ARMV6Z, true }, 178 { "arm1176jzf-s", ARM::AK_ARMV6ZK, true }, 179 { "arm1156t2-s", ARM::AK_ARMV6T2, true }, 180 { "arm1156t2f-s", ARM::AK_ARMV6T2, false }, 181 { "cortex-m0", ARM::AK_ARMV6M, true }, 182 { "cortex-m0plus", ARM::AK_ARMV6M, false }, 183 { "cortex-m1", ARM::AK_ARMV6M, false }, 184 { "sc000", ARM::AK_ARMV6M, false }, 185 { "cortex-a5", ARM::AK_ARMV7A, false }, 186 { "cortex-a7", ARM::AK_ARMV7A, false }, 187 { "cortex-a8", ARM::AK_ARMV7A, true }, 188 { "cortex-a9", ARM::AK_ARMV7A, false }, 189 { "cortex-a12", ARM::AK_ARMV7A, false }, 190 { "cortex-a15", ARM::AK_ARMV7A, false }, 191 { "cortex-a17", ARM::AK_ARMV7A, false }, 192 { "krait", ARM::AK_ARMV7A, false }, 193 { "cortex-r4", ARM::AK_ARMV7R, true }, 194 { "cortex-r4f", ARM::AK_ARMV7R, false }, 195 { "cortex-r5", ARM::AK_ARMV7R, false }, 196 { "cortex-r7", ARM::AK_ARMV7R, false }, 197 { "sc300", ARM::AK_ARMV7M, false }, 198 { "cortex-m3", ARM::AK_ARMV7M, true }, 199 { "cortex-m4", ARM::AK_ARMV7EM, true }, 200 { "cortex-m7", ARM::AK_ARMV7EM, false }, 201 { "cortex-a53", ARM::AK_ARMV8A, true }, 202 { "cortex-a57", ARM::AK_ARMV8A, false }, 203 { "cortex-a72", ARM::AK_ARMV8A, false }, 204 { "cyclone", ARM::AK_ARMV8A, false }, 205 { "generic", ARM::AK_ARMV8_1A, true }, 206 // Non-standard Arch names. 207 { "iwmmxt", ARM::AK_IWMMXT, true }, 208 { "xscale", ARM::AK_XSCALE, true }, 209 { "arm10tdmi", ARM::AK_ARMV5, true }, 210 { "arm1022e", ARM::AK_ARMV5E, true }, 211 { "arm1136j-s", ARM::AK_ARMV6J, true }, 212 { "arm1136jz-s", ARM::AK_ARMV6J, false }, 213 { "cortex-m0", ARM::AK_ARMV6SM, true }, 214 { "arm1176jzf-s", ARM::AK_ARMV6HL, true }, 215 { "cortex-a8", ARM::AK_ARMV7, true }, 216 { "cortex-a8", ARM::AK_ARMV7L, true }, 217 { "cortex-a8", ARM::AK_ARMV7HL, true }, 218 { "cortex-m4", ARM::AK_ARMV7EM, true }, 219 { "swift", ARM::AK_ARMV7S, true }, 220 // Invalid CPU 221 { "invalid", ARM::AK_INVALID, true } 222 }; 223 224 } // namespace 225 226 // ======================================================= // 227 // Information by ID 228 // ======================================================= // 229 230 const char *ARMTargetParser::getFPUName(unsigned FPUKind) { 231 if (FPUKind >= ARM::FK_LAST) 232 return nullptr; 233 return FPUNames[FPUKind].Name; 234 } 235 236 unsigned ARMTargetParser::getFPUVersion(unsigned FPUKind) { 237 if (FPUKind >= ARM::FK_LAST) 238 return 0; 239 return FPUNames[FPUKind].FPUVersion; 240 } 241 242 unsigned ARMTargetParser::getFPUNeonSupportLevel(unsigned FPUKind) { 243 if (FPUKind >= ARM::FK_LAST) 244 return 0; 245 return FPUNames[FPUKind].NeonSupport; 246 } 247 248 unsigned ARMTargetParser::getFPURestriction(unsigned FPUKind) { 249 if (FPUKind >= ARM::FK_LAST) 250 return 0; 251 return FPUNames[FPUKind].Restriction; 252 } 253 254 bool ARMTargetParser::getFPUFeatures(unsigned FPUKind, 255 std::vector<const char *> &Features) { 256 257 if (FPUKind >= ARM::FK_LAST || FPUKind == ARM::FK_INVALID) 258 return false; 259 260 // fp-only-sp and d16 subtarget features are independent of each other, so we 261 // must enable/disable both. 262 switch (FPUNames[FPUKind].Restriction) { 263 case ARM::FR_SP_D16: 264 Features.push_back("+fp-only-sp"); 265 Features.push_back("+d16"); 266 break; 267 case ARM::FR_D16: 268 Features.push_back("-fp-only-sp"); 269 Features.push_back("+d16"); 270 break; 271 case ARM::FR_None: 272 Features.push_back("-fp-only-sp"); 273 Features.push_back("-d16"); 274 break; 275 } 276 277 // FPU version subtarget features are inclusive of lower-numbered ones, so 278 // enable the one corresponding to this version and disable all that are 279 // higher. 280 switch (FPUNames[FPUKind].FPUVersion) { 281 case 5: 282 Features.push_back("+fp-armv8"); 283 break; 284 case 4: 285 Features.push_back("+vfp4"); 286 Features.push_back("-fp-armv8"); 287 break; 288 case 3: 289 Features.push_back("+vfp3"); 290 Features.push_back("-vfp4"); 291 Features.push_back("-fp-armv8"); 292 break; 293 case 2: 294 Features.push_back("+vfp2"); 295 Features.push_back("-vfp3"); 296 Features.push_back("-vfp4"); 297 Features.push_back("-fp-armv8"); 298 break; 299 case 0: 300 Features.push_back("-vfp2"); 301 Features.push_back("-vfp3"); 302 Features.push_back("-vfp4"); 303 Features.push_back("-fp-armv8"); 304 break; 305 } 306 307 // crypto includes neon, so we handle this similarly to FPU version. 308 switch (FPUNames[FPUKind].NeonSupport) { 309 case ARM::NS_Crypto: 310 Features.push_back("+crypto"); 311 break; 312 case ARM::NS_Neon: 313 Features.push_back("+neon"); 314 Features.push_back("-crypto"); 315 break; 316 case ARM::NS_None: 317 Features.push_back("-neon"); 318 Features.push_back("-crypto"); 319 break; 320 } 321 322 return true; 323 } 324 325 const char *ARMTargetParser::getArchName(unsigned ArchKind) { 326 if (ArchKind >= ARM::AK_LAST) 327 return nullptr; 328 return ARCHNames[ArchKind].Name; 329 } 330 331 const char *ARMTargetParser::getCPUAttr(unsigned ArchKind) { 332 if (ArchKind >= ARM::AK_LAST) 333 return nullptr; 334 return ARCHNames[ArchKind].CPUAttr; 335 } 336 337 const char *ARMTargetParser::getSubArch(unsigned ArchKind) { 338 if (ArchKind >= ARM::AK_LAST) 339 return nullptr; 340 return ARCHNames[ArchKind].SubArch; 341 } 342 343 unsigned ARMTargetParser::getArchAttr(unsigned ArchKind) { 344 if (ArchKind >= ARM::AK_LAST) 345 return ARMBuildAttrs::CPUArch::Pre_v4; 346 return ARCHNames[ArchKind].ArchAttr; 347 } 348 349 const char *ARMTargetParser::getArchExtName(unsigned ArchExtKind) { 350 if (ArchExtKind >= ARM::AEK_LAST) 351 return nullptr; 352 return ARCHExtNames[ArchExtKind].Name; 353 } 354 355 const char *ARMTargetParser::getDefaultCPU(StringRef Arch) { 356 unsigned AK = parseArch(Arch); 357 if (AK == ARM::AK_INVALID) 358 return nullptr; 359 360 // Look for multiple AKs to find the default for pair AK+Name. 361 for (const auto CPU : CPUNames) { 362 if (CPU.ArchID == AK && CPU.Default) 363 return CPU.Name; 364 } 365 return nullptr; 366 } 367 368 // ======================================================= // 369 // Parsers 370 // ======================================================= // 371 372 StringRef ARMTargetParser::getFPUSynonym(StringRef FPU) { 373 return StringSwitch<StringRef>(FPU) 374 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported 375 .Case("vfp2", "vfpv2") 376 .Case("vfp3", "vfpv3") 377 .Case("vfp4", "vfpv4") 378 .Case("vfp3-d16", "vfpv3-d16") 379 .Case("vfp4-d16", "vfpv4-d16") 380 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16") 381 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16") 382 .Case("fp5-sp-d16", "fpv5-sp-d16") 383 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16") 384 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. 385 .Case("neon-vfpv3", "neon") 386 .Default(FPU); 387 } 388 389 StringRef ARMTargetParser::getArchSynonym(StringRef Arch) { 390 return StringSwitch<StringRef>(Arch) 391 .Case("v6sm", "v6s-m") 392 .Case("v6m", "v6-m") 393 .Case("v7a", "v7-a") 394 .Case("v7r", "v7-r") 395 .Case("v7m", "v7-m") 396 .Case("v7em", "v7e-m") 397 .Cases("v8", "v8a", "aarch64", "arm64", "v8-a") 398 .Case("v8.1a", "v8.1-a") 399 .Default(Arch); 400 } 401 402 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but 403 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return 404 // "v.+", if the latter, return unmodified string, minus 'eb'. 405 // If invalid, return empty string. 406 StringRef ARMTargetParser::getCanonicalArchName(StringRef Arch) { 407 size_t offset = StringRef::npos; 408 StringRef A = Arch; 409 StringRef Error = ""; 410 411 // Begins with "arm" / "thumb", move past it. 412 if (A.startswith("arm64")) 413 offset = 5; 414 else if (A.startswith("arm")) 415 offset = 3; 416 else if (A.startswith("thumb")) 417 offset = 5; 418 else if (A.startswith("aarch64")) { 419 offset = 7; 420 // AArch64 uses "_be", not "eb" suffix. 421 if (A.find("eb") != StringRef::npos) 422 return Error; 423 if (A.substr(offset,3) == "_be") 424 offset += 3; 425 } 426 427 // Ex. "armebv7", move past the "eb". 428 if (offset != StringRef::npos && A.substr(offset, 2) == "eb") 429 offset += 2; 430 // Or, if it ends with eb ("armv7eb"), chop it off. 431 else if (A.endswith("eb")) 432 A = A.substr(0, A.size() - 2); 433 // Trim the head 434 if (offset != StringRef::npos) 435 A = A.substr(offset); 436 437 // Empty string means offset reached the end, which means it's valid. 438 if (A.empty()) 439 return Arch; 440 441 // Only match non-marketing names 442 if (offset != StringRef::npos) { 443 // Must start with 'vN'. 444 if (A[0] != 'v' || !std::isdigit(A[1])) 445 return Error; 446 // Can't have an extra 'eb'. 447 if (A.find("eb") != StringRef::npos) 448 return Error; 449 } 450 451 // Arch will either be a 'v' name (v7a) or a marketing name (xscale). 452 return A; 453 } 454 455 unsigned ARMTargetParser::parseFPU(StringRef FPU) { 456 StringRef Syn = getFPUSynonym(FPU); 457 for (const auto F : FPUNames) { 458 if (Syn == F.Name) 459 return F.ID; 460 } 461 return ARM::FK_INVALID; 462 } 463 464 // Allows partial match, ex. "v7a" matches "armv7a". 465 unsigned ARMTargetParser::parseArch(StringRef Arch) { 466 Arch = getCanonicalArchName(Arch); 467 StringRef Syn = getArchSynonym(Arch); 468 for (const auto A : ARCHNames) { 469 if (StringRef(A.Name).endswith(Syn)) 470 return A.ID; 471 } 472 return ARM::AK_INVALID; 473 } 474 475 unsigned ARMTargetParser::parseArchExt(StringRef ArchExt) { 476 for (const auto A : ARCHExtNames) { 477 if (ArchExt == A.Name) 478 return A.ID; 479 } 480 return ARM::AEK_INVALID; 481 } 482 483 unsigned ARMTargetParser::parseCPUArch(StringRef CPU) { 484 for (const auto C : CPUNames) { 485 if (CPU == C.Name) 486 return C.ArchID; 487 } 488 return ARM::AK_INVALID; 489 } 490 491 // ARM, Thumb, AArch64 492 unsigned ARMTargetParser::parseArchISA(StringRef Arch) { 493 return StringSwitch<unsigned>(Arch) 494 .StartsWith("aarch64", ARM::IK_AARCH64) 495 .StartsWith("arm64", ARM::IK_AARCH64) 496 .StartsWith("thumb", ARM::IK_THUMB) 497 .StartsWith("arm", ARM::IK_ARM) 498 .Default(ARM::EK_INVALID); 499 } 500 501 // Little/Big endian 502 unsigned ARMTargetParser::parseArchEndian(StringRef Arch) { 503 if (Arch.startswith("armeb") || 504 Arch.startswith("thumbeb") || 505 Arch.startswith("aarch64_be")) 506 return ARM::EK_BIG; 507 508 if (Arch.startswith("arm") || Arch.startswith("thumb")) { 509 if (Arch.endswith("eb")) 510 return ARM::EK_BIG; 511 else 512 return ARM::EK_LITTLE; 513 } 514 515 if (Arch.startswith("aarch64")) 516 return ARM::EK_LITTLE; 517 518 return ARM::EK_INVALID; 519 } 520 521 // Profile A/R/M 522 unsigned ARMTargetParser::parseArchProfile(StringRef Arch) { 523 Arch = getCanonicalArchName(Arch); 524 switch(parseArch(Arch)) { 525 case ARM::AK_ARMV6M: 526 case ARM::AK_ARMV7M: 527 case ARM::AK_ARMV6SM: 528 case ARM::AK_ARMV7EM: 529 return ARM::PK_M; 530 case ARM::AK_ARMV7R: 531 return ARM::PK_R; 532 case ARM::AK_ARMV7: 533 case ARM::AK_ARMV7A: 534 case ARM::AK_ARMV8A: 535 case ARM::AK_ARMV8_1A: 536 return ARM::PK_A; 537 } 538 return ARM::PK_INVALID; 539 } 540 541 // Version number (ex. v7 = 7). 542 unsigned ARMTargetParser::parseArchVersion(StringRef Arch) { 543 Arch = getCanonicalArchName(Arch); 544 switch(parseArch(Arch)) { 545 case ARM::AK_ARMV2: 546 case ARM::AK_ARMV2A: 547 return 2; 548 case ARM::AK_ARMV3: 549 case ARM::AK_ARMV3M: 550 return 3; 551 case ARM::AK_ARMV4: 552 case ARM::AK_ARMV4T: 553 return 4; 554 case ARM::AK_ARMV5: 555 case ARM::AK_ARMV5T: 556 case ARM::AK_ARMV5TE: 557 case ARM::AK_IWMMXT: 558 case ARM::AK_IWMMXT2: 559 case ARM::AK_XSCALE: 560 case ARM::AK_ARMV5E: 561 case ARM::AK_ARMV5TEJ: 562 return 5; 563 case ARM::AK_ARMV6: 564 case ARM::AK_ARMV6J: 565 case ARM::AK_ARMV6K: 566 case ARM::AK_ARMV6T2: 567 case ARM::AK_ARMV6Z: 568 case ARM::AK_ARMV6ZK: 569 case ARM::AK_ARMV6M: 570 case ARM::AK_ARMV6SM: 571 case ARM::AK_ARMV6HL: 572 return 6; 573 case ARM::AK_ARMV7: 574 case ARM::AK_ARMV7A: 575 case ARM::AK_ARMV7R: 576 case ARM::AK_ARMV7M: 577 case ARM::AK_ARMV7L: 578 case ARM::AK_ARMV7HL: 579 case ARM::AK_ARMV7S: 580 case ARM::AK_ARMV7EM: 581 return 7; 582 case ARM::AK_ARMV8A: 583 case ARM::AK_ARMV8_1A: 584 return 8; 585 } 586 return 0; 587 } 588