1a580b014SDimitry Andric //===- MacroFusion.cpp - Macro Fusion -------------------------------------===//
2edd7eaddSDimitry Andric //
3edd7eaddSDimitry Andric //                     The LLVM Compiler Infrastructure
4edd7eaddSDimitry Andric //
5edd7eaddSDimitry Andric // This file is distributed under the University of Illinois Open Source
6edd7eaddSDimitry Andric // License. See LICENSE.TXT for details.
7edd7eaddSDimitry Andric //
8edd7eaddSDimitry Andric //===----------------------------------------------------------------------===//
9edd7eaddSDimitry Andric //
10edd7eaddSDimitry Andric /// \file This file contains the implementation of the DAG scheduling mutation
11edd7eaddSDimitry Andric /// to pair instructions back to back.
12edd7eaddSDimitry Andric //
13edd7eaddSDimitry Andric //===----------------------------------------------------------------------===//
14edd7eaddSDimitry Andric 
15edd7eaddSDimitry Andric #include "llvm/CodeGen/MacroFusion.h"
16a580b014SDimitry Andric #include "llvm/ADT/STLExtras.h"
17edd7eaddSDimitry Andric #include "llvm/ADT/Statistic.h"
18a580b014SDimitry Andric #include "llvm/CodeGen/MachineInstr.h"
19a580b014SDimitry Andric #include "llvm/CodeGen/MachineScheduler.h"
20a580b014SDimitry Andric #include "llvm/CodeGen/ScheduleDAG.h"
21a580b014SDimitry Andric #include "llvm/CodeGen/ScheduleDAGMutation.h"
22edd7eaddSDimitry Andric #include "llvm/Support/CommandLine.h"
23a580b014SDimitry Andric #include "llvm/Support/Debug.h"
24a580b014SDimitry Andric #include "llvm/Support/raw_ostream.h"
25edd7eaddSDimitry Andric #include "llvm/Target/TargetInstrInfo.h"
26edd7eaddSDimitry Andric 
27c4394386SDimitry Andric #define DEBUG_TYPE "machine-scheduler"
28edd7eaddSDimitry Andric 
29edd7eaddSDimitry Andric STATISTIC(NumFused, "Number of instr pairs fused");
30edd7eaddSDimitry Andric 
31edd7eaddSDimitry Andric using namespace llvm;
32edd7eaddSDimitry Andric 
33edd7eaddSDimitry Andric static cl::opt<bool> EnableMacroFusion("misched-fusion", cl::Hidden,
34edd7eaddSDimitry Andric   cl::desc("Enable scheduling for macro fusion."), cl::init(true));
35edd7eaddSDimitry Andric 
36edd7eaddSDimitry Andric static void fuseInstructionPair(ScheduleDAGMI &DAG, SUnit &FirstSU,
37edd7eaddSDimitry Andric                                 SUnit &SecondSU) {
38edd7eaddSDimitry Andric   // Create a single weak edge between the adjacent instrs. The only effect is
39edd7eaddSDimitry Andric   // to cause bottom-up scheduling to heavily prioritize the clustered instrs.
40edd7eaddSDimitry Andric   DAG.addEdge(&SecondSU, SDep(&FirstSU, SDep::Cluster));
41edd7eaddSDimitry Andric 
42edd7eaddSDimitry Andric   // Adjust the latency between the anchor instr and its
43edd7eaddSDimitry Andric   // predecessors.
44edd7eaddSDimitry Andric   for (SDep &IDep : SecondSU.Preds)
45edd7eaddSDimitry Andric     if (IDep.getSUnit() == &FirstSU)
46edd7eaddSDimitry Andric       IDep.setLatency(0);
47edd7eaddSDimitry Andric 
48edd7eaddSDimitry Andric   // Adjust the latency between the dependent instr and its
49edd7eaddSDimitry Andric   // predecessors.
50edd7eaddSDimitry Andric   for (SDep &IDep : FirstSU.Succs)
51edd7eaddSDimitry Andric     if (IDep.getSUnit() == &SecondSU)
52edd7eaddSDimitry Andric       IDep.setLatency(0);
53edd7eaddSDimitry Andric 
54edd7eaddSDimitry Andric   DEBUG(dbgs() << DAG.MF.getName() << "(): Macro fuse ";
55edd7eaddSDimitry Andric         FirstSU.print(dbgs(), &DAG); dbgs() << " - ";
56edd7eaddSDimitry Andric         SecondSU.print(dbgs(), &DAG); dbgs() << " /  ";
57edd7eaddSDimitry Andric         dbgs() << DAG.TII->getName(FirstSU.getInstr()->getOpcode()) << " - " <<
58edd7eaddSDimitry Andric                   DAG.TII->getName(SecondSU.getInstr()->getOpcode()) << '\n'; );
59edd7eaddSDimitry Andric 
60edd7eaddSDimitry Andric   if (&SecondSU != &DAG.ExitSU)
61edd7eaddSDimitry Andric     // Make instructions dependent on FirstSU also dependent on SecondSU to
62edd7eaddSDimitry Andric     // prevent them from being scheduled between FirstSU and and SecondSU.
63edd7eaddSDimitry Andric     for (const SDep &SI : FirstSU.Succs) {
64edd7eaddSDimitry Andric       if (SI.getSUnit() == &SecondSU)
65edd7eaddSDimitry Andric         continue;
66edd7eaddSDimitry Andric       DEBUG(dbgs() << "  Copy Succ ";
67edd7eaddSDimitry Andric             SI.getSUnit()->print(dbgs(), &DAG); dbgs() << '\n';);
68edd7eaddSDimitry Andric       DAG.addEdge(SI.getSUnit(), SDep(&SecondSU, SDep::Artificial));
69edd7eaddSDimitry Andric     }
70edd7eaddSDimitry Andric 
71edd7eaddSDimitry Andric   ++NumFused;
72edd7eaddSDimitry Andric }
73edd7eaddSDimitry Andric 
74a580b014SDimitry Andric namespace {
75edd7eaddSDimitry Andric 
76edd7eaddSDimitry Andric /// \brief Post-process the DAG to create cluster edges between instrs that may
77edd7eaddSDimitry Andric /// be fused by the processor into a single operation.
78edd7eaddSDimitry Andric class MacroFusion : public ScheduleDAGMutation {
79edd7eaddSDimitry Andric   ShouldSchedulePredTy shouldScheduleAdjacent;
80edd7eaddSDimitry Andric   bool FuseBlock;
81edd7eaddSDimitry Andric   bool scheduleAdjacentImpl(ScheduleDAGMI &DAG, SUnit &AnchorSU);
82edd7eaddSDimitry Andric 
83edd7eaddSDimitry Andric public:
84edd7eaddSDimitry Andric   MacroFusion(ShouldSchedulePredTy shouldScheduleAdjacent, bool FuseBlock)
85edd7eaddSDimitry Andric     : shouldScheduleAdjacent(shouldScheduleAdjacent), FuseBlock(FuseBlock) {}
86edd7eaddSDimitry Andric 
87edd7eaddSDimitry Andric   void apply(ScheduleDAGInstrs *DAGInstrs) override;
88edd7eaddSDimitry Andric };
89edd7eaddSDimitry Andric 
90a580b014SDimitry Andric } // end anonymous namespace
91a580b014SDimitry Andric 
92edd7eaddSDimitry Andric void MacroFusion::apply(ScheduleDAGInstrs *DAGInstrs) {
93edd7eaddSDimitry Andric   ScheduleDAGMI *DAG = static_cast<ScheduleDAGMI*>(DAGInstrs);
94edd7eaddSDimitry Andric 
95edd7eaddSDimitry Andric   if (FuseBlock)
96edd7eaddSDimitry Andric     // For each of the SUnits in the scheduling block, try to fuse the instr in
97edd7eaddSDimitry Andric     // it with one in its predecessors.
98edd7eaddSDimitry Andric     for (SUnit &ISU : DAG->SUnits)
99edd7eaddSDimitry Andric         scheduleAdjacentImpl(*DAG, ISU);
100edd7eaddSDimitry Andric 
101edd7eaddSDimitry Andric   if (DAG->ExitSU.getInstr())
102edd7eaddSDimitry Andric     // Try to fuse the instr in the ExitSU with one in its predecessors.
103edd7eaddSDimitry Andric     scheduleAdjacentImpl(*DAG, DAG->ExitSU);
104edd7eaddSDimitry Andric }
105edd7eaddSDimitry Andric 
106edd7eaddSDimitry Andric /// \brief Implement the fusion of instr pairs in the scheduling DAG,
107edd7eaddSDimitry Andric /// anchored at the instr in AnchorSU..
108edd7eaddSDimitry Andric bool MacroFusion::scheduleAdjacentImpl(ScheduleDAGMI &DAG, SUnit &AnchorSU) {
109edd7eaddSDimitry Andric   const MachineInstr &AnchorMI = *AnchorSU.getInstr();
110edd7eaddSDimitry Andric   const TargetInstrInfo &TII = *DAG.TII;
111edd7eaddSDimitry Andric   const TargetSubtargetInfo &ST = DAG.MF.getSubtarget();
112edd7eaddSDimitry Andric 
113edd7eaddSDimitry Andric   // Check if the anchor instr may be fused.
114edd7eaddSDimitry Andric   if (!shouldScheduleAdjacent(TII, ST, nullptr, AnchorMI))
115edd7eaddSDimitry Andric     return false;
116edd7eaddSDimitry Andric 
117edd7eaddSDimitry Andric   // Explorer for fusion candidates among the dependencies of the anchor instr.
118edd7eaddSDimitry Andric   for (SDep &Dep : AnchorSU.Preds) {
119edd7eaddSDimitry Andric     // Ignore dependencies that don't enforce ordering.
120edd7eaddSDimitry Andric     if (Dep.getKind() == SDep::Anti || Dep.getKind() == SDep::Output ||
121edd7eaddSDimitry Andric         Dep.isWeak())
122edd7eaddSDimitry Andric       continue;
123edd7eaddSDimitry Andric 
124edd7eaddSDimitry Andric     SUnit &DepSU = *Dep.getSUnit();
125edd7eaddSDimitry Andric     if (DepSU.isBoundaryNode())
126edd7eaddSDimitry Andric       continue;
127edd7eaddSDimitry Andric 
128edd7eaddSDimitry Andric     const MachineInstr *DepMI = DepSU.getInstr();
129edd7eaddSDimitry Andric     if (!shouldScheduleAdjacent(TII, ST, DepMI, AnchorMI))
130edd7eaddSDimitry Andric       continue;
131edd7eaddSDimitry Andric 
132edd7eaddSDimitry Andric     fuseInstructionPair(DAG, DepSU, AnchorSU);
133edd7eaddSDimitry Andric     return true;
134edd7eaddSDimitry Andric   }
135edd7eaddSDimitry Andric 
136edd7eaddSDimitry Andric   return false;
137edd7eaddSDimitry Andric }
138edd7eaddSDimitry Andric 
139edd7eaddSDimitry Andric std::unique_ptr<ScheduleDAGMutation>
140a580b014SDimitry Andric llvm::createMacroFusionDAGMutation(
141a580b014SDimitry Andric      ShouldSchedulePredTy shouldScheduleAdjacent) {
142edd7eaddSDimitry Andric   if(EnableMacroFusion)
143edd7eaddSDimitry Andric     return llvm::make_unique<MacroFusion>(shouldScheduleAdjacent, true);
144edd7eaddSDimitry Andric   return nullptr;
145edd7eaddSDimitry Andric }
146edd7eaddSDimitry Andric 
147edd7eaddSDimitry Andric std::unique_ptr<ScheduleDAGMutation>
148a580b014SDimitry Andric llvm::createBranchMacroFusionDAGMutation(
149a580b014SDimitry Andric      ShouldSchedulePredTy shouldScheduleAdjacent) {
150edd7eaddSDimitry Andric   if(EnableMacroFusion)
151edd7eaddSDimitry Andric     return llvm::make_unique<MacroFusion>(shouldScheduleAdjacent, false);
152edd7eaddSDimitry Andric   return nullptr;
153edd7eaddSDimitry Andric }
154