1a580b014SDimitry Andric //===- MacroFusion.cpp - Macro Fusion -------------------------------------===// 2edd7eaddSDimitry Andric // 3edd7eaddSDimitry Andric // The LLVM Compiler Infrastructure 4edd7eaddSDimitry Andric // 5edd7eaddSDimitry Andric // This file is distributed under the University of Illinois Open Source 6edd7eaddSDimitry Andric // License. See LICENSE.TXT for details. 7edd7eaddSDimitry Andric // 8edd7eaddSDimitry Andric //===----------------------------------------------------------------------===// 9edd7eaddSDimitry Andric // 10edd7eaddSDimitry Andric /// \file This file contains the implementation of the DAG scheduling mutation 11edd7eaddSDimitry Andric /// to pair instructions back to back. 12edd7eaddSDimitry Andric // 13edd7eaddSDimitry Andric //===----------------------------------------------------------------------===// 14edd7eaddSDimitry Andric 15edd7eaddSDimitry Andric #include "llvm/CodeGen/MacroFusion.h" 16a580b014SDimitry Andric #include "llvm/ADT/STLExtras.h" 17edd7eaddSDimitry Andric #include "llvm/ADT/Statistic.h" 18a580b014SDimitry Andric #include "llvm/CodeGen/MachineInstr.h" 19a580b014SDimitry Andric #include "llvm/CodeGen/MachineScheduler.h" 20a580b014SDimitry Andric #include "llvm/CodeGen/ScheduleDAG.h" 21a580b014SDimitry Andric #include "llvm/CodeGen/ScheduleDAGMutation.h" 222cab237bSDimitry Andric #include "llvm/CodeGen/TargetInstrInfo.h" 23edd7eaddSDimitry Andric #include "llvm/Support/CommandLine.h" 24a580b014SDimitry Andric #include "llvm/Support/Debug.h" 25a580b014SDimitry Andric #include "llvm/Support/raw_ostream.h" 26edd7eaddSDimitry Andric 27c4394386SDimitry Andric #define DEBUG_TYPE "machine-scheduler" 28edd7eaddSDimitry Andric 29edd7eaddSDimitry Andric STATISTIC(NumFused, "Number of instr pairs fused"); 30edd7eaddSDimitry Andric 31edd7eaddSDimitry Andric using namespace llvm; 32edd7eaddSDimitry Andric 33edd7eaddSDimitry Andric static cl::opt<bool> EnableMacroFusion("misched-fusion", cl::Hidden, 34edd7eaddSDimitry Andric cl::desc("Enable scheduling for macro fusion."), cl::init(true)); 35edd7eaddSDimitry Andric 362cab237bSDimitry Andric static bool isHazard(const SDep &Dep) { 372cab237bSDimitry Andric return Dep.getKind() == SDep::Anti || Dep.getKind() == SDep::Output; 382cab237bSDimitry Andric } 392cab237bSDimitry Andric 402cab237bSDimitry Andric static bool fuseInstructionPair(ScheduleDAGMI &DAG, SUnit &FirstSU, 41edd7eaddSDimitry Andric SUnit &SecondSU) { 422cab237bSDimitry Andric // Check that neither instr is already paired with another along the edge 432cab237bSDimitry Andric // between them. 442cab237bSDimitry Andric for (SDep &SI : FirstSU.Succs) 452cab237bSDimitry Andric if (SI.isCluster()) 462cab237bSDimitry Andric return false; 472cab237bSDimitry Andric 482cab237bSDimitry Andric for (SDep &SI : SecondSU.Preds) 492cab237bSDimitry Andric if (SI.isCluster()) 502cab237bSDimitry Andric return false; 512cab237bSDimitry Andric // Though the reachability checks above could be made more generic, 522cab237bSDimitry Andric // perhaps as part of ScheduleDAGMI::addEdge(), since such edges are valid, 532cab237bSDimitry Andric // the extra computation cost makes it less interesting in general cases. 542cab237bSDimitry Andric 55edd7eaddSDimitry Andric // Create a single weak edge between the adjacent instrs. The only effect is 56edd7eaddSDimitry Andric // to cause bottom-up scheduling to heavily prioritize the clustered instrs. 572cab237bSDimitry Andric if (!DAG.addEdge(&SecondSU, SDep(&FirstSU, SDep::Cluster))) 582cab237bSDimitry Andric return false; 59edd7eaddSDimitry Andric 602cab237bSDimitry Andric // Adjust the latency between both instrs. 612cab237bSDimitry Andric for (SDep &SI : FirstSU.Succs) 622cab237bSDimitry Andric if (SI.getSUnit() == &SecondSU) 632cab237bSDimitry Andric SI.setLatency(0); 64edd7eaddSDimitry Andric 652cab237bSDimitry Andric for (SDep &SI : SecondSU.Preds) 662cab237bSDimitry Andric if (SI.getSUnit() == &FirstSU) 672cab237bSDimitry Andric SI.setLatency(0); 68edd7eaddSDimitry Andric 692cab237bSDimitry Andric DEBUG(dbgs() << "Macro fuse: "; 70edd7eaddSDimitry Andric FirstSU.print(dbgs(), &DAG); dbgs() << " - "; 71edd7eaddSDimitry Andric SecondSU.print(dbgs(), &DAG); dbgs() << " / "; 72edd7eaddSDimitry Andric dbgs() << DAG.TII->getName(FirstSU.getInstr()->getOpcode()) << " - " << 73edd7eaddSDimitry Andric DAG.TII->getName(SecondSU.getInstr()->getOpcode()) << '\n'; ); 74edd7eaddSDimitry Andric 752cab237bSDimitry Andric // Make data dependencies from the FirstSU also dependent on the SecondSU to 762cab237bSDimitry Andric // prevent them from being scheduled between the FirstSU and the SecondSU. 77edd7eaddSDimitry Andric if (&SecondSU != &DAG.ExitSU) 78edd7eaddSDimitry Andric for (const SDep &SI : FirstSU.Succs) { 792cab237bSDimitry Andric SUnit *SU = SI.getSUnit(); 802cab237bSDimitry Andric if (SI.isWeak() || isHazard(SI) || 812cab237bSDimitry Andric SU == &DAG.ExitSU || SU == &SecondSU || SU->isPred(&SecondSU)) 82edd7eaddSDimitry Andric continue; 832cab237bSDimitry Andric DEBUG(dbgs() << " Bind "; 842cab237bSDimitry Andric SecondSU.print(dbgs(), &DAG); dbgs() << " - "; 852cab237bSDimitry Andric SU->print(dbgs(), &DAG); dbgs() << '\n';); 862cab237bSDimitry Andric DAG.addEdge(SU, SDep(&SecondSU, SDep::Artificial)); 872cab237bSDimitry Andric } 882cab237bSDimitry Andric 892cab237bSDimitry Andric // Make the FirstSU also dependent on the dependencies of the SecondSU to 902cab237bSDimitry Andric // prevent them from being scheduled between the FirstSU and the SecondSU. 912cab237bSDimitry Andric if (&FirstSU != &DAG.EntrySU) 922cab237bSDimitry Andric for (const SDep &SI : SecondSU.Preds) { 932cab237bSDimitry Andric SUnit *SU = SI.getSUnit(); 942cab237bSDimitry Andric if (SI.isWeak() || isHazard(SI) || &FirstSU == SU || FirstSU.isSucc(SU)) 952cab237bSDimitry Andric continue; 962cab237bSDimitry Andric DEBUG(dbgs() << " Bind "; 972cab237bSDimitry Andric SU->print(dbgs(), &DAG); dbgs() << " - "; 982cab237bSDimitry Andric FirstSU.print(dbgs(), &DAG); dbgs() << '\n';); 992cab237bSDimitry Andric DAG.addEdge(&FirstSU, SDep(SU, SDep::Artificial)); 100edd7eaddSDimitry Andric } 101edd7eaddSDimitry Andric 102edd7eaddSDimitry Andric ++NumFused; 1032cab237bSDimitry Andric return true; 104edd7eaddSDimitry Andric } 105edd7eaddSDimitry Andric 106a580b014SDimitry Andric namespace { 107edd7eaddSDimitry Andric 108edd7eaddSDimitry Andric /// \brief Post-process the DAG to create cluster edges between instrs that may 109edd7eaddSDimitry Andric /// be fused by the processor into a single operation. 110edd7eaddSDimitry Andric class MacroFusion : public ScheduleDAGMutation { 111edd7eaddSDimitry Andric ShouldSchedulePredTy shouldScheduleAdjacent; 112edd7eaddSDimitry Andric bool FuseBlock; 113edd7eaddSDimitry Andric bool scheduleAdjacentImpl(ScheduleDAGMI &DAG, SUnit &AnchorSU); 114edd7eaddSDimitry Andric 115edd7eaddSDimitry Andric public: 116edd7eaddSDimitry Andric MacroFusion(ShouldSchedulePredTy shouldScheduleAdjacent, bool FuseBlock) 117edd7eaddSDimitry Andric : shouldScheduleAdjacent(shouldScheduleAdjacent), FuseBlock(FuseBlock) {} 118edd7eaddSDimitry Andric 119edd7eaddSDimitry Andric void apply(ScheduleDAGInstrs *DAGInstrs) override; 120edd7eaddSDimitry Andric }; 121edd7eaddSDimitry Andric 122a580b014SDimitry Andric } // end anonymous namespace 123a580b014SDimitry Andric 124edd7eaddSDimitry Andric void MacroFusion::apply(ScheduleDAGInstrs *DAGInstrs) { 125edd7eaddSDimitry Andric ScheduleDAGMI *DAG = static_cast<ScheduleDAGMI*>(DAGInstrs); 126edd7eaddSDimitry Andric 127edd7eaddSDimitry Andric if (FuseBlock) 128edd7eaddSDimitry Andric // For each of the SUnits in the scheduling block, try to fuse the instr in 129edd7eaddSDimitry Andric // it with one in its predecessors. 130edd7eaddSDimitry Andric for (SUnit &ISU : DAG->SUnits) 131edd7eaddSDimitry Andric scheduleAdjacentImpl(*DAG, ISU); 132edd7eaddSDimitry Andric 133edd7eaddSDimitry Andric if (DAG->ExitSU.getInstr()) 134edd7eaddSDimitry Andric // Try to fuse the instr in the ExitSU with one in its predecessors. 135edd7eaddSDimitry Andric scheduleAdjacentImpl(*DAG, DAG->ExitSU); 136edd7eaddSDimitry Andric } 137edd7eaddSDimitry Andric 138edd7eaddSDimitry Andric /// \brief Implement the fusion of instr pairs in the scheduling DAG, 139edd7eaddSDimitry Andric /// anchored at the instr in AnchorSU.. 140edd7eaddSDimitry Andric bool MacroFusion::scheduleAdjacentImpl(ScheduleDAGMI &DAG, SUnit &AnchorSU) { 141edd7eaddSDimitry Andric const MachineInstr &AnchorMI = *AnchorSU.getInstr(); 142edd7eaddSDimitry Andric const TargetInstrInfo &TII = *DAG.TII; 143edd7eaddSDimitry Andric const TargetSubtargetInfo &ST = DAG.MF.getSubtarget(); 144edd7eaddSDimitry Andric 145edd7eaddSDimitry Andric // Check if the anchor instr may be fused. 146edd7eaddSDimitry Andric if (!shouldScheduleAdjacent(TII, ST, nullptr, AnchorMI)) 147edd7eaddSDimitry Andric return false; 148edd7eaddSDimitry Andric 149edd7eaddSDimitry Andric // Explorer for fusion candidates among the dependencies of the anchor instr. 150edd7eaddSDimitry Andric for (SDep &Dep : AnchorSU.Preds) { 1512cab237bSDimitry Andric // Ignore dependencies other than data or strong ordering. 1522cab237bSDimitry Andric if (Dep.isWeak() || isHazard(Dep)) 153edd7eaddSDimitry Andric continue; 154edd7eaddSDimitry Andric 155edd7eaddSDimitry Andric SUnit &DepSU = *Dep.getSUnit(); 156edd7eaddSDimitry Andric if (DepSU.isBoundaryNode()) 157edd7eaddSDimitry Andric continue; 158edd7eaddSDimitry Andric 159edd7eaddSDimitry Andric const MachineInstr *DepMI = DepSU.getInstr(); 160edd7eaddSDimitry Andric if (!shouldScheduleAdjacent(TII, ST, DepMI, AnchorMI)) 161edd7eaddSDimitry Andric continue; 162edd7eaddSDimitry Andric 1632cab237bSDimitry Andric if (fuseInstructionPair(DAG, DepSU, AnchorSU)) 164edd7eaddSDimitry Andric return true; 165edd7eaddSDimitry Andric } 166edd7eaddSDimitry Andric 167edd7eaddSDimitry Andric return false; 168edd7eaddSDimitry Andric } 169edd7eaddSDimitry Andric 170edd7eaddSDimitry Andric std::unique_ptr<ScheduleDAGMutation> 171a580b014SDimitry Andric llvm::createMacroFusionDAGMutation( 172a580b014SDimitry Andric ShouldSchedulePredTy shouldScheduleAdjacent) { 173edd7eaddSDimitry Andric if(EnableMacroFusion) 174edd7eaddSDimitry Andric return llvm::make_unique<MacroFusion>(shouldScheduleAdjacent, true); 175edd7eaddSDimitry Andric return nullptr; 176edd7eaddSDimitry Andric } 177edd7eaddSDimitry Andric 178edd7eaddSDimitry Andric std::unique_ptr<ScheduleDAGMutation> 179a580b014SDimitry Andric llvm::createBranchMacroFusionDAGMutation( 180a580b014SDimitry Andric ShouldSchedulePredTy shouldScheduleAdjacent) { 181edd7eaddSDimitry Andric if(EnableMacroFusion) 182edd7eaddSDimitry Andric return llvm::make_unique<MacroFusion>(shouldScheduleAdjacent, false); 183edd7eaddSDimitry Andric return nullptr; 184edd7eaddSDimitry Andric } 185