17d523365SDimitry Andric //===------ LiveDebugValues.cpp - Tracking Debug Value MIs ----------------===// 27d523365SDimitry Andric // 37d523365SDimitry Andric // The LLVM Compiler Infrastructure 47d523365SDimitry Andric // 57d523365SDimitry Andric // This file is distributed under the University of Illinois Open Source 67d523365SDimitry Andric // License. See LICENSE.TXT for details. 77d523365SDimitry Andric // 87d523365SDimitry Andric //===----------------------------------------------------------------------===// 97d523365SDimitry Andric /// 107d523365SDimitry Andric /// This pass implements a data flow analysis that propagates debug location 117d523365SDimitry Andric /// information by inserting additional DBG_VALUE instructions into the machine 127d523365SDimitry Andric /// instruction stream. The pass internally builds debug location liveness 137d523365SDimitry Andric /// ranges to determine the points where additional DBG_VALUEs need to be 147d523365SDimitry Andric /// inserted. 157d523365SDimitry Andric /// 167d523365SDimitry Andric /// This is a separate pass from DbgValueHistoryCalculator to facilitate 177d523365SDimitry Andric /// testing and improve modularity. 187d523365SDimitry Andric /// 197d523365SDimitry Andric //===----------------------------------------------------------------------===// 207d523365SDimitry Andric 21444ed5c5SDimitry Andric #include "llvm/ADT/PostOrderIterator.h" 22444ed5c5SDimitry Andric #include "llvm/ADT/SmallPtrSet.h" 233ca95b02SDimitry Andric #include "llvm/ADT/SparseBitVector.h" 243ca95b02SDimitry Andric #include "llvm/ADT/Statistic.h" 253ca95b02SDimitry Andric #include "llvm/ADT/UniqueVector.h" 26d88c1a5aSDimitry Andric #include "llvm/CodeGen/LexicalScopes.h" 277a7e6055SDimitry Andric #include "llvm/CodeGen/MachineFrameInfo.h" 287d523365SDimitry Andric #include "llvm/CodeGen/MachineFunction.h" 297d523365SDimitry Andric #include "llvm/CodeGen/MachineFunctionPass.h" 307d523365SDimitry Andric #include "llvm/CodeGen/MachineInstrBuilder.h" 317a7e6055SDimitry Andric #include "llvm/CodeGen/MachineMemOperand.h" 327d523365SDimitry Andric #include "llvm/CodeGen/Passes.h" 333ca95b02SDimitry Andric #include "llvm/IR/DebugInfo.h" 347d523365SDimitry Andric #include "llvm/Support/Debug.h" 357d523365SDimitry Andric #include "llvm/Support/raw_ostream.h" 367a7e6055SDimitry Andric #include "llvm/Target/TargetFrameLowering.h" 377d523365SDimitry Andric #include "llvm/Target/TargetInstrInfo.h" 383ca95b02SDimitry Andric #include "llvm/Target/TargetLowering.h" 397d523365SDimitry Andric #include "llvm/Target/TargetRegisterInfo.h" 407d523365SDimitry Andric #include "llvm/Target/TargetSubtargetInfo.h" 417d523365SDimitry Andric #include <list> 423ca95b02SDimitry Andric #include <queue> 437d523365SDimitry Andric 447d523365SDimitry Andric using namespace llvm; 457d523365SDimitry Andric 46302affcbSDimitry Andric #define DEBUG_TYPE "livedebugvalues" 477d523365SDimitry Andric 487d523365SDimitry Andric STATISTIC(NumInserted, "Number of DBG_VALUE instructions inserted"); 497d523365SDimitry Andric 507d523365SDimitry Andric namespace { 517d523365SDimitry Andric 523ca95b02SDimitry Andric // \brief If @MI is a DBG_VALUE with debug value described by a defined 533ca95b02SDimitry Andric // register, returns the number of this register. In the other case, returns 0. 543ca95b02SDimitry Andric static unsigned isDbgValueDescribedByReg(const MachineInstr &MI) { 553ca95b02SDimitry Andric assert(MI.isDebugValue() && "expected a DBG_VALUE"); 563ca95b02SDimitry Andric assert(MI.getNumOperands() == 4 && "malformed DBG_VALUE"); 573ca95b02SDimitry Andric // If location of variable is described using a register (directly 583ca95b02SDimitry Andric // or indirectly), this register is always a first operand. 593ca95b02SDimitry Andric return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0; 603ca95b02SDimitry Andric } 613ca95b02SDimitry Andric 627d523365SDimitry Andric class LiveDebugValues : public MachineFunctionPass { 637d523365SDimitry Andric 647d523365SDimitry Andric private: 657d523365SDimitry Andric const TargetRegisterInfo *TRI; 667d523365SDimitry Andric const TargetInstrInfo *TII; 677a7e6055SDimitry Andric const TargetFrameLowering *TFI; 68d88c1a5aSDimitry Andric LexicalScopes LS; 69d88c1a5aSDimitry Andric 70d88c1a5aSDimitry Andric /// Keeps track of lexical scopes associated with a user value's source 71d88c1a5aSDimitry Andric /// location. 72d88c1a5aSDimitry Andric class UserValueScopes { 73d88c1a5aSDimitry Andric DebugLoc DL; 74d88c1a5aSDimitry Andric LexicalScopes &LS; 75d88c1a5aSDimitry Andric SmallPtrSet<const MachineBasicBlock *, 4> LBlocks; 76d88c1a5aSDimitry Andric 77d88c1a5aSDimitry Andric public: 78d88c1a5aSDimitry Andric UserValueScopes(DebugLoc D, LexicalScopes &L) : DL(std::move(D)), LS(L) {} 79d88c1a5aSDimitry Andric 80d88c1a5aSDimitry Andric /// Return true if current scope dominates at least one machine 81d88c1a5aSDimitry Andric /// instruction in a given machine basic block. 82d88c1a5aSDimitry Andric bool dominates(MachineBasicBlock *MBB) { 83d88c1a5aSDimitry Andric if (LBlocks.empty()) 84d88c1a5aSDimitry Andric LS.getMachineBasicBlocks(DL, LBlocks); 85d88c1a5aSDimitry Andric return LBlocks.count(MBB) != 0 || LS.dominates(DL, MBB); 86d88c1a5aSDimitry Andric } 87d88c1a5aSDimitry Andric }; 887d523365SDimitry Andric 893ca95b02SDimitry Andric /// Based on std::pair so it can be used as an index into a DenseMap. 907d523365SDimitry Andric typedef std::pair<const DILocalVariable *, const DILocation *> 913ca95b02SDimitry Andric DebugVariableBase; 927d523365SDimitry Andric /// A potentially inlined instance of a variable. 933ca95b02SDimitry Andric struct DebugVariable : public DebugVariableBase { 943ca95b02SDimitry Andric DebugVariable(const DILocalVariable *Var, const DILocation *InlinedAt) 953ca95b02SDimitry Andric : DebugVariableBase(Var, InlinedAt) {} 967d523365SDimitry Andric 973ca95b02SDimitry Andric const DILocalVariable *getVar() const { return this->first; }; 983ca95b02SDimitry Andric const DILocation *getInlinedAt() const { return this->second; }; 997d523365SDimitry Andric 1003ca95b02SDimitry Andric bool operator<(const DebugVariable &DV) const { 1013ca95b02SDimitry Andric if (getVar() == DV.getVar()) 1023ca95b02SDimitry Andric return getInlinedAt() < DV.getInlinedAt(); 1033ca95b02SDimitry Andric return getVar() < DV.getVar(); 1047d523365SDimitry Andric } 1057d523365SDimitry Andric }; 1067d523365SDimitry Andric 1073ca95b02SDimitry Andric /// A pair of debug variable and value location. 1087d523365SDimitry Andric struct VarLoc { 1093ca95b02SDimitry Andric const DebugVariable Var; 1103ca95b02SDimitry Andric const MachineInstr &MI; ///< Only used for cloning a new DBG_VALUE. 111d88c1a5aSDimitry Andric mutable UserValueScopes UVS; 1123ca95b02SDimitry Andric enum { InvalidKind = 0, RegisterKind } Kind; 1137d523365SDimitry Andric 1143ca95b02SDimitry Andric /// The value location. Stored separately to avoid repeatedly 1153ca95b02SDimitry Andric /// extracting it from MI. 1163ca95b02SDimitry Andric union { 1173ca95b02SDimitry Andric struct { 1183ca95b02SDimitry Andric uint32_t RegNo; 1193ca95b02SDimitry Andric uint32_t Offset; 1203ca95b02SDimitry Andric } RegisterLoc; 1213ca95b02SDimitry Andric uint64_t Hash; 1223ca95b02SDimitry Andric } Loc; 1233ca95b02SDimitry Andric 124d88c1a5aSDimitry Andric VarLoc(const MachineInstr &MI, LexicalScopes &LS) 1253ca95b02SDimitry Andric : Var(MI.getDebugVariable(), MI.getDebugLoc()->getInlinedAt()), MI(MI), 126d88c1a5aSDimitry Andric UVS(MI.getDebugLoc(), LS), Kind(InvalidKind) { 1273ca95b02SDimitry Andric static_assert((sizeof(Loc) == sizeof(uint64_t)), 1283ca95b02SDimitry Andric "hash does not cover all members of Loc"); 1293ca95b02SDimitry Andric assert(MI.isDebugValue() && "not a DBG_VALUE"); 1303ca95b02SDimitry Andric assert(MI.getNumOperands() == 4 && "malformed DBG_VALUE"); 1313ca95b02SDimitry Andric if (int RegNo = isDbgValueDescribedByReg(MI)) { 1323ca95b02SDimitry Andric Kind = RegisterKind; 1333ca95b02SDimitry Andric Loc.RegisterLoc.RegNo = RegNo; 1347a7e6055SDimitry Andric int64_t Offset = 1353ca95b02SDimitry Andric MI.isIndirectDebugValue() ? MI.getOperand(1).getImm() : 0; 1363ca95b02SDimitry Andric // We don't support offsets larger than 4GiB here. They are 1373ca95b02SDimitry Andric // slated to be replaced with DIExpressions anyway. 1387a7e6055SDimitry Andric // With indirect debug values used for spill locations, Offset 1397a7e6055SDimitry Andric // can be negative. 1407a7e6055SDimitry Andric if (Offset == INT64_MIN || std::abs(Offset) >= (1LL << 32)) 1413ca95b02SDimitry Andric Kind = InvalidKind; 1423ca95b02SDimitry Andric else 1433ca95b02SDimitry Andric Loc.RegisterLoc.Offset = Offset; 1443ca95b02SDimitry Andric } 1453ca95b02SDimitry Andric } 1463ca95b02SDimitry Andric 1473ca95b02SDimitry Andric /// If this variable is described by a register, return it, 1483ca95b02SDimitry Andric /// otherwise return 0. 1493ca95b02SDimitry Andric unsigned isDescribedByReg() const { 1503ca95b02SDimitry Andric if (Kind == RegisterKind) 1513ca95b02SDimitry Andric return Loc.RegisterLoc.RegNo; 1523ca95b02SDimitry Andric return 0; 1533ca95b02SDimitry Andric } 1543ca95b02SDimitry Andric 155d88c1a5aSDimitry Andric /// Determine whether the lexical scope of this value's debug location 156d88c1a5aSDimitry Andric /// dominates MBB. 157d88c1a5aSDimitry Andric bool dominates(MachineBasicBlock &MBB) const { return UVS.dominates(&MBB); } 158d88c1a5aSDimitry Andric 1597a7e6055SDimitry Andric #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 1607a7e6055SDimitry Andric LLVM_DUMP_METHOD void dump() const { MI.dump(); } 1617a7e6055SDimitry Andric #endif 1623ca95b02SDimitry Andric 1633ca95b02SDimitry Andric bool operator==(const VarLoc &Other) const { 1643ca95b02SDimitry Andric return Var == Other.Var && Loc.Hash == Other.Loc.Hash; 1653ca95b02SDimitry Andric } 1663ca95b02SDimitry Andric 1673ca95b02SDimitry Andric /// This operator guarantees that VarLocs are sorted by Variable first. 1683ca95b02SDimitry Andric bool operator<(const VarLoc &Other) const { 1693ca95b02SDimitry Andric if (Var == Other.Var) 1703ca95b02SDimitry Andric return Loc.Hash < Other.Loc.Hash; 1713ca95b02SDimitry Andric return Var < Other.Var; 1723ca95b02SDimitry Andric } 1737d523365SDimitry Andric }; 1747d523365SDimitry Andric 1753ca95b02SDimitry Andric typedef UniqueVector<VarLoc> VarLocMap; 1763ca95b02SDimitry Andric typedef SparseBitVector<> VarLocSet; 1773ca95b02SDimitry Andric typedef SmallDenseMap<const MachineBasicBlock *, VarLocSet> VarLocInMBB; 1787a7e6055SDimitry Andric struct SpillDebugPair { 1797a7e6055SDimitry Andric MachineInstr *SpillInst; 1807a7e6055SDimitry Andric MachineInstr *DebugInst; 1817a7e6055SDimitry Andric }; 1827a7e6055SDimitry Andric typedef SmallVector<SpillDebugPair, 4> SpillMap; 1837d523365SDimitry Andric 1843ca95b02SDimitry Andric /// This holds the working set of currently open ranges. For fast 1853ca95b02SDimitry Andric /// access, this is done both as a set of VarLocIDs, and a map of 1863ca95b02SDimitry Andric /// DebugVariable to recent VarLocID. Note that a DBG_VALUE ends all 1873ca95b02SDimitry Andric /// previous open ranges for the same variable. 1883ca95b02SDimitry Andric class OpenRangesSet { 1893ca95b02SDimitry Andric VarLocSet VarLocs; 1903ca95b02SDimitry Andric SmallDenseMap<DebugVariableBase, unsigned, 8> Vars; 1917d523365SDimitry Andric 1923ca95b02SDimitry Andric public: 1933ca95b02SDimitry Andric const VarLocSet &getVarLocs() const { return VarLocs; } 1943ca95b02SDimitry Andric 1953ca95b02SDimitry Andric /// Terminate all open ranges for Var by removing it from the set. 1963ca95b02SDimitry Andric void erase(DebugVariable Var) { 1973ca95b02SDimitry Andric auto It = Vars.find(Var); 1983ca95b02SDimitry Andric if (It != Vars.end()) { 1993ca95b02SDimitry Andric unsigned ID = It->second; 2003ca95b02SDimitry Andric VarLocs.reset(ID); 2013ca95b02SDimitry Andric Vars.erase(It); 2023ca95b02SDimitry Andric } 2033ca95b02SDimitry Andric } 2043ca95b02SDimitry Andric 2053ca95b02SDimitry Andric /// Terminate all open ranges listed in \c KillSet by removing 2063ca95b02SDimitry Andric /// them from the set. 2073ca95b02SDimitry Andric void erase(const VarLocSet &KillSet, const VarLocMap &VarLocIDs) { 2083ca95b02SDimitry Andric VarLocs.intersectWithComplement(KillSet); 2093ca95b02SDimitry Andric for (unsigned ID : KillSet) 2103ca95b02SDimitry Andric Vars.erase(VarLocIDs[ID].Var); 2113ca95b02SDimitry Andric } 2123ca95b02SDimitry Andric 2133ca95b02SDimitry Andric /// Insert a new range into the set. 2143ca95b02SDimitry Andric void insert(unsigned VarLocID, DebugVariableBase Var) { 2153ca95b02SDimitry Andric VarLocs.set(VarLocID); 2163ca95b02SDimitry Andric Vars.insert({Var, VarLocID}); 2173ca95b02SDimitry Andric } 2183ca95b02SDimitry Andric 2193ca95b02SDimitry Andric /// Empty the set. 2203ca95b02SDimitry Andric void clear() { 2213ca95b02SDimitry Andric VarLocs.clear(); 2223ca95b02SDimitry Andric Vars.clear(); 2233ca95b02SDimitry Andric } 2243ca95b02SDimitry Andric 2253ca95b02SDimitry Andric /// Return whether the set is empty or not. 2263ca95b02SDimitry Andric bool empty() const { 2273ca95b02SDimitry Andric assert(Vars.empty() == VarLocs.empty() && "open ranges are inconsistent"); 2283ca95b02SDimitry Andric return VarLocs.empty(); 2293ca95b02SDimitry Andric } 2303ca95b02SDimitry Andric }; 2313ca95b02SDimitry Andric 2327a7e6055SDimitry Andric bool isSpillInstruction(const MachineInstr &MI, MachineFunction *MF, 2337a7e6055SDimitry Andric unsigned &Reg); 2347a7e6055SDimitry Andric int extractSpillBaseRegAndOffset(const MachineInstr &MI, unsigned &Reg); 2357a7e6055SDimitry Andric 2363ca95b02SDimitry Andric void transferDebugValue(const MachineInstr &MI, OpenRangesSet &OpenRanges, 2373ca95b02SDimitry Andric VarLocMap &VarLocIDs); 2387a7e6055SDimitry Andric void transferSpillInst(MachineInstr &MI, OpenRangesSet &OpenRanges, 2397a7e6055SDimitry Andric VarLocMap &VarLocIDs, SpillMap &Spills); 2403ca95b02SDimitry Andric void transferRegisterDef(MachineInstr &MI, OpenRangesSet &OpenRanges, 2413ca95b02SDimitry Andric const VarLocMap &VarLocIDs); 2423ca95b02SDimitry Andric bool transferTerminatorInst(MachineInstr &MI, OpenRangesSet &OpenRanges, 2433ca95b02SDimitry Andric VarLocInMBB &OutLocs, const VarLocMap &VarLocIDs); 2443ca95b02SDimitry Andric bool transfer(MachineInstr &MI, OpenRangesSet &OpenRanges, 2457a7e6055SDimitry Andric VarLocInMBB &OutLocs, VarLocMap &VarLocIDs, SpillMap &Spills, 2467a7e6055SDimitry Andric bool transferSpills); 2473ca95b02SDimitry Andric 2483ca95b02SDimitry Andric bool join(MachineBasicBlock &MBB, VarLocInMBB &OutLocs, VarLocInMBB &InLocs, 249d88c1a5aSDimitry Andric const VarLocMap &VarLocIDs, 250d88c1a5aSDimitry Andric SmallPtrSet<const MachineBasicBlock *, 16> &Visited); 2517d523365SDimitry Andric 2527d523365SDimitry Andric bool ExtendRanges(MachineFunction &MF); 2537d523365SDimitry Andric 2547d523365SDimitry Andric public: 2557d523365SDimitry Andric static char ID; 2567d523365SDimitry Andric 2577d523365SDimitry Andric /// Default construct and initialize the pass. 2587d523365SDimitry Andric LiveDebugValues(); 2597d523365SDimitry Andric 2607d523365SDimitry Andric /// Tell the pass manager which passes we depend on and what 2617d523365SDimitry Andric /// information we preserve. 2627d523365SDimitry Andric void getAnalysisUsage(AnalysisUsage &AU) const override; 2637d523365SDimitry Andric 2643ca95b02SDimitry Andric MachineFunctionProperties getRequiredProperties() const override { 2653ca95b02SDimitry Andric return MachineFunctionProperties().set( 266d88c1a5aSDimitry Andric MachineFunctionProperties::Property::NoVRegs); 2673ca95b02SDimitry Andric } 2683ca95b02SDimitry Andric 2697d523365SDimitry Andric /// Print to ostream with a message. 2703ca95b02SDimitry Andric void printVarLocInMBB(const MachineFunction &MF, const VarLocInMBB &V, 2713ca95b02SDimitry Andric const VarLocMap &VarLocIDs, const char *msg, 2727d523365SDimitry Andric raw_ostream &Out) const; 2737d523365SDimitry Andric 2747d523365SDimitry Andric /// Calculate the liveness information for the given machine function. 2757d523365SDimitry Andric bool runOnMachineFunction(MachineFunction &MF) override; 2767d523365SDimitry Andric }; 277d88c1a5aSDimitry Andric 2787d523365SDimitry Andric } // namespace 2797d523365SDimitry Andric 2807d523365SDimitry Andric //===----------------------------------------------------------------------===// 2817d523365SDimitry Andric // Implementation 2827d523365SDimitry Andric //===----------------------------------------------------------------------===// 2837d523365SDimitry Andric 2847d523365SDimitry Andric char LiveDebugValues::ID = 0; 2857d523365SDimitry Andric char &llvm::LiveDebugValuesID = LiveDebugValues::ID; 286302affcbSDimitry Andric INITIALIZE_PASS(LiveDebugValues, DEBUG_TYPE, "Live DEBUG_VALUE analysis", 2877d523365SDimitry Andric false, false) 2887d523365SDimitry Andric 2897d523365SDimitry Andric /// Default construct and initialize the pass. 2907d523365SDimitry Andric LiveDebugValues::LiveDebugValues() : MachineFunctionPass(ID) { 2917d523365SDimitry Andric initializeLiveDebugValuesPass(*PassRegistry::getPassRegistry()); 2927d523365SDimitry Andric } 2937d523365SDimitry Andric 2947d523365SDimitry Andric /// Tell the pass manager which passes we depend on and what information we 2957d523365SDimitry Andric /// preserve. 2967d523365SDimitry Andric void LiveDebugValues::getAnalysisUsage(AnalysisUsage &AU) const { 2973ca95b02SDimitry Andric AU.setPreservesCFG(); 2987d523365SDimitry Andric MachineFunctionPass::getAnalysisUsage(AU); 2997d523365SDimitry Andric } 3007d523365SDimitry Andric 3017d523365SDimitry Andric //===----------------------------------------------------------------------===// 3027d523365SDimitry Andric // Debug Range Extension Implementation 3037d523365SDimitry Andric //===----------------------------------------------------------------------===// 3047d523365SDimitry Andric 3057a7e6055SDimitry Andric #ifndef NDEBUG 3063ca95b02SDimitry Andric void LiveDebugValues::printVarLocInMBB(const MachineFunction &MF, 3073ca95b02SDimitry Andric const VarLocInMBB &V, 3083ca95b02SDimitry Andric const VarLocMap &VarLocIDs, 3093ca95b02SDimitry Andric const char *msg, 3107d523365SDimitry Andric raw_ostream &Out) const { 311d88c1a5aSDimitry Andric Out << '\n' << msg << '\n'; 3123ca95b02SDimitry Andric for (const MachineBasicBlock &BB : MF) { 3133ca95b02SDimitry Andric const auto &L = V.lookup(&BB); 3143ca95b02SDimitry Andric Out << "MBB: " << BB.getName() << ":\n"; 3153ca95b02SDimitry Andric for (unsigned VLL : L) { 3163ca95b02SDimitry Andric const VarLoc &VL = VarLocIDs[VLL]; 3173ca95b02SDimitry Andric Out << " Var: " << VL.Var.getVar()->getName(); 3187d523365SDimitry Andric Out << " MI: "; 3193ca95b02SDimitry Andric VL.dump(); 3207d523365SDimitry Andric } 3217d523365SDimitry Andric } 3227d523365SDimitry Andric Out << "\n"; 3237d523365SDimitry Andric } 3247a7e6055SDimitry Andric #endif 3257a7e6055SDimitry Andric 3267a7e6055SDimitry Andric /// Given a spill instruction, extract the register and offset used to 3277a7e6055SDimitry Andric /// address the spill location in a target independent way. 3287a7e6055SDimitry Andric int LiveDebugValues::extractSpillBaseRegAndOffset(const MachineInstr &MI, 3297a7e6055SDimitry Andric unsigned &Reg) { 3307a7e6055SDimitry Andric assert(MI.hasOneMemOperand() && 3317a7e6055SDimitry Andric "Spill instruction does not have exactly one memory operand?"); 3327a7e6055SDimitry Andric auto MMOI = MI.memoperands_begin(); 3337a7e6055SDimitry Andric const PseudoSourceValue *PVal = (*MMOI)->getPseudoValue(); 3347a7e6055SDimitry Andric assert(PVal->kind() == PseudoSourceValue::FixedStack && 3357a7e6055SDimitry Andric "Inconsistent memory operand in spill instruction"); 3367a7e6055SDimitry Andric int FI = cast<FixedStackPseudoSourceValue>(PVal)->getFrameIndex(); 3377a7e6055SDimitry Andric const MachineBasicBlock *MBB = MI.getParent(); 3387a7e6055SDimitry Andric return TFI->getFrameIndexReference(*MBB->getParent(), FI, Reg); 3397a7e6055SDimitry Andric } 3407d523365SDimitry Andric 3417d523365SDimitry Andric /// End all previous ranges related to @MI and start a new range from @MI 3427d523365SDimitry Andric /// if it is a DBG_VALUE instr. 3433ca95b02SDimitry Andric void LiveDebugValues::transferDebugValue(const MachineInstr &MI, 3443ca95b02SDimitry Andric OpenRangesSet &OpenRanges, 3453ca95b02SDimitry Andric VarLocMap &VarLocIDs) { 3467d523365SDimitry Andric if (!MI.isDebugValue()) 3477d523365SDimitry Andric return; 3483ca95b02SDimitry Andric const DILocalVariable *Var = MI.getDebugVariable(); 3493ca95b02SDimitry Andric const DILocation *DebugLoc = MI.getDebugLoc(); 3503ca95b02SDimitry Andric const DILocation *InlinedAt = DebugLoc->getInlinedAt(); 3513ca95b02SDimitry Andric assert(Var->isValidLocationForIntrinsic(DebugLoc) && 3527d523365SDimitry Andric "Expected inlined-at fields to agree"); 3537d523365SDimitry Andric 3547d523365SDimitry Andric // End all previous ranges of Var. 3553ca95b02SDimitry Andric DebugVariable V(Var, InlinedAt); 3563ca95b02SDimitry Andric OpenRanges.erase(V); 3577d523365SDimitry Andric 3583ca95b02SDimitry Andric // Add the VarLoc to OpenRanges from this DBG_VALUE. 3597d523365SDimitry Andric // TODO: Currently handles DBG_VALUE which has only reg as location. 3603ca95b02SDimitry Andric if (isDbgValueDescribedByReg(MI)) { 361d88c1a5aSDimitry Andric VarLoc VL(MI, LS); 3623ca95b02SDimitry Andric unsigned ID = VarLocIDs.insert(VL); 3633ca95b02SDimitry Andric OpenRanges.insert(ID, VL.Var); 3647d523365SDimitry Andric } 3657d523365SDimitry Andric } 3667d523365SDimitry Andric 3677d523365SDimitry Andric /// A definition of a register may mark the end of a range. 3687d523365SDimitry Andric void LiveDebugValues::transferRegisterDef(MachineInstr &MI, 3693ca95b02SDimitry Andric OpenRangesSet &OpenRanges, 3703ca95b02SDimitry Andric const VarLocMap &VarLocIDs) { 3713ca95b02SDimitry Andric MachineFunction *MF = MI.getParent()->getParent(); 3723ca95b02SDimitry Andric const TargetLowering *TLI = MF->getSubtarget().getTargetLowering(); 3733ca95b02SDimitry Andric unsigned SP = TLI->getStackPointerRegisterToSaveRestore(); 3743ca95b02SDimitry Andric SparseBitVector<> KillSet; 3757d523365SDimitry Andric for (const MachineOperand &MO : MI.operands()) { 3767a7e6055SDimitry Andric // Determine whether the operand is a register def. Assume that call 3777a7e6055SDimitry Andric // instructions never clobber SP, because some backends (e.g., AArch64) 3787a7e6055SDimitry Andric // never list SP in the regmask. 3793ca95b02SDimitry Andric if (MO.isReg() && MO.isDef() && MO.getReg() && 3807a7e6055SDimitry Andric TRI->isPhysicalRegister(MO.getReg()) && 3817a7e6055SDimitry Andric !(MI.isCall() && MO.getReg() == SP)) { 3827d523365SDimitry Andric // Remove ranges of all aliased registers. 3837d523365SDimitry Andric for (MCRegAliasIterator RAI(MO.getReg(), TRI, true); RAI.isValid(); ++RAI) 3843ca95b02SDimitry Andric for (unsigned ID : OpenRanges.getVarLocs()) 3853ca95b02SDimitry Andric if (VarLocIDs[ID].isDescribedByReg() == *RAI) 3863ca95b02SDimitry Andric KillSet.set(ID); 3873ca95b02SDimitry Andric } else if (MO.isRegMask()) { 3883ca95b02SDimitry Andric // Remove ranges of all clobbered registers. Register masks don't usually 3893ca95b02SDimitry Andric // list SP as preserved. While the debug info may be off for an 3903ca95b02SDimitry Andric // instruction or two around callee-cleanup calls, transferring the 3913ca95b02SDimitry Andric // DEBUG_VALUE across the call is still a better user experience. 3923ca95b02SDimitry Andric for (unsigned ID : OpenRanges.getVarLocs()) { 3933ca95b02SDimitry Andric unsigned Reg = VarLocIDs[ID].isDescribedByReg(); 3943ca95b02SDimitry Andric if (Reg && Reg != SP && MO.clobbersPhysReg(Reg)) 3953ca95b02SDimitry Andric KillSet.set(ID); 3967d523365SDimitry Andric } 3977d523365SDimitry Andric } 3983ca95b02SDimitry Andric } 3993ca95b02SDimitry Andric OpenRanges.erase(KillSet, VarLocIDs); 4003ca95b02SDimitry Andric } 4017d523365SDimitry Andric 4027a7e6055SDimitry Andric /// Decide if @MI is a spill instruction and return true if it is. We use 2 4037a7e6055SDimitry Andric /// criteria to make this decision: 4047a7e6055SDimitry Andric /// - Is this instruction a store to a spill slot? 4057a7e6055SDimitry Andric /// - Is there a register operand that is both used and killed? 4067a7e6055SDimitry Andric /// TODO: Store optimization can fold spills into other stores (including 4077a7e6055SDimitry Andric /// other spills). We do not handle this yet (more than one memory operand). 4087a7e6055SDimitry Andric bool LiveDebugValues::isSpillInstruction(const MachineInstr &MI, 4097a7e6055SDimitry Andric MachineFunction *MF, unsigned &Reg) { 4107a7e6055SDimitry Andric const MachineFrameInfo &FrameInfo = MF->getFrameInfo(); 4117a7e6055SDimitry Andric int FI; 4127a7e6055SDimitry Andric const MachineMemOperand *MMO; 4137a7e6055SDimitry Andric 4147a7e6055SDimitry Andric // TODO: Handle multiple stores folded into one. 4157a7e6055SDimitry Andric if (!MI.hasOneMemOperand()) 4167a7e6055SDimitry Andric return false; 4177a7e6055SDimitry Andric 4187a7e6055SDimitry Andric // To identify a spill instruction, use the same criteria as in AsmPrinter. 4197a7e6055SDimitry Andric if (!((TII->isStoreToStackSlotPostFE(MI, FI) || 4207a7e6055SDimitry Andric TII->hasStoreToStackSlot(MI, MMO, FI)) && 4217a7e6055SDimitry Andric FrameInfo.isSpillSlotObjectIndex(FI))) 4227a7e6055SDimitry Andric return false; 4237a7e6055SDimitry Andric 4247a7e6055SDimitry Andric // In a spill instruction generated by the InlineSpiller the spilled register 4257a7e6055SDimitry Andric // has its kill flag set. Return false if we don't find such a register. 4267a7e6055SDimitry Andric Reg = 0; 4277a7e6055SDimitry Andric for (const MachineOperand &MO : MI.operands()) { 4287a7e6055SDimitry Andric if (MO.isReg() && MO.isUse() && MO.isKill()) { 4297a7e6055SDimitry Andric Reg = MO.getReg(); 4307a7e6055SDimitry Andric break; 4317a7e6055SDimitry Andric } 4327a7e6055SDimitry Andric } 4337a7e6055SDimitry Andric return Reg != 0; 4347a7e6055SDimitry Andric } 4357a7e6055SDimitry Andric 4367a7e6055SDimitry Andric /// A spilled register may indicate that we have to end the current range of 4377a7e6055SDimitry Andric /// a variable and create a new one for the spill location. 4387a7e6055SDimitry Andric /// We don't want to insert any instructions in transfer(), so we just create 4397a7e6055SDimitry Andric /// the DBG_VALUE witout inserting it and keep track of it in @Spills. 4407a7e6055SDimitry Andric /// It will be inserted into the BB when we're done iterating over the 4417a7e6055SDimitry Andric /// instructions. 4427a7e6055SDimitry Andric void LiveDebugValues::transferSpillInst(MachineInstr &MI, 4437a7e6055SDimitry Andric OpenRangesSet &OpenRanges, 4447a7e6055SDimitry Andric VarLocMap &VarLocIDs, 4457a7e6055SDimitry Andric SpillMap &Spills) { 4467a7e6055SDimitry Andric unsigned Reg; 4477a7e6055SDimitry Andric MachineFunction *MF = MI.getParent()->getParent(); 4487a7e6055SDimitry Andric if (!isSpillInstruction(MI, MF, Reg)) 4497a7e6055SDimitry Andric return; 4507a7e6055SDimitry Andric 4517a7e6055SDimitry Andric // Check if the register is the location of a debug value. 4527a7e6055SDimitry Andric for (unsigned ID : OpenRanges.getVarLocs()) { 4537a7e6055SDimitry Andric if (VarLocIDs[ID].isDescribedByReg() == Reg) { 4547a7e6055SDimitry Andric DEBUG(dbgs() << "Spilling Register " << PrintReg(Reg, TRI) << '(' 4557a7e6055SDimitry Andric << VarLocIDs[ID].Var.getVar()->getName() << ")\n"); 4567a7e6055SDimitry Andric 4577a7e6055SDimitry Andric // Create a DBG_VALUE instruction to describe the Var in its spilled 4587a7e6055SDimitry Andric // location, but don't insert it yet to avoid invalidating the 4597a7e6055SDimitry Andric // iterator in our caller. 4607a7e6055SDimitry Andric unsigned SpillBase; 4617a7e6055SDimitry Andric int SpillOffset = extractSpillBaseRegAndOffset(MI, SpillBase); 4627a7e6055SDimitry Andric const MachineInstr *DMI = &VarLocIDs[ID].MI; 4637a7e6055SDimitry Andric MachineInstr *SpDMI = 4647a7e6055SDimitry Andric BuildMI(*MF, DMI->getDebugLoc(), DMI->getDesc(), true, SpillBase, 0, 4657a7e6055SDimitry Andric DMI->getDebugVariable(), DMI->getDebugExpression()); 4667a7e6055SDimitry Andric SpDMI->getOperand(1).setImm(SpillOffset); 4677a7e6055SDimitry Andric DEBUG(dbgs() << "Creating DBG_VALUE inst for spill: "; 4687a7e6055SDimitry Andric SpDMI->print(dbgs(), false, TII)); 4697a7e6055SDimitry Andric 4707a7e6055SDimitry Andric // The newly created DBG_VALUE instruction SpDMI must be inserted after 4717a7e6055SDimitry Andric // MI. Keep track of the pairing. 4727a7e6055SDimitry Andric SpillDebugPair MIP = {&MI, SpDMI}; 4737a7e6055SDimitry Andric Spills.push_back(MIP); 4747a7e6055SDimitry Andric 4757a7e6055SDimitry Andric // End all previous ranges of Var. 4767a7e6055SDimitry Andric OpenRanges.erase(VarLocIDs[ID].Var); 4777a7e6055SDimitry Andric 4787a7e6055SDimitry Andric // Add the VarLoc to OpenRanges. 4797a7e6055SDimitry Andric VarLoc VL(*SpDMI, LS); 4807a7e6055SDimitry Andric unsigned SpillLocID = VarLocIDs.insert(VL); 4817a7e6055SDimitry Andric OpenRanges.insert(SpillLocID, VL.Var); 4827a7e6055SDimitry Andric return; 4837a7e6055SDimitry Andric } 4847a7e6055SDimitry Andric } 4857a7e6055SDimitry Andric } 4867a7e6055SDimitry Andric 4877d523365SDimitry Andric /// Terminate all open ranges at the end of the current basic block. 488444ed5c5SDimitry Andric bool LiveDebugValues::transferTerminatorInst(MachineInstr &MI, 4893ca95b02SDimitry Andric OpenRangesSet &OpenRanges, 4903ca95b02SDimitry Andric VarLocInMBB &OutLocs, 4913ca95b02SDimitry Andric const VarLocMap &VarLocIDs) { 492444ed5c5SDimitry Andric bool Changed = false; 4937d523365SDimitry Andric const MachineBasicBlock *CurMBB = MI.getParent(); 4947d523365SDimitry Andric if (!(MI.isTerminator() || (&MI == &CurMBB->instr_back()))) 495444ed5c5SDimitry Andric return false; 4967d523365SDimitry Andric 4977d523365SDimitry Andric if (OpenRanges.empty()) 498444ed5c5SDimitry Andric return false; 4997d523365SDimitry Andric 5003ca95b02SDimitry Andric DEBUG(for (unsigned ID : OpenRanges.getVarLocs()) { 5017d523365SDimitry Andric // Copy OpenRanges to OutLocs, if not already present. 5023ca95b02SDimitry Andric dbgs() << "Add to OutLocs: "; VarLocIDs[ID].dump(); 5033ca95b02SDimitry Andric }); 5043ca95b02SDimitry Andric VarLocSet &VLS = OutLocs[CurMBB]; 5053ca95b02SDimitry Andric Changed = VLS |= OpenRanges.getVarLocs(); 5067d523365SDimitry Andric OpenRanges.clear(); 507444ed5c5SDimitry Andric return Changed; 5087d523365SDimitry Andric } 5097d523365SDimitry Andric 5107d523365SDimitry Andric /// This routine creates OpenRanges and OutLocs. 5113ca95b02SDimitry Andric bool LiveDebugValues::transfer(MachineInstr &MI, OpenRangesSet &OpenRanges, 5127a7e6055SDimitry Andric VarLocInMBB &OutLocs, VarLocMap &VarLocIDs, 5137a7e6055SDimitry Andric SpillMap &Spills, bool transferSpills) { 514444ed5c5SDimitry Andric bool Changed = false; 5153ca95b02SDimitry Andric transferDebugValue(MI, OpenRanges, VarLocIDs); 5163ca95b02SDimitry Andric transferRegisterDef(MI, OpenRanges, VarLocIDs); 5177a7e6055SDimitry Andric if (transferSpills) 5187a7e6055SDimitry Andric transferSpillInst(MI, OpenRanges, VarLocIDs, Spills); 5193ca95b02SDimitry Andric Changed = transferTerminatorInst(MI, OpenRanges, OutLocs, VarLocIDs); 520444ed5c5SDimitry Andric return Changed; 5217d523365SDimitry Andric } 5227d523365SDimitry Andric 5237d523365SDimitry Andric /// This routine joins the analysis results of all incoming edges in @MBB by 5247d523365SDimitry Andric /// inserting a new DBG_VALUE instruction at the start of the @MBB - if the same 5257d523365SDimitry Andric /// source variable in all the predecessors of @MBB reside in the same location. 526444ed5c5SDimitry Andric bool LiveDebugValues::join(MachineBasicBlock &MBB, VarLocInMBB &OutLocs, 527d88c1a5aSDimitry Andric VarLocInMBB &InLocs, const VarLocMap &VarLocIDs, 528d88c1a5aSDimitry Andric SmallPtrSet<const MachineBasicBlock *, 16> &Visited) { 5297d523365SDimitry Andric DEBUG(dbgs() << "join MBB: " << MBB.getName() << "\n"); 530444ed5c5SDimitry Andric bool Changed = false; 5317d523365SDimitry Andric 5323ca95b02SDimitry Andric VarLocSet InLocsT; // Temporary incoming locations. 5337d523365SDimitry Andric 5343ca95b02SDimitry Andric // For all predecessors of this MBB, find the set of VarLocs that 5353ca95b02SDimitry Andric // can be joined. 536d88c1a5aSDimitry Andric int NumVisited = 0; 5377d523365SDimitry Andric for (auto p : MBB.predecessors()) { 538d88c1a5aSDimitry Andric // Ignore unvisited predecessor blocks. As we are processing 539d88c1a5aSDimitry Andric // the blocks in reverse post-order any unvisited block can 540d88c1a5aSDimitry Andric // be considered to not remove any incoming values. 541d88c1a5aSDimitry Andric if (!Visited.count(p)) 542d88c1a5aSDimitry Andric continue; 5437d523365SDimitry Andric auto OL = OutLocs.find(p); 5447d523365SDimitry Andric // Join is null in case of empty OutLocs from any of the pred. 5457d523365SDimitry Andric if (OL == OutLocs.end()) 546444ed5c5SDimitry Andric return false; 5477d523365SDimitry Andric 548d88c1a5aSDimitry Andric // Just copy over the Out locs to incoming locs for the first visited 549d88c1a5aSDimitry Andric // predecessor, and for all other predecessors join the Out locs. 550d88c1a5aSDimitry Andric if (!NumVisited) 5517d523365SDimitry Andric InLocsT = OL->second; 552d88c1a5aSDimitry Andric else 5533ca95b02SDimitry Andric InLocsT &= OL->second; 554d88c1a5aSDimitry Andric NumVisited++; 5557d523365SDimitry Andric } 5567d523365SDimitry Andric 557d88c1a5aSDimitry Andric // Filter out DBG_VALUES that are out of scope. 558d88c1a5aSDimitry Andric VarLocSet KillSet; 559d88c1a5aSDimitry Andric for (auto ID : InLocsT) 560d88c1a5aSDimitry Andric if (!VarLocIDs[ID].dominates(MBB)) 561d88c1a5aSDimitry Andric KillSet.set(ID); 562d88c1a5aSDimitry Andric InLocsT.intersectWithComplement(KillSet); 563d88c1a5aSDimitry Andric 564d88c1a5aSDimitry Andric // As we are processing blocks in reverse post-order we 565d88c1a5aSDimitry Andric // should have processed at least one predecessor, unless it 566d88c1a5aSDimitry Andric // is the entry block which has no predecessor. 567d88c1a5aSDimitry Andric assert((NumVisited || MBB.pred_empty()) && 568d88c1a5aSDimitry Andric "Should have processed at least one predecessor"); 5697d523365SDimitry Andric if (InLocsT.empty()) 570444ed5c5SDimitry Andric return false; 5717d523365SDimitry Andric 5723ca95b02SDimitry Andric VarLocSet &ILS = InLocs[&MBB]; 5737d523365SDimitry Andric 5747d523365SDimitry Andric // Insert DBG_VALUE instructions, if not already inserted. 5753ca95b02SDimitry Andric VarLocSet Diff = InLocsT; 5763ca95b02SDimitry Andric Diff.intersectWithComplement(ILS); 5773ca95b02SDimitry Andric for (auto ID : Diff) { 5787d523365SDimitry Andric // This VarLoc is not found in InLocs i.e. it is not yet inserted. So, a 5797d523365SDimitry Andric // new range is started for the var from the mbb's beginning by inserting 5807d523365SDimitry Andric // a new DBG_VALUE. transfer() will end this range however appropriate. 5813ca95b02SDimitry Andric const VarLoc &DiffIt = VarLocIDs[ID]; 5823ca95b02SDimitry Andric const MachineInstr *DMI = &DiffIt.MI; 5837d523365SDimitry Andric MachineInstr *MI = 5847d523365SDimitry Andric BuildMI(MBB, MBB.instr_begin(), DMI->getDebugLoc(), DMI->getDesc(), 5857d523365SDimitry Andric DMI->isIndirectDebugValue(), DMI->getOperand(0).getReg(), 0, 5867d523365SDimitry Andric DMI->getDebugVariable(), DMI->getDebugExpression()); 5877d523365SDimitry Andric if (DMI->isIndirectDebugValue()) 5887d523365SDimitry Andric MI->getOperand(1).setImm(DMI->getOperand(1).getImm()); 5897d523365SDimitry Andric DEBUG(dbgs() << "Inserted: "; MI->dump();); 5903ca95b02SDimitry Andric ILS.set(ID); 5917d523365SDimitry Andric ++NumInserted; 592444ed5c5SDimitry Andric Changed = true; 5937d523365SDimitry Andric } 594444ed5c5SDimitry Andric return Changed; 5957d523365SDimitry Andric } 5967d523365SDimitry Andric 5977d523365SDimitry Andric /// Calculate the liveness information for the given machine function and 5987d523365SDimitry Andric /// extend ranges across basic blocks. 5997d523365SDimitry Andric bool LiveDebugValues::ExtendRanges(MachineFunction &MF) { 6007d523365SDimitry Andric 6017d523365SDimitry Andric DEBUG(dbgs() << "\nDebug Range Extension\n"); 6027d523365SDimitry Andric 6037d523365SDimitry Andric bool Changed = false; 604444ed5c5SDimitry Andric bool OLChanged = false; 605444ed5c5SDimitry Andric bool MBBJoined = false; 6067d523365SDimitry Andric 6073ca95b02SDimitry Andric VarLocMap VarLocIDs; // Map VarLoc<>unique ID for use in bitvectors. 6083ca95b02SDimitry Andric OpenRangesSet OpenRanges; // Ranges that are open until end of bb. 6097d523365SDimitry Andric VarLocInMBB OutLocs; // Ranges that exist beyond bb. 6107d523365SDimitry Andric VarLocInMBB InLocs; // Ranges that are incoming after joining. 6117a7e6055SDimitry Andric SpillMap Spills; // DBG_VALUEs associated with spills. 6127d523365SDimitry Andric 613444ed5c5SDimitry Andric DenseMap<unsigned int, MachineBasicBlock *> OrderToBB; 614444ed5c5SDimitry Andric DenseMap<MachineBasicBlock *, unsigned int> BBToOrder; 615444ed5c5SDimitry Andric std::priority_queue<unsigned int, std::vector<unsigned int>, 6163ca95b02SDimitry Andric std::greater<unsigned int>> 6173ca95b02SDimitry Andric Worklist; 618444ed5c5SDimitry Andric std::priority_queue<unsigned int, std::vector<unsigned int>, 6193ca95b02SDimitry Andric std::greater<unsigned int>> 6203ca95b02SDimitry Andric Pending; 6213ca95b02SDimitry Andric 6227d523365SDimitry Andric // Initialize every mbb with OutLocs. 6237a7e6055SDimitry Andric // We are not looking at any spill instructions during the initial pass 6247a7e6055SDimitry Andric // over the BBs. The LiveDebugVariables pass has already created DBG_VALUE 6257a7e6055SDimitry Andric // instructions for spills of registers that are known to be user variables 6267a7e6055SDimitry Andric // within the BB in which the spill occurs. 6277d523365SDimitry Andric for (auto &MBB : MF) 6287d523365SDimitry Andric for (auto &MI : MBB) 6297a7e6055SDimitry Andric transfer(MI, OpenRanges, OutLocs, VarLocIDs, Spills, 6307a7e6055SDimitry Andric /*transferSpills=*/false); 6313ca95b02SDimitry Andric 6323ca95b02SDimitry Andric DEBUG(printVarLocInMBB(MF, OutLocs, VarLocIDs, "OutLocs after initialization", 6333ca95b02SDimitry Andric dbgs())); 6347d523365SDimitry Andric 635444ed5c5SDimitry Andric ReversePostOrderTraversal<MachineFunction *> RPOT(&MF); 636444ed5c5SDimitry Andric unsigned int RPONumber = 0; 637444ed5c5SDimitry Andric for (auto RI = RPOT.begin(), RE = RPOT.end(); RI != RE; ++RI) { 638444ed5c5SDimitry Andric OrderToBB[RPONumber] = *RI; 639444ed5c5SDimitry Andric BBToOrder[*RI] = RPONumber; 640444ed5c5SDimitry Andric Worklist.push(RPONumber); 641444ed5c5SDimitry Andric ++RPONumber; 642444ed5c5SDimitry Andric } 643444ed5c5SDimitry Andric // This is a standard "union of predecessor outs" dataflow problem. 644444ed5c5SDimitry Andric // To solve it, we perform join() and transfer() using the two worklist method 645444ed5c5SDimitry Andric // until the ranges converge. 646444ed5c5SDimitry Andric // Ranges have converged when both worklists are empty. 647d88c1a5aSDimitry Andric SmallPtrSet<const MachineBasicBlock *, 16> Visited; 648444ed5c5SDimitry Andric while (!Worklist.empty() || !Pending.empty()) { 649444ed5c5SDimitry Andric // We track what is on the pending worklist to avoid inserting the same 650444ed5c5SDimitry Andric // thing twice. We could avoid this with a custom priority queue, but this 651444ed5c5SDimitry Andric // is probably not worth it. 652444ed5c5SDimitry Andric SmallPtrSet<MachineBasicBlock *, 16> OnPending; 653d88c1a5aSDimitry Andric DEBUG(dbgs() << "Processing Worklist\n"); 654444ed5c5SDimitry Andric while (!Worklist.empty()) { 655444ed5c5SDimitry Andric MachineBasicBlock *MBB = OrderToBB[Worklist.top()]; 656444ed5c5SDimitry Andric Worklist.pop(); 657d88c1a5aSDimitry Andric MBBJoined = join(*MBB, OutLocs, InLocs, VarLocIDs, Visited); 658d88c1a5aSDimitry Andric Visited.insert(MBB); 6597d523365SDimitry Andric if (MBBJoined) { 660444ed5c5SDimitry Andric MBBJoined = false; 6617d523365SDimitry Andric Changed = true; 6627a7e6055SDimitry Andric // Now that we have started to extend ranges across BBs we need to 6637a7e6055SDimitry Andric // examine spill instructions to see whether they spill registers that 6647a7e6055SDimitry Andric // correspond to user variables. 6657d523365SDimitry Andric for (auto &MI : *MBB) 6667a7e6055SDimitry Andric OLChanged |= transfer(MI, OpenRanges, OutLocs, VarLocIDs, Spills, 6677a7e6055SDimitry Andric /*transferSpills=*/true); 6687a7e6055SDimitry Andric 6697a7e6055SDimitry Andric // Add any DBG_VALUE instructions necessitated by spills. 6707a7e6055SDimitry Andric for (auto &SP : Spills) 6717a7e6055SDimitry Andric MBB->insertAfter(MachineBasicBlock::iterator(*SP.SpillInst), 6727a7e6055SDimitry Andric SP.DebugInst); 6737a7e6055SDimitry Andric Spills.clear(); 6743ca95b02SDimitry Andric 6753ca95b02SDimitry Andric DEBUG(printVarLocInMBB(MF, OutLocs, VarLocIDs, 6763ca95b02SDimitry Andric "OutLocs after propagating", dbgs())); 6773ca95b02SDimitry Andric DEBUG(printVarLocInMBB(MF, InLocs, VarLocIDs, 6783ca95b02SDimitry Andric "InLocs after propagating", dbgs())); 6797d523365SDimitry Andric 6807d523365SDimitry Andric if (OLChanged) { 6817d523365SDimitry Andric OLChanged = false; 6827d523365SDimitry Andric for (auto s : MBB->successors()) 6833ca95b02SDimitry Andric if (OnPending.insert(s).second) { 684444ed5c5SDimitry Andric Pending.push(BBToOrder[s]); 6857d523365SDimitry Andric } 6867d523365SDimitry Andric } 6877d523365SDimitry Andric } 688444ed5c5SDimitry Andric } 689444ed5c5SDimitry Andric Worklist.swap(Pending); 690444ed5c5SDimitry Andric // At this point, pending must be empty, since it was just the empty 691444ed5c5SDimitry Andric // worklist 692444ed5c5SDimitry Andric assert(Pending.empty() && "Pending should be empty"); 693444ed5c5SDimitry Andric } 694444ed5c5SDimitry Andric 6953ca95b02SDimitry Andric DEBUG(printVarLocInMBB(MF, OutLocs, VarLocIDs, "Final OutLocs", dbgs())); 6963ca95b02SDimitry Andric DEBUG(printVarLocInMBB(MF, InLocs, VarLocIDs, "Final InLocs", dbgs())); 6977d523365SDimitry Andric return Changed; 6987d523365SDimitry Andric } 6997d523365SDimitry Andric 7007d523365SDimitry Andric bool LiveDebugValues::runOnMachineFunction(MachineFunction &MF) { 701d88c1a5aSDimitry Andric if (!MF.getFunction()->getSubprogram()) 702d88c1a5aSDimitry Andric // LiveDebugValues will already have removed all DBG_VALUEs. 703d88c1a5aSDimitry Andric return false; 704d88c1a5aSDimitry Andric 7057d523365SDimitry Andric TRI = MF.getSubtarget().getRegisterInfo(); 7067d523365SDimitry Andric TII = MF.getSubtarget().getInstrInfo(); 7077a7e6055SDimitry Andric TFI = MF.getSubtarget().getFrameLowering(); 708d88c1a5aSDimitry Andric LS.initialize(MF); 7097d523365SDimitry Andric 710d88c1a5aSDimitry Andric bool Changed = ExtendRanges(MF); 7117d523365SDimitry Andric return Changed; 7127d523365SDimitry Andric } 713