1d88c1a5aSDimitry Andric //===-- BranchRelaxation.cpp ----------------------------------------------===// 2d88c1a5aSDimitry Andric // 3d88c1a5aSDimitry Andric // The LLVM Compiler Infrastructure 4d88c1a5aSDimitry Andric // 5d88c1a5aSDimitry Andric // This file is distributed under the University of Illinois Open Source 6d88c1a5aSDimitry Andric // License. See LICENSE.TXT for details. 7d88c1a5aSDimitry Andric // 8d88c1a5aSDimitry Andric //===----------------------------------------------------------------------===// 9d88c1a5aSDimitry Andric 10d88c1a5aSDimitry Andric #include "llvm/CodeGen/Passes.h" 11d88c1a5aSDimitry Andric #include "llvm/ADT/SmallVector.h" 12d88c1a5aSDimitry Andric #include "llvm/ADT/Statistic.h" 13d88c1a5aSDimitry Andric #include "llvm/CodeGen/LivePhysRegs.h" 14d88c1a5aSDimitry Andric #include "llvm/CodeGen/MachineFunctionPass.h" 15d88c1a5aSDimitry Andric #include "llvm/CodeGen/RegisterScavenging.h" 16d88c1a5aSDimitry Andric #include "llvm/Target/TargetInstrInfo.h" 17d88c1a5aSDimitry Andric #include "llvm/Target/TargetSubtargetInfo.h" 18d88c1a5aSDimitry Andric #include "llvm/Support/Debug.h" 19d88c1a5aSDimitry Andric #include "llvm/Support/Format.h" 20d88c1a5aSDimitry Andric #include "llvm/Support/raw_ostream.h" 21d88c1a5aSDimitry Andric 22d88c1a5aSDimitry Andric using namespace llvm; 23d88c1a5aSDimitry Andric 24d88c1a5aSDimitry Andric #define DEBUG_TYPE "branch-relaxation" 25d88c1a5aSDimitry Andric 26d88c1a5aSDimitry Andric STATISTIC(NumSplit, "Number of basic blocks split"); 27d88c1a5aSDimitry Andric STATISTIC(NumConditionalRelaxed, "Number of conditional branches relaxed"); 28d88c1a5aSDimitry Andric STATISTIC(NumUnconditionalRelaxed, "Number of unconditional branches relaxed"); 29d88c1a5aSDimitry Andric 30d88c1a5aSDimitry Andric #define BRANCH_RELAX_NAME "Branch relaxation pass" 31d88c1a5aSDimitry Andric 32d88c1a5aSDimitry Andric namespace { 33d88c1a5aSDimitry Andric class BranchRelaxation : public MachineFunctionPass { 34d88c1a5aSDimitry Andric /// BasicBlockInfo - Information about the offset and size of a single 35d88c1a5aSDimitry Andric /// basic block. 36d88c1a5aSDimitry Andric struct BasicBlockInfo { 37d88c1a5aSDimitry Andric /// Offset - Distance from the beginning of the function to the beginning 38d88c1a5aSDimitry Andric /// of this basic block. 39d88c1a5aSDimitry Andric /// 40d88c1a5aSDimitry Andric /// The offset is always aligned as required by the basic block. 41d88c1a5aSDimitry Andric unsigned Offset; 42d88c1a5aSDimitry Andric 43d88c1a5aSDimitry Andric /// Size - Size of the basic block in bytes. If the block contains 44d88c1a5aSDimitry Andric /// inline assembly, this is a worst case estimate. 45d88c1a5aSDimitry Andric /// 46d88c1a5aSDimitry Andric /// The size does not include any alignment padding whether from the 47d88c1a5aSDimitry Andric /// beginning of the block, or from an aligned jump table at the end. 48d88c1a5aSDimitry Andric unsigned Size; 49d88c1a5aSDimitry Andric 50d88c1a5aSDimitry Andric BasicBlockInfo() : Offset(0), Size(0) {} 51d88c1a5aSDimitry Andric 52d88c1a5aSDimitry Andric /// Compute the offset immediately following this block. \p MBB is the next 53d88c1a5aSDimitry Andric /// block. 54d88c1a5aSDimitry Andric unsigned postOffset(const MachineBasicBlock &MBB) const { 55d88c1a5aSDimitry Andric unsigned PO = Offset + Size; 56d88c1a5aSDimitry Andric unsigned Align = MBB.getAlignment(); 57d88c1a5aSDimitry Andric if (Align == 0) 58d88c1a5aSDimitry Andric return PO; 59d88c1a5aSDimitry Andric 60d88c1a5aSDimitry Andric unsigned AlignAmt = 1 << Align; 61d88c1a5aSDimitry Andric unsigned ParentAlign = MBB.getParent()->getAlignment(); 62d88c1a5aSDimitry Andric if (Align <= ParentAlign) 63d88c1a5aSDimitry Andric return PO + OffsetToAlignment(PO, AlignAmt); 64d88c1a5aSDimitry Andric 65d88c1a5aSDimitry Andric // The alignment of this MBB is larger than the function's alignment, so we 66d88c1a5aSDimitry Andric // can't tell whether or not it will insert nops. Assume that it will. 67d88c1a5aSDimitry Andric return PO + AlignAmt + OffsetToAlignment(PO, AlignAmt); 68d88c1a5aSDimitry Andric } 69d88c1a5aSDimitry Andric }; 70d88c1a5aSDimitry Andric 71d88c1a5aSDimitry Andric SmallVector<BasicBlockInfo, 16> BlockInfo; 72d88c1a5aSDimitry Andric std::unique_ptr<RegScavenger> RS; 73d88c1a5aSDimitry Andric LivePhysRegs LiveRegs; 74d88c1a5aSDimitry Andric 75d88c1a5aSDimitry Andric MachineFunction *MF; 76d88c1a5aSDimitry Andric const TargetRegisterInfo *TRI; 77d88c1a5aSDimitry Andric const TargetInstrInfo *TII; 78d88c1a5aSDimitry Andric 79d88c1a5aSDimitry Andric bool relaxBranchInstructions(); 80d88c1a5aSDimitry Andric void scanFunction(); 81d88c1a5aSDimitry Andric 82d88c1a5aSDimitry Andric MachineBasicBlock *createNewBlockAfter(MachineBasicBlock &BB); 83d88c1a5aSDimitry Andric 84d88c1a5aSDimitry Andric MachineBasicBlock *splitBlockBeforeInstr(MachineInstr &MI, 85d88c1a5aSDimitry Andric MachineBasicBlock *DestBB); 86d88c1a5aSDimitry Andric void adjustBlockOffsets(MachineBasicBlock &MBB); 87d88c1a5aSDimitry Andric bool isBlockInRange(const MachineInstr &MI, const MachineBasicBlock &BB) const; 88d88c1a5aSDimitry Andric 89d88c1a5aSDimitry Andric bool fixupConditionalBranch(MachineInstr &MI); 90d88c1a5aSDimitry Andric bool fixupUnconditionalBranch(MachineInstr &MI); 91d88c1a5aSDimitry Andric uint64_t computeBlockSize(const MachineBasicBlock &MBB) const; 92d88c1a5aSDimitry Andric unsigned getInstrOffset(const MachineInstr &MI) const; 93d88c1a5aSDimitry Andric void dumpBBs(); 94d88c1a5aSDimitry Andric void verify(); 95d88c1a5aSDimitry Andric 96d88c1a5aSDimitry Andric public: 97d88c1a5aSDimitry Andric static char ID; 98d88c1a5aSDimitry Andric BranchRelaxation() : MachineFunctionPass(ID) { } 99d88c1a5aSDimitry Andric 100d88c1a5aSDimitry Andric bool runOnMachineFunction(MachineFunction &MF) override; 101d88c1a5aSDimitry Andric 102d88c1a5aSDimitry Andric StringRef getPassName() const override { 103d88c1a5aSDimitry Andric return BRANCH_RELAX_NAME; 104d88c1a5aSDimitry Andric } 105d88c1a5aSDimitry Andric }; 106d88c1a5aSDimitry Andric 107d88c1a5aSDimitry Andric } 108d88c1a5aSDimitry Andric 109d88c1a5aSDimitry Andric char BranchRelaxation::ID = 0; 110d88c1a5aSDimitry Andric char &llvm::BranchRelaxationPassID = BranchRelaxation::ID; 111d88c1a5aSDimitry Andric 112d88c1a5aSDimitry Andric INITIALIZE_PASS(BranchRelaxation, DEBUG_TYPE, BRANCH_RELAX_NAME, false, false) 113d88c1a5aSDimitry Andric 114d88c1a5aSDimitry Andric /// verify - check BBOffsets, BBSizes, alignment of islands 115d88c1a5aSDimitry Andric void BranchRelaxation::verify() { 116d88c1a5aSDimitry Andric #ifndef NDEBUG 117d88c1a5aSDimitry Andric unsigned PrevNum = MF->begin()->getNumber(); 118d88c1a5aSDimitry Andric for (MachineBasicBlock &MBB : *MF) { 119d88c1a5aSDimitry Andric unsigned Align = MBB.getAlignment(); 120d88c1a5aSDimitry Andric unsigned Num = MBB.getNumber(); 121d88c1a5aSDimitry Andric assert(BlockInfo[Num].Offset % (1u << Align) == 0); 122d88c1a5aSDimitry Andric assert(!Num || BlockInfo[PrevNum].postOffset(MBB) <= BlockInfo[Num].Offset); 123d88c1a5aSDimitry Andric assert(BlockInfo[Num].Size == computeBlockSize(MBB)); 124d88c1a5aSDimitry Andric PrevNum = Num; 125d88c1a5aSDimitry Andric } 126d88c1a5aSDimitry Andric #endif 127d88c1a5aSDimitry Andric } 128d88c1a5aSDimitry Andric 129d88c1a5aSDimitry Andric /// print block size and offset information - debugging 130d88c1a5aSDimitry Andric void BranchRelaxation::dumpBBs() { 131d88c1a5aSDimitry Andric for (auto &MBB : *MF) { 132d88c1a5aSDimitry Andric const BasicBlockInfo &BBI = BlockInfo[MBB.getNumber()]; 133d88c1a5aSDimitry Andric dbgs() << format("BB#%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset) 134d88c1a5aSDimitry Andric << format("size=%#x\n", BBI.Size); 135d88c1a5aSDimitry Andric } 136d88c1a5aSDimitry Andric } 137d88c1a5aSDimitry Andric 138d88c1a5aSDimitry Andric /// scanFunction - Do the initial scan of the function, building up 139d88c1a5aSDimitry Andric /// information about each block. 140d88c1a5aSDimitry Andric void BranchRelaxation::scanFunction() { 141d88c1a5aSDimitry Andric BlockInfo.clear(); 142d88c1a5aSDimitry Andric BlockInfo.resize(MF->getNumBlockIDs()); 143d88c1a5aSDimitry Andric 144d88c1a5aSDimitry Andric // First thing, compute the size of all basic blocks, and see if the function 145d88c1a5aSDimitry Andric // has any inline assembly in it. If so, we have to be conservative about 146d88c1a5aSDimitry Andric // alignment assumptions, as we don't know for sure the size of any 147d88c1a5aSDimitry Andric // instructions in the inline assembly. 148d88c1a5aSDimitry Andric for (MachineBasicBlock &MBB : *MF) 149d88c1a5aSDimitry Andric BlockInfo[MBB.getNumber()].Size = computeBlockSize(MBB); 150d88c1a5aSDimitry Andric 151d88c1a5aSDimitry Andric // Compute block offsets and known bits. 152d88c1a5aSDimitry Andric adjustBlockOffsets(*MF->begin()); 153d88c1a5aSDimitry Andric } 154d88c1a5aSDimitry Andric 155d88c1a5aSDimitry Andric /// computeBlockSize - Compute the size for MBB. 156d88c1a5aSDimitry Andric uint64_t BranchRelaxation::computeBlockSize(const MachineBasicBlock &MBB) const { 157d88c1a5aSDimitry Andric uint64_t Size = 0; 158d88c1a5aSDimitry Andric for (const MachineInstr &MI : MBB) 159d88c1a5aSDimitry Andric Size += TII->getInstSizeInBytes(MI); 160d88c1a5aSDimitry Andric return Size; 161d88c1a5aSDimitry Andric } 162d88c1a5aSDimitry Andric 163d88c1a5aSDimitry Andric /// getInstrOffset - Return the current offset of the specified machine 164d88c1a5aSDimitry Andric /// instruction from the start of the function. This offset changes as stuff is 165d88c1a5aSDimitry Andric /// moved around inside the function. 166d88c1a5aSDimitry Andric unsigned BranchRelaxation::getInstrOffset(const MachineInstr &MI) const { 167d88c1a5aSDimitry Andric const MachineBasicBlock *MBB = MI.getParent(); 168d88c1a5aSDimitry Andric 169d88c1a5aSDimitry Andric // The offset is composed of two things: the sum of the sizes of all MBB's 170d88c1a5aSDimitry Andric // before this instruction's block, and the offset from the start of the block 171d88c1a5aSDimitry Andric // it is in. 172d88c1a5aSDimitry Andric unsigned Offset = BlockInfo[MBB->getNumber()].Offset; 173d88c1a5aSDimitry Andric 174d88c1a5aSDimitry Andric // Sum instructions before MI in MBB. 175d88c1a5aSDimitry Andric for (MachineBasicBlock::const_iterator I = MBB->begin(); &*I != &MI; ++I) { 176d88c1a5aSDimitry Andric assert(I != MBB->end() && "Didn't find MI in its own basic block?"); 177d88c1a5aSDimitry Andric Offset += TII->getInstSizeInBytes(*I); 178d88c1a5aSDimitry Andric } 179d88c1a5aSDimitry Andric 180d88c1a5aSDimitry Andric return Offset; 181d88c1a5aSDimitry Andric } 182d88c1a5aSDimitry Andric 183d88c1a5aSDimitry Andric void BranchRelaxation::adjustBlockOffsets(MachineBasicBlock &Start) { 184d88c1a5aSDimitry Andric unsigned PrevNum = Start.getNumber(); 185d88c1a5aSDimitry Andric for (auto &MBB : make_range(MachineFunction::iterator(Start), MF->end())) { 186d88c1a5aSDimitry Andric unsigned Num = MBB.getNumber(); 187d88c1a5aSDimitry Andric if (!Num) // block zero is never changed from offset zero. 188d88c1a5aSDimitry Andric continue; 189d88c1a5aSDimitry Andric // Get the offset and known bits at the end of the layout predecessor. 190d88c1a5aSDimitry Andric // Include the alignment of the current block. 191d88c1a5aSDimitry Andric BlockInfo[Num].Offset = BlockInfo[PrevNum].postOffset(MBB); 192d88c1a5aSDimitry Andric 193d88c1a5aSDimitry Andric PrevNum = Num; 194d88c1a5aSDimitry Andric } 195d88c1a5aSDimitry Andric } 196d88c1a5aSDimitry Andric 197d88c1a5aSDimitry Andric /// Insert a new empty basic block and insert it after \BB 198d88c1a5aSDimitry Andric MachineBasicBlock *BranchRelaxation::createNewBlockAfter(MachineBasicBlock &BB) { 199d88c1a5aSDimitry Andric // Create a new MBB for the code after the OrigBB. 200d88c1a5aSDimitry Andric MachineBasicBlock *NewBB = 201d88c1a5aSDimitry Andric MF->CreateMachineBasicBlock(BB.getBasicBlock()); 202d88c1a5aSDimitry Andric MF->insert(++BB.getIterator(), NewBB); 203d88c1a5aSDimitry Andric 204d88c1a5aSDimitry Andric // Insert an entry into BlockInfo to align it properly with the block numbers. 205d88c1a5aSDimitry Andric BlockInfo.insert(BlockInfo.begin() + NewBB->getNumber(), BasicBlockInfo()); 206d88c1a5aSDimitry Andric 207d88c1a5aSDimitry Andric return NewBB; 208d88c1a5aSDimitry Andric } 209d88c1a5aSDimitry Andric 210d88c1a5aSDimitry Andric /// Split the basic block containing MI into two blocks, which are joined by 211d88c1a5aSDimitry Andric /// an unconditional branch. Update data structures and renumber blocks to 212d88c1a5aSDimitry Andric /// account for this change and returns the newly created block. 213d88c1a5aSDimitry Andric MachineBasicBlock *BranchRelaxation::splitBlockBeforeInstr(MachineInstr &MI, 214d88c1a5aSDimitry Andric MachineBasicBlock *DestBB) { 215d88c1a5aSDimitry Andric MachineBasicBlock *OrigBB = MI.getParent(); 216d88c1a5aSDimitry Andric 217d88c1a5aSDimitry Andric // Create a new MBB for the code after the OrigBB. 218d88c1a5aSDimitry Andric MachineBasicBlock *NewBB = 219d88c1a5aSDimitry Andric MF->CreateMachineBasicBlock(OrigBB->getBasicBlock()); 220d88c1a5aSDimitry Andric MF->insert(++OrigBB->getIterator(), NewBB); 221d88c1a5aSDimitry Andric 222d88c1a5aSDimitry Andric // Splice the instructions starting with MI over to NewBB. 223d88c1a5aSDimitry Andric NewBB->splice(NewBB->end(), OrigBB, MI.getIterator(), OrigBB->end()); 224d88c1a5aSDimitry Andric 225d88c1a5aSDimitry Andric // Add an unconditional branch from OrigBB to NewBB. 226d88c1a5aSDimitry Andric // Note the new unconditional branch is not being recorded. 227d88c1a5aSDimitry Andric // There doesn't seem to be meaningful DebugInfo available; this doesn't 228d88c1a5aSDimitry Andric // correspond to anything in the source. 229d88c1a5aSDimitry Andric TII->insertUnconditionalBranch(*OrigBB, NewBB, DebugLoc()); 230d88c1a5aSDimitry Andric 231d88c1a5aSDimitry Andric // Insert an entry into BlockInfo to align it properly with the block numbers. 232d88c1a5aSDimitry Andric BlockInfo.insert(BlockInfo.begin() + NewBB->getNumber(), BasicBlockInfo()); 233d88c1a5aSDimitry Andric 234d88c1a5aSDimitry Andric 235d88c1a5aSDimitry Andric NewBB->transferSuccessors(OrigBB); 236d88c1a5aSDimitry Andric OrigBB->addSuccessor(NewBB); 237d88c1a5aSDimitry Andric OrigBB->addSuccessor(DestBB); 238d88c1a5aSDimitry Andric 239d88c1a5aSDimitry Andric // Cleanup potential unconditional branch to successor block. 240d88c1a5aSDimitry Andric // Note that updateTerminator may change the size of the blocks. 241d88c1a5aSDimitry Andric NewBB->updateTerminator(); 242d88c1a5aSDimitry Andric OrigBB->updateTerminator(); 243d88c1a5aSDimitry Andric 244d88c1a5aSDimitry Andric // Figure out how large the OrigBB is. As the first half of the original 245d88c1a5aSDimitry Andric // block, it cannot contain a tablejump. The size includes 246d88c1a5aSDimitry Andric // the new jump we added. (It should be possible to do this without 247d88c1a5aSDimitry Andric // recounting everything, but it's very confusing, and this is rarely 248d88c1a5aSDimitry Andric // executed.) 249d88c1a5aSDimitry Andric BlockInfo[OrigBB->getNumber()].Size = computeBlockSize(*OrigBB); 250d88c1a5aSDimitry Andric 251d88c1a5aSDimitry Andric // Figure out how large the NewMBB is. As the second half of the original 252d88c1a5aSDimitry Andric // block, it may contain a tablejump. 253d88c1a5aSDimitry Andric BlockInfo[NewBB->getNumber()].Size = computeBlockSize(*NewBB); 254d88c1a5aSDimitry Andric 255d88c1a5aSDimitry Andric // All BBOffsets following these blocks must be modified. 256d88c1a5aSDimitry Andric adjustBlockOffsets(*OrigBB); 257d88c1a5aSDimitry Andric 258d88c1a5aSDimitry Andric // Need to fix live-in lists if we track liveness. 259d88c1a5aSDimitry Andric if (TRI->trackLivenessAfterRegAlloc(*MF)) 260d88c1a5aSDimitry Andric computeLiveIns(LiveRegs, *TRI, *NewBB); 261d88c1a5aSDimitry Andric 262d88c1a5aSDimitry Andric ++NumSplit; 263d88c1a5aSDimitry Andric 264d88c1a5aSDimitry Andric return NewBB; 265d88c1a5aSDimitry Andric } 266d88c1a5aSDimitry Andric 267d88c1a5aSDimitry Andric /// isBlockInRange - Returns true if the distance between specific MI and 268d88c1a5aSDimitry Andric /// specific BB can fit in MI's displacement field. 269d88c1a5aSDimitry Andric bool BranchRelaxation::isBlockInRange( 270d88c1a5aSDimitry Andric const MachineInstr &MI, const MachineBasicBlock &DestBB) const { 271d88c1a5aSDimitry Andric int64_t BrOffset = getInstrOffset(MI); 272d88c1a5aSDimitry Andric int64_t DestOffset = BlockInfo[DestBB.getNumber()].Offset; 273d88c1a5aSDimitry Andric 274d88c1a5aSDimitry Andric if (TII->isBranchOffsetInRange(MI.getOpcode(), DestOffset - BrOffset)) 275d88c1a5aSDimitry Andric return true; 276d88c1a5aSDimitry Andric 277d88c1a5aSDimitry Andric DEBUG( 278d88c1a5aSDimitry Andric dbgs() << "Out of range branch to destination BB#" << DestBB.getNumber() 279d88c1a5aSDimitry Andric << " from BB#" << MI.getParent()->getNumber() 280d88c1a5aSDimitry Andric << " to " << DestOffset 281d88c1a5aSDimitry Andric << " offset " << DestOffset - BrOffset 282d88c1a5aSDimitry Andric << '\t' << MI 283d88c1a5aSDimitry Andric ); 284d88c1a5aSDimitry Andric 285d88c1a5aSDimitry Andric return false; 286d88c1a5aSDimitry Andric } 287d88c1a5aSDimitry Andric 288d88c1a5aSDimitry Andric /// fixupConditionalBranch - Fix up a conditional branch whose destination is 289d88c1a5aSDimitry Andric /// too far away to fit in its displacement field. It is converted to an inverse 290d88c1a5aSDimitry Andric /// conditional branch + an unconditional branch to the destination. 291d88c1a5aSDimitry Andric bool BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) { 292d88c1a5aSDimitry Andric DebugLoc DL = MI.getDebugLoc(); 293d88c1a5aSDimitry Andric MachineBasicBlock *MBB = MI.getParent(); 294d88c1a5aSDimitry Andric MachineBasicBlock *TBB = nullptr, *FBB = nullptr; 295d88c1a5aSDimitry Andric SmallVector<MachineOperand, 4> Cond; 296d88c1a5aSDimitry Andric 297d88c1a5aSDimitry Andric bool Fail = TII->analyzeBranch(*MBB, TBB, FBB, Cond); 298d88c1a5aSDimitry Andric assert(!Fail && "branches to be relaxed must be analyzable"); 299d88c1a5aSDimitry Andric (void)Fail; 300d88c1a5aSDimitry Andric 301d88c1a5aSDimitry Andric // Add an unconditional branch to the destination and invert the branch 302d88c1a5aSDimitry Andric // condition to jump over it: 303d88c1a5aSDimitry Andric // tbz L1 304d88c1a5aSDimitry Andric // => 305d88c1a5aSDimitry Andric // tbnz L2 306d88c1a5aSDimitry Andric // b L1 307d88c1a5aSDimitry Andric // L2: 308d88c1a5aSDimitry Andric 309d88c1a5aSDimitry Andric if (FBB && isBlockInRange(MI, *FBB)) { 310d88c1a5aSDimitry Andric // Last MI in the BB is an unconditional branch. We can simply invert the 311d88c1a5aSDimitry Andric // condition and swap destinations: 312d88c1a5aSDimitry Andric // beq L1 313d88c1a5aSDimitry Andric // b L2 314d88c1a5aSDimitry Andric // => 315d88c1a5aSDimitry Andric // bne L2 316d88c1a5aSDimitry Andric // b L1 317d88c1a5aSDimitry Andric DEBUG(dbgs() << " Invert condition and swap " 318d88c1a5aSDimitry Andric "its destination with " << MBB->back()); 319d88c1a5aSDimitry Andric 320d88c1a5aSDimitry Andric TII->reverseBranchCondition(Cond); 321d88c1a5aSDimitry Andric int OldSize = 0, NewSize = 0; 322d88c1a5aSDimitry Andric TII->removeBranch(*MBB, &OldSize); 323d88c1a5aSDimitry Andric TII->insertBranch(*MBB, FBB, TBB, Cond, DL, &NewSize); 324d88c1a5aSDimitry Andric 325d88c1a5aSDimitry Andric BlockInfo[MBB->getNumber()].Size += (NewSize - OldSize); 326d88c1a5aSDimitry Andric return true; 327d88c1a5aSDimitry Andric } else if (FBB) { 328d88c1a5aSDimitry Andric // We need to split the basic block here to obtain two long-range 329d88c1a5aSDimitry Andric // unconditional branches. 330d88c1a5aSDimitry Andric auto &NewBB = *MF->CreateMachineBasicBlock(MBB->getBasicBlock()); 331d88c1a5aSDimitry Andric MF->insert(++MBB->getIterator(), &NewBB); 332d88c1a5aSDimitry Andric 333d88c1a5aSDimitry Andric // Insert an entry into BlockInfo to align it properly with the block 334d88c1a5aSDimitry Andric // numbers. 335d88c1a5aSDimitry Andric BlockInfo.insert(BlockInfo.begin() + NewBB.getNumber(), BasicBlockInfo()); 336d88c1a5aSDimitry Andric 337d88c1a5aSDimitry Andric unsigned &NewBBSize = BlockInfo[NewBB.getNumber()].Size; 338d88c1a5aSDimitry Andric int NewBrSize; 339d88c1a5aSDimitry Andric TII->insertUnconditionalBranch(NewBB, FBB, DL, &NewBrSize); 340d88c1a5aSDimitry Andric NewBBSize += NewBrSize; 341d88c1a5aSDimitry Andric 342d88c1a5aSDimitry Andric // Update the successor lists according to the transformation to follow. 343d88c1a5aSDimitry Andric // Do it here since if there's no split, no update is needed. 344d88c1a5aSDimitry Andric MBB->replaceSuccessor(FBB, &NewBB); 345d88c1a5aSDimitry Andric NewBB.addSuccessor(FBB); 346d88c1a5aSDimitry Andric } 347d88c1a5aSDimitry Andric 348d88c1a5aSDimitry Andric // We now have an appropriate fall-through block in place (either naturally or 349d88c1a5aSDimitry Andric // just created), so we can invert the condition. 350d88c1a5aSDimitry Andric MachineBasicBlock &NextBB = *std::next(MachineFunction::iterator(MBB)); 351d88c1a5aSDimitry Andric 352d88c1a5aSDimitry Andric DEBUG(dbgs() << " Insert B to BB#" << TBB->getNumber() 353d88c1a5aSDimitry Andric << ", invert condition and change dest. to BB#" 354d88c1a5aSDimitry Andric << NextBB.getNumber() << '\n'); 355d88c1a5aSDimitry Andric 356d88c1a5aSDimitry Andric unsigned &MBBSize = BlockInfo[MBB->getNumber()].Size; 357d88c1a5aSDimitry Andric 358d88c1a5aSDimitry Andric // Insert a new conditional branch and a new unconditional branch. 359d88c1a5aSDimitry Andric int RemovedSize = 0; 360d88c1a5aSDimitry Andric TII->reverseBranchCondition(Cond); 361d88c1a5aSDimitry Andric TII->removeBranch(*MBB, &RemovedSize); 362d88c1a5aSDimitry Andric MBBSize -= RemovedSize; 363d88c1a5aSDimitry Andric 364d88c1a5aSDimitry Andric int AddedSize = 0; 365d88c1a5aSDimitry Andric TII->insertBranch(*MBB, &NextBB, TBB, Cond, DL, &AddedSize); 366d88c1a5aSDimitry Andric MBBSize += AddedSize; 367d88c1a5aSDimitry Andric 368d88c1a5aSDimitry Andric // Finally, keep the block offsets up to date. 369d88c1a5aSDimitry Andric adjustBlockOffsets(*MBB); 370d88c1a5aSDimitry Andric return true; 371d88c1a5aSDimitry Andric } 372d88c1a5aSDimitry Andric 373d88c1a5aSDimitry Andric bool BranchRelaxation::fixupUnconditionalBranch(MachineInstr &MI) { 374d88c1a5aSDimitry Andric MachineBasicBlock *MBB = MI.getParent(); 375d88c1a5aSDimitry Andric 376d88c1a5aSDimitry Andric unsigned OldBrSize = TII->getInstSizeInBytes(MI); 377d88c1a5aSDimitry Andric MachineBasicBlock *DestBB = TII->getBranchDestBlock(MI); 378d88c1a5aSDimitry Andric 379d88c1a5aSDimitry Andric int64_t DestOffset = BlockInfo[DestBB->getNumber()].Offset; 380d88c1a5aSDimitry Andric int64_t SrcOffset = getInstrOffset(MI); 381d88c1a5aSDimitry Andric 382d88c1a5aSDimitry Andric assert(!TII->isBranchOffsetInRange(MI.getOpcode(), DestOffset - SrcOffset)); 383d88c1a5aSDimitry Andric 384d88c1a5aSDimitry Andric BlockInfo[MBB->getNumber()].Size -= OldBrSize; 385d88c1a5aSDimitry Andric 386d88c1a5aSDimitry Andric MachineBasicBlock *BranchBB = MBB; 387d88c1a5aSDimitry Andric 388d88c1a5aSDimitry Andric // If this was an expanded conditional branch, there is already a single 389d88c1a5aSDimitry Andric // unconditional branch in a block. 390d88c1a5aSDimitry Andric if (!MBB->empty()) { 391d88c1a5aSDimitry Andric BranchBB = createNewBlockAfter(*MBB); 392d88c1a5aSDimitry Andric 393d88c1a5aSDimitry Andric // Add live outs. 394d88c1a5aSDimitry Andric for (const MachineBasicBlock *Succ : MBB->successors()) { 395d88c1a5aSDimitry Andric for (const MachineBasicBlock::RegisterMaskPair &LiveIn : Succ->liveins()) 396d88c1a5aSDimitry Andric BranchBB->addLiveIn(LiveIn); 397d88c1a5aSDimitry Andric } 398d88c1a5aSDimitry Andric 399d88c1a5aSDimitry Andric BranchBB->sortUniqueLiveIns(); 400d88c1a5aSDimitry Andric BranchBB->addSuccessor(DestBB); 401d88c1a5aSDimitry Andric MBB->replaceSuccessor(DestBB, BranchBB); 402d88c1a5aSDimitry Andric } 403d88c1a5aSDimitry Andric 404d88c1a5aSDimitry Andric DebugLoc DL = MI.getDebugLoc(); 405d88c1a5aSDimitry Andric MI.eraseFromParent(); 406d88c1a5aSDimitry Andric BlockInfo[BranchBB->getNumber()].Size += TII->insertIndirectBranch( 407d88c1a5aSDimitry Andric *BranchBB, *DestBB, DL, DestOffset - SrcOffset, RS.get()); 408d88c1a5aSDimitry Andric 409d88c1a5aSDimitry Andric adjustBlockOffsets(*MBB); 410d88c1a5aSDimitry Andric return true; 411d88c1a5aSDimitry Andric } 412d88c1a5aSDimitry Andric 413d88c1a5aSDimitry Andric bool BranchRelaxation::relaxBranchInstructions() { 414d88c1a5aSDimitry Andric bool Changed = false; 415d88c1a5aSDimitry Andric 416d88c1a5aSDimitry Andric // Relaxing branches involves creating new basic blocks, so re-eval 417d88c1a5aSDimitry Andric // end() for termination. 418d88c1a5aSDimitry Andric for (MachineFunction::iterator I = MF->begin(); I != MF->end(); ++I) { 419d88c1a5aSDimitry Andric MachineBasicBlock &MBB = *I; 420d88c1a5aSDimitry Andric 421d88c1a5aSDimitry Andric // Empty block? 422d88c1a5aSDimitry Andric MachineBasicBlock::iterator Last = MBB.getLastNonDebugInstr(); 423d88c1a5aSDimitry Andric if (Last == MBB.end()) 424d88c1a5aSDimitry Andric continue; 425d88c1a5aSDimitry Andric 426d88c1a5aSDimitry Andric // Expand the unconditional branch first if necessary. If there is a 427d88c1a5aSDimitry Andric // conditional branch, this will end up changing the branch destination of 428d88c1a5aSDimitry Andric // it to be over the newly inserted indirect branch block, which may avoid 429d88c1a5aSDimitry Andric // the need to try expanding the conditional branch first, saving an extra 430d88c1a5aSDimitry Andric // jump. 431d88c1a5aSDimitry Andric if (Last->isUnconditionalBranch()) { 432d88c1a5aSDimitry Andric // Unconditional branch destination might be unanalyzable, assume these 433d88c1a5aSDimitry Andric // are OK. 434d88c1a5aSDimitry Andric if (MachineBasicBlock *DestBB = TII->getBranchDestBlock(*Last)) { 435d88c1a5aSDimitry Andric if (!isBlockInRange(*Last, *DestBB)) { 436d88c1a5aSDimitry Andric fixupUnconditionalBranch(*Last); 437d88c1a5aSDimitry Andric ++NumUnconditionalRelaxed; 438d88c1a5aSDimitry Andric Changed = true; 439d88c1a5aSDimitry Andric } 440d88c1a5aSDimitry Andric } 441d88c1a5aSDimitry Andric } 442d88c1a5aSDimitry Andric 443d88c1a5aSDimitry Andric // Loop over the conditional branches. 444d88c1a5aSDimitry Andric MachineBasicBlock::iterator Next; 445d88c1a5aSDimitry Andric for (MachineBasicBlock::iterator J = MBB.getFirstTerminator(); 446d88c1a5aSDimitry Andric J != MBB.end(); J = Next) { 447d88c1a5aSDimitry Andric Next = std::next(J); 448d88c1a5aSDimitry Andric MachineInstr &MI = *J; 449d88c1a5aSDimitry Andric 450d88c1a5aSDimitry Andric if (MI.isConditionalBranch()) { 451d88c1a5aSDimitry Andric MachineBasicBlock *DestBB = TII->getBranchDestBlock(MI); 452d88c1a5aSDimitry Andric if (!isBlockInRange(MI, *DestBB)) { 453d88c1a5aSDimitry Andric if (Next != MBB.end() && Next->isConditionalBranch()) { 454d88c1a5aSDimitry Andric // If there are multiple conditional branches, this isn't an 455d88c1a5aSDimitry Andric // analyzable block. Split later terminators into a new block so 456d88c1a5aSDimitry Andric // each one will be analyzable. 457d88c1a5aSDimitry Andric 458d88c1a5aSDimitry Andric splitBlockBeforeInstr(*Next, DestBB); 459d88c1a5aSDimitry Andric } else { 460d88c1a5aSDimitry Andric fixupConditionalBranch(MI); 461d88c1a5aSDimitry Andric ++NumConditionalRelaxed; 462d88c1a5aSDimitry Andric } 463d88c1a5aSDimitry Andric 464d88c1a5aSDimitry Andric Changed = true; 465d88c1a5aSDimitry Andric 466d88c1a5aSDimitry Andric // This may have modified all of the terminators, so start over. 467d88c1a5aSDimitry Andric Next = MBB.getFirstTerminator(); 468d88c1a5aSDimitry Andric } 469d88c1a5aSDimitry Andric } 470d88c1a5aSDimitry Andric } 471d88c1a5aSDimitry Andric } 472d88c1a5aSDimitry Andric 473d88c1a5aSDimitry Andric return Changed; 474d88c1a5aSDimitry Andric } 475d88c1a5aSDimitry Andric 476d88c1a5aSDimitry Andric bool BranchRelaxation::runOnMachineFunction(MachineFunction &mf) { 477d88c1a5aSDimitry Andric MF = &mf; 478d88c1a5aSDimitry Andric 479d88c1a5aSDimitry Andric DEBUG(dbgs() << "***** BranchRelaxation *****\n"); 480d88c1a5aSDimitry Andric 481d88c1a5aSDimitry Andric const TargetSubtargetInfo &ST = MF->getSubtarget(); 482d88c1a5aSDimitry Andric TII = ST.getInstrInfo(); 483d88c1a5aSDimitry Andric 484d88c1a5aSDimitry Andric TRI = ST.getRegisterInfo(); 485d88c1a5aSDimitry Andric if (TRI->trackLivenessAfterRegAlloc(*MF)) 486d88c1a5aSDimitry Andric RS.reset(new RegScavenger()); 487d88c1a5aSDimitry Andric 488d88c1a5aSDimitry Andric // Renumber all of the machine basic blocks in the function, guaranteeing that 489d88c1a5aSDimitry Andric // the numbers agree with the position of the block in the function. 490d88c1a5aSDimitry Andric MF->RenumberBlocks(); 491d88c1a5aSDimitry Andric 492d88c1a5aSDimitry Andric // Do the initial scan of the function, building up information about the 493d88c1a5aSDimitry Andric // sizes of each block. 494d88c1a5aSDimitry Andric scanFunction(); 495d88c1a5aSDimitry Andric 496d88c1a5aSDimitry Andric DEBUG(dbgs() << " Basic blocks before relaxation\n"; dumpBBs();); 497d88c1a5aSDimitry Andric 498d88c1a5aSDimitry Andric bool MadeChange = false; 499d88c1a5aSDimitry Andric while (relaxBranchInstructions()) 500d88c1a5aSDimitry Andric MadeChange = true; 501d88c1a5aSDimitry Andric 502d88c1a5aSDimitry Andric // After a while, this might be made debug-only, but it is not expensive. 503d88c1a5aSDimitry Andric verify(); 504d88c1a5aSDimitry Andric 505d88c1a5aSDimitry Andric DEBUG(dbgs() << " Basic blocks after relaxation\n\n"; dumpBBs()); 506d88c1a5aSDimitry Andric 507d88c1a5aSDimitry Andric BlockInfo.clear(); 508d88c1a5aSDimitry Andric 509d88c1a5aSDimitry Andric return MadeChange; 510d88c1a5aSDimitry Andric } 511