12006-06-09  Nick Clifton  <[email protected]>
2
3	* po/fi.po: Updated Finnish translation.
4
52006-06-07  Joseph S. Myers  <[email protected]>
6
7	* po/Make-in (pdf, ps): New dummy targets.
8
92006-05-30  Nick Clifton  <[email protected]>
10
11	* po/es.po: Updated Spanish translation.
12
132006-05-26  Richard Sandiford  <[email protected]>
14
15	* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
16	and fmovem entries.  Put register list entries before immediate
17	mask entries.  Use "l" rather than "L" in the fmovem entries.
18	* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
19	out from INFO.
20	(m68k_scan_mask): New function, split out from...
21	(print_insn_m68k): ...here.  If no architecture has been set,
22	first try printing an m680x0 instruction, then try a Coldfire one.
23
242006-05-24  Nick Clifton  <[email protected]>
25
26	* po/ga.po: Updated Irish translation.
27
282006-05-22  Nick Clifton  <[email protected]>
29
30	* crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
31
322006-05-22  Nick Clifton  <[email protected]>
33
34	* po/nl.po: Updated translation.
35
362006-05-18  Alan Modra  <[email protected]>
37
38	* avr-dis.c (avr_operand): Warning fix.
39
402006-05-04  Thiemo Seufer  <[email protected]>
41
42	* mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
43
442006-04-16  Daniel Jacobowitz  <[email protected]>
45
46	* po/POTFILES.in: Regenerated.
47
482006-04-12   Hochstein  <[email protected]>
49
50	PR binutils/2454
51	* avr-dis.c (avr_operand): Arrange for a comment to appear before
52	the symolic form of an address, so that the output of objdump -d
53	can be reassembled.
54
552006-04-10  DJ Delorie  <[email protected]>
56
57	* m32c-asm.c: Regenerate.
58
592006-04-06  Carlos O'Donell  <[email protected]>
60
61	* Makefile.am: Add install-html target.
62	* Makefile.in: Regenerate.
63
642006-04-06  Nick Clifton  <[email protected]>
65
66	* po/vi/po: Updated Vietnamese translation.
67
682006-03-31  Paul Koning  <[email protected]>
69
70	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
71
722006-03-16  Bernd Schmidt  <[email protected]>
73
74	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
75	logic to identify halfword shifts.
76
772006-03-16  Paul Brook  <[email protected]>
78
79	* arm-dis.c (arm_opcodes): Rename swi to svc.
80	(thumb_opcodes): Ditto.
81
822006-03-13  DJ Delorie  <[email protected]>
83
84	* m32c-asm.c: Regenerate.
85	* m32c-desc.c: Likewise.
86	* m32c-desc.h: Likewise.
87	* m32c-dis.c: Likewise.
88	* m32c-ibld.c: Likewise.
89	* m32c-opc.c: Likewise.
90	* m32c-opc.h: Likewise.
91
922006-03-10  DJ Delorie  <[email protected]>
93
94	* m32c-desc.c: Regenerate with mul.l, mulu.l.
95	* m32c-opc.c: Likewise.
96	* m32c-opc.h: Likewise.
97
98
992006-03-09  Nick Clifton  <[email protected]>
100
101	* po/sv.po: Updated Swedish translation.
102
1032006-03-07  H.J. Lu  <[email protected]>
104
105	PR binutils/2428
106	* i386-dis.c (REP_Fixup): New function.
107	(AL): Remove duplicate.
108	(Xbr): New.
109	(Xvr): Likewise.
110	(Ybr): Likewise.
111	(Yvr): Likewise.
112	(indirDXr): Likewise.
113	(ALr): Likewise.
114	(eAXr): Likewise.
115	(dis386): Updated entries of ins, outs, movs, lods and stos.
116
1172006-03-05  Nick Clifton  <[email protected]>
118
119	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
120	signed 32-bit value into an unsigned 32-bit field when the host is
121	a 64-bit machine.
122	* fr30-ibld.c: Regenerate.
123	* frv-ibld.c: Regenerate.
124	* ip2k-ibld.c: Regenerate.
125	* iq2000-asm.c: Regenerate.
126	* iq2000-ibld.c: Regenerate.
127	* m32c-ibld.c: Regenerate.
128	* m32r-ibld.c: Regenerate.
129	* openrisc-ibld.c: Regenerate.
130	* xc16x-ibld.c: Regenerate.
131	* xstormy16-ibld.c: Regenerate.
132
1332006-03-03 Shrirang Khisti <[email protected])
134
135	* xc16x-asm.c: Regenerate.
136	* xc16x-dis.c: Regenerate.
137
1382006-02-27  Carlos O'Donell  <[email protected]>
139
140	* po/Make-in: Add html target.
141
1422006-02-27  H.J. Lu <[email protected]>
143
144	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
145	Intel Merom New Instructions.
146	(THREE_BYTE_0): Likewise.
147	(THREE_BYTE_1): Likewise.
148	(three_byte_table): Likewise.
149	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
150	THREE_BYTE_1 for entry 0x3a.
151	(twobyte_has_modrm): Updated.
152	(twobyte_uses_SSE_prefix): Likewise.
153	(print_insn): Handle 3-byte opcodes used by Intel Merom New
154	Instructions.
155
1562006-02-24  David S. Miller  <[email protected]>
157
158	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
159	(v9_hpriv_reg_names): New table.
160	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
161	New cases '$' and '%' for read/write hyperprivileged register.
162	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
163	window handling and rdhpr/wrhpr instructions.
164
1652006-02-24  DJ Delorie  <[email protected]>
166
167	* m32c-desc.c: Regenerate with linker relaxation attributes.
168	* m32c-desc.h: Likewise.
169	* m32c-dis.c: Likewise.
170	* m32c-opc.c: Likewise.
171
1722006-02-24  Paul Brook  <[email protected]>
173
174	* arm-dis.c (arm_opcodes): Add V7 instructions.
175	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
176	(print_arm_address): New function.
177	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
178	(psr_name): New function.
179	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
180
1812006-02-23  H.J. Lu  <[email protected]>
182
183	* ia64-opc-i.c (bXc): New.
184	(mXc): Likewise.
185	(OpX2TaTbYaXcC): Likewise.
186	(TF). Likewise.
187	(TFCM). Likewise.
188	(ia64_opcodes_i): Add instructions for tf.
189
190	* ia64-opc.h (IMMU5b): New.
191
192	* ia64-asmtab.c: Regenerated.
193
1942006-02-23  H.J. Lu  <[email protected]>
195
196	* ia64-gen.c: Update copyright years.
197	* ia64-opc-b.c: Likewise.
198
1992006-02-22  H.J. Lu  <[email protected]>
200
201	* ia64-gen.c (lookup_regindex): Handle ".vm".
202	(print_dependency_table): Handle '\"'.
203
204	* ia64-ic.tbl: Updated from SDM 2.2.
205	* ia64-raw.tbl: Likewise.
206	* ia64-waw.tbl: Likewise.
207	* ia64-asmtab.c: Regenerated.
208
209	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
210
2112006-02-17  Shrirang Khisti  <[email protected]>
212            Anil Paranjape   <[email protected]>
213            Shilin Shakti    <[email protected]>
214
215	* xc16x-desc.h: New file
216	* xc16x-desc.c: New file
217	* xc16x-opc.h: New file
218	* xc16x-opc.c: New file
219	* xc16x-ibld.c: New file
220	* xc16x-asm.c: New file
221	* xc16x-dis.c: New file
222	* Makefile.am: Entries for xc16x
223	* Makefile.in: Regenerate
224	* cofigure.in: Add xc16x target information.
225	* configure: Regenerate.
226	* disassemble.c: Add xc16x target information.
227
2282006-02-11  H.J. Lu  <[email protected]>
229
230	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
231	moves.
232
2332006-02-11  H.J. Lu  <[email protected]>
234
235	* i386-dis.c ('Z'): Add a new macro.
236	(dis386_twobyte): Use "movZ" for control register moves.
237
2382006-02-10  Nick Clifton  <[email protected]>
239
240	* iq2000-asm.c: Regenerate.
241
2422006-02-07  Nathan Sidwell  <[email protected]>
243
244	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
245
2462006-01-26  David Ung  <[email protected]>
247
248	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
249	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
250	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
251	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
252	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
253
2542006-01-18  Arnold Metselaar  <[email protected]>
255
256	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
257	ld_d_r, pref_xd_cb): Use signed char to hold data to be
258	disassembled.
259	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
260	buffer overflows when disassembling instructions like
261	ld (ix+123),0x23
262	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
263	operand, if the offset is negative.
264
2652006-01-17  Arnold Metselaar  <[email protected]>
266
267	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
268	unsigned char to hold data to be disassembled.
269
2702006-01-17  Andreas Schwab  <[email protected]>
271
272	PR binutils/1486
273	* disassemble.c (disassemble_init_for_target): Set
274	disassembler_needs_relocs for bfd_arch_arm.
275
2762006-01-16  Paul Brook  <[email protected]>
277
278	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
279	f?add?, and f?sub? instructions.
280
2812006-01-16  Nick Clifton  <[email protected]>
282
283	* po/zh_CN.po: New Chinese (simplified) translation.
284	* configure.in (ALL_LINGUAS): Add "zh_CH".
285	* configure: Regenerate.
286
2872006-01-05  Paul Brook  <[email protected]>
288
289	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
290
2912006-01-06  DJ Delorie  <[email protected]>
292
293	* m32c-desc.c: Regenerate.
294	* m32c-opc.c: Regenerate.
295	* m32c-opc.h: Regenerate.
296
2972006-01-03  DJ Delorie  <[email protected]>
298
299	* cgen-ibld.in (extract_normal): Avoid memory range errors.
300	* m32c-ibld.c: Regenerated.
301
302For older changes see ChangeLog-2005
303
304Local Variables:
305mode: change-log
306left-margin: 8
307fill-column: 74
308version-control: never
309End:
310